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1. 发明授权

US08339846B2 Flash memory device, programming and reading methods performed in the same 有权
标题翻译： Flash存储器件，编程和读取方法在同一个执行
公开(公告)号：US08339846B2
公开(公告)日：2012-12-25
申请号：US12856698
申请日：2010-08-16
申请人： Hee-seok Eun , Jong-han Kim , Jae-hong Kim , Dong-hyuk Chae , Seung-hwan Song , Han-woong Yoo , Jun-jin Kong , Young-hwan Lee , Kyoung-lae Cho , Yong-june Kim
发明人： Hee-seok Eun , Jong-han Kim , Jae-hong Kim , Dong-hyuk Chae , Seung-hwan Song , Han-woong Yoo , Jun-jin Kong , Young-hwan Lee , Kyoung-lae Cho , Yong-june Kim
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C11/5642
摘要： The flash memory device includes a control logic circuit and a bit level conversion logic circuit. The control logic circuit programs first through Nth bits of data in a memory cell array of the N-bit MLC flash memory device or reads the first through Nth bits of the data from the memory cell array in response to one of a program command and a read command. The bit level conversion control logic circuit, after the first through Nth bits of the data are completely programmed or read, programs or reads an (N+1)th bit of the data in response to a control signal. The bit level conversion control logic circuit converts voltage levels of voltages, which are used for programming or reading the first through Nth bits of the data, to program or read for 2N cell distributions of 2N+1 cell distributions corresponding to the (N+1)th bit of the data and then programs or reads for other 2N cell distributions.
摘要翻译：闪存器件包括控制逻辑电路和位电平转换逻辑电路。控制逻辑电路对N位MLC闪速存储器件的存储单元阵列中的第一至第N位数据进行编程，或响应于程序命令和程序命令之一从存储单元阵列中读取数据的第一至第N位读命令。在数据的第一至第N位被完全编程或读取之后，位电平转换控制逻辑电路响应于控制信号编程或读取数据的第（N + 1）位。位电平转换控制逻辑电路转换用于编程或读取数据的第一至第N位的电压电平，以对与第（N + 1）个对应的2N + 1个单元分布的2N个单元分布进行编程或读取）位，然后编程或读取其他2N个单元分布。

2. 发明授权

US08856621B2 Memory controller for nonvolatile memory device, memory system comprising memory controller, and related methods of operation 有权
标题翻译：用于非易失性存储器件的存储器控制器，包括存储器控制器的存储器系统以及相关的操作
公开(公告)号：US08856621B2
公开(公告)日：2014-10-07
申请号：US13606188
申请日：2012-09-07
申请人： Hee Seok Eun , Jae Hong Kim , Hyung Joon Park , Young Kwang Yoo
发明人： Hee Seok Eun , Jae Hong Kim , Hyung Joon Park , Young Kwang Yoo
IPC分类号： G11C29/00 , G11C11/34 , G06F11/10
CPC分类号： G06F11/1072
摘要： A nonvolatile memory device comprises a memory controller having a memory cell status estimator that generates status estimation information indicating the status of a memory cell based on status register data, a coupling group index selector configured to generate a select signal for selecting a page and coupling group index from the status estimation information, and a memory cell status value generator configured to map the status estimation information to the data reliability decision bits and the coupling group index and generate a status value of the memory cell for error correction code decoding.
摘要翻译：非易失性存储器件包括存储器控制器，其具有存储单元状态估计器，其基于状态寄存器数据产生指示存储器单元的状态的状态估计信息;耦合组索引选择器，被配置为生成用于选择页面的选择信号和耦合组以及存储单元状态值生成器，被配置为将状态估计信息映射到数据可靠性判定位和耦合组索引，并且生成用于纠错码解码的存储单元的状态值。

3. 发明授权

US08547752B2 Method of reading data in non-volatile memory device, and device thereof 失效
标题翻译：在非易失性存储装置中读取数据的方法及其装置
公开(公告)号：US08547752B2
公开(公告)日：2013-10-01
申请号：US13198750
申请日：2011-08-05
申请人： Hee Seok Eun , Jae Hong Kim , Kyoung Lae Cho
发明人： Hee Seok Eun , Jae Hong Kim , Kyoung Lae Cho
IPC分类号： G11C11/34
CPC分类号： G11C11/5628 , G11C16/26 , G11C16/3418
摘要： A method of reading data in a non-volatile memory device. The method includes reading a plurality of memory cells of a first page in a memory cell array using a first read level, reading a plurality of memory cells of a second page adjacent to the memory cells of the first page using a second read level, determining whether a state of each memory cell of the first page has been changed based on the first read level to verify a threshold voltage of each memory cell of the second page based on the second read level, and revising the state of each memory cell of the second page according to a result of the determination.
摘要翻译：一种在非易失性存储器件中读取数据的方法。该方法包括使用第一读取级别读取存储单元阵列中的第一页的多个存储单元，使用第二读取级别读取与第一页的存储单元相邻的第二页的多个存储单元，确定基于第一读取电平来改变第一页面的每个存储器单元的状态，以基于第二读取电平来验证第二页的每个存储单元的阈值电压，并且修改第二页的每个存储器单元的状态第二页根据确定的结果。

4. 发明申请

US20130124944A1 MEMORY CONTROLLER FOR NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM COMPRISING MEMORY CONTROLLER, AND RELATED METHODS OF OPERATION 有权
标题翻译：用于非易失性存储器件的存储器控制器，包含存储器控制器的存储器系统及其相关操作方法
公开(公告)号：US20130124944A1
公开(公告)日：2013-05-16
申请号：US13606188
申请日：2012-09-07
申请人： Hee Seok EUN , Jae Hong KIM , Hyung Joon PARK , Young Kwang YOO
发明人： Hee Seok EUN , Jae Hong KIM , Hyung Joon PARK , Young Kwang YOO
IPC分类号： H03M13/05 , G06F11/10 , G06F12/00
CPC分类号： G06F11/1072
摘要： A nonvolatile memory device comprises a memory controller having a memory cell status estimator that generates status estimation information indicating the status of a memory cell based on status register data, a coupling group index selector configured to generate a select signal for selecting a page and coupling group index from the status estimation information, and a memory cell status value generator configured to map the status estimation information to the data reliability decision bits and the coupling group index and generate a status value of the memory cell for error correction code decoding.
摘要翻译：非易失性存储器件包括存储器控制器，其具有存储单元状态估计器，其基于状态寄存器数据产生指示存储器单元的状态的状态估计信息;耦合组索引选择器，被配置为生成用于选择页面的选择信号和耦合组以及存储单元状态值生成器，被配置为将状态估计信息映射到数据可靠性判定位和耦合组索引，并且生成用于纠错码解码的存储单元的状态值。

5. 发明授权

US08391076B2 Nonvolatile memory device using interleaving technology and programming method thereof 有权
标题翻译：使用交错技术的非易失性存储器件及其编程方法
公开(公告)号：US08391076B2
公开(公告)日：2013-03-05
申请号：US13040626
申请日：2011-03-04
申请人： Hee Seok Eun , Yong June Kim
发明人： Hee Seok Eun , Yong June Kim
IPC分类号： G11C16/04
CPC分类号： G11C16/10
摘要： A nonvolatile memory device using interleaving technology is provided. The nonvolatile memory device includes a first controller configured to allocate one of 2N threshold voltage states to N-bit data where N is 2 or a natural number greater than 2, a second controller configured to set a difference between adjacent threshold voltage states among the 2N threshold voltage states so that the difference increases as a threshold voltage increases, and a programming unit configured to form a threshold voltage distribution state corresponding to the allocated threshold voltage state and to program the N-bit data to a multi-level cell. The second controller controls the difference between the adjacent threshold voltage states to equalize the number of read errors for all intersections among the 2N threshold voltage states at the end of life.
摘要翻译：提供了一种使用交错技术的非易失性存储器件。非易失性存储器件包括：第一控制器，被配置为将2N个阈值电压状态中的一个分配给N为2或大于2的自然数的N位数据;第二控制器，被配置为将2N的阈值电压状态之间的差设定为2N 阈值电压状态使得差异随阈值电压增加而增加，并且编程单元被配置为形成与所分配的阈值电压状态相对应的阈值电压分布状态，并将N位数据编程到多电平单元。第二控制器控制相邻阈值电压状态之间的差异，以平衡在寿命结束时的2N个阈值电压状态之间的所有交点的读取误差的数量。

6. 发明申请

US20120033502A1 METHOD OF READING DATA IN NON-VOLATILE MEMORY DEVICE, AND DEVICE THEREOF 失效
标题翻译：在非易失性存储器件中读取数据的方法及其装置
公开(公告)号：US20120033502A1
公开(公告)日：2012-02-09
申请号：US13198750
申请日：2011-08-05
申请人： Hee Seok EUN , Jae Hong Kim , Kyoung Lae Cho
发明人： Hee Seok EUN , Jae Hong Kim , Kyoung Lae Cho
IPC分类号： G11C16/26 , G11C16/06
CPC分类号： G11C11/5628 , G11C16/26 , G11C16/3418
摘要： A method of reading data in a non-volatile memory device. The method includes reading a plurality of memory cells of a first page in a memory cell array using a first read level, reading a plurality of memory cells of a second page adjacent to the memory cells of the first page using a second read level, determining whether a state of each memory cell of the first page has been changed based on the first read level to verify a threshold voltage of each memory cell of the second page based on the second read level, and revising the state of each memory cell of the second page according to a result of the determination.
摘要翻译：一种在非易失性存储器件中读取数据的方法。该方法包括使用第一读取级别读取存储单元阵列中的第一页的多个存储单元，使用第二读取级别读取与第一页的存储单元相邻的第二页的多个存储单元，确定基于第一读取电平来改变第一页面的每个存储器单元的状态，以基于第二读取电平来验证第二页的每个存储单元的阈值电压，并且修改第二页的每个存储器单元的状态第二页根据确定的结果。

7. 发明申请

US20110289278A1 METHOD OF ESTIMATING READ LEVEL FOR A MEMORY DEVICE, MEMORY CONTROLLER THEREFOR, AND RECORDING MEDIUM 失效
标题翻译：对存储器件的读取电平进行估计的方法，其存储器控制器和记录介质
公开(公告)号：US20110289278A1
公开(公告)日：2011-11-24
申请号：US13114337
申请日：2011-05-24
申请人： Hee Seok EUN , Hong Rak Son , Jong Ha Kim , Young June Kim , Seong Hyeog Choi
发明人： Hee Seok EUN , Hong Rak Son , Jong Ha Kim , Young June Kim , Seong Hyeog Choi
IPC分类号： G06F12/08
CPC分类号： G11C11/5642 , G06F12/0246 , G06F2212/7209 , G11C16/3404 , G11C16/349
摘要： A method of estimating a read level for a memory device includes calculating first information corresponding to at least one among information about the number of cells having a particular logic level in data to be programmed and information about the number of cells having a particular cell state and storing the first information during a program operation; reading the data based on a threshold level that has been set and calculating second information about the number of cells in at least one state defined by the threshold level with respect to the read data; calculating third information about the number of cells in the at least one state, which corresponds to the second information, using a probability based on the first information; comparing the second information with the third information; and determining whether to change the threshold level according to the comparison result.
摘要翻译：一种估计存储器件的读取电平的方法包括：计算对应于关于要编程的数据中具有特定逻辑电平的单元的数量的信息中的至少一个的信息的第一信息以及关于具有特定单元状态的单元的数量的信息，以及在程序操作期间存储第一信息; 基于已经设置的阈值水平读取数据，并且相对于读取的数据计算关于由阈值水平定义的至少一个状态中的单元数量的第二信息; 使用基于所述第一信息的概率来计算与所述第二信息对应的所述至少一个状态下的小区的数量的第三信息; 将第二信息与第三信息进行比较; 以及根据比较结果确定是否改变阈值水平。

8. 发明申请

US20110216590A1 NONVOLATILE MEMORY DEVICE USING INTERLEAVING TECHNOLOGY AND PROGRAMMMING METHOD THEREOF 有权
标题翻译：使用交互技术的非易失性存储器件及其编程方法
公开(公告)号：US20110216590A1
公开(公告)日：2011-09-08
申请号：US13040626
申请日：2011-03-04
申请人： Hee Seok EUN , Yong June KIM
发明人： Hee Seok EUN , Yong June KIM
IPC分类号： G11C16/10
CPC分类号： G11C16/10
摘要： A nonvolatile memory device using interleaving technology is provided. The nonvolatile memory device includes a first controller configured to allocate one of 2N threshold voltage states to N-bit data where N is 2 or a natural number greater than 2, a second controller configured to set a difference between adjacent threshold voltage states among the 2N threshold voltage states so that the difference increases as a threshold voltage increases, and a programming unit configured to form a threshold voltage distribution state corresponding to the allocated threshold voltage state and to program the N-bit data to a multi-level cell. The second controller controls the difference between the adjacent threshold voltage states to equalize the number of read errors for all intersections among the 2N threshold voltage states at the end of life.
摘要翻译：提供了一种使用交错技术的非易失性存储器件。非易失性存储器件包括：第一控制器，被配置为将2N个阈值电压状态中的一个分配给N为2或大于2的自然数的N位数据;第二控制器，被配置为将2N的阈值电压状态之间的差设定为2N 阈值电压状态使得差异随阈值电压增加而增加，并且编程单元被配置为形成与所分配的阈值电压状态相对应的阈值电压分布状态，并将N位数据编程到多电平单元。第二控制器控制相邻阈值电压状态之间的差异，以平衡在寿命结束时的2N个阈值电压状态之间的所有交点的读取误差的数量。

9. 发明申请

US20110007563A1 NONVOLATILE MEMORY DEVICE, SYSTEM, AND RELATED METHODS OF OPERATION 有权
标题翻译：非易失性存储器件，系统及相关操作方法
公开(公告)号：US20110007563A1
公开(公告)日：2011-01-13
申请号：US12797668
申请日：2010-06-10
申请人： Han Woong YOO , Seung-Hwan SONG , Hee seok EUN , Jun jin KONG
发明人： Han Woong YOO , Seung-Hwan SONG , Hee seok EUN , Jun jin KONG
IPC分类号： G11C16/04
CPC分类号： G11C16/34 , G11C11/5642
摘要： A method of reading a nonvolatile memory device comprises measuring threshold voltage distributions of a plurality of memory cells, combining the measured threshold voltage distributions, and determining local minimum points in the combined threshold voltage distributions to determine read voltages for a predetermined group of memory cells.
摘要翻译：读取非易失性存储器件的方法包括测量多个存储器单元的阈值电压分布，组合测量的阈值电压分布，以及确定组合阈值电压分布中的局部最小点，以确定预定组的存储器单元的读取电压。

10. 发明申请

US20130070526A1 FLASH MEMORY AND READING METHOD OF FLASH MEMORY 有权
标题翻译：闪速存储器的闪存和读取方法
公开(公告)号：US20130070526A1
公开(公告)日：2013-03-21
申请号：US13618336
申请日：2012-09-14
申请人： Hee-seok Eun , Sang-hoon Lee , Jae-hong Kim , Sun-mi Yoo , Seok-min Yoon , Jong-youl Lee
发明人： Hee-seok Eun , Sang-hoon Lee , Jae-hong Kim , Sun-mi Yoo , Seok-min Yoon , Jong-youl Lee
IPC分类号： G11C16/26
CPC分类号： G11C16/26 , G11C11/5642 , G11C16/3436 , G11C16/349
摘要： A reading method of a flash memory, the reading method including: sensing hard data of a first target page by using a first hard read voltage; and generating soft data of the first target page by using at least one pair of, that is, two, first soft read voltages whose voltage levels are different from a voltage level of the first hard read voltage, while the flash memory performs a first operation on the hard data.
摘要翻译：一种闪存的读取方法，所述读取方法包括：通过使用第一硬读取电压来感测第一目标页面的硬数据; 以及通过使用电压电平不同于第一硬读取电压的电压电平的至少一对，即两个第一软读取电压来产生第一目标页面的软数据，而闪存执行第一操作对硬数据。

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