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    • 5. 发明申请
    • MANUFACTURING METHOD OF PACKAGE CARRIER
    • 包装载体的制造方法
    • US20150068034A1
    • 2015-03-12
    • US14547147
    • 2014-11-19
    • Shih-Hao Sun
    • Shih-Hao Sun
    • H05K3/42H01L21/48
    • H05K3/42H01L21/447H01L21/486H01L23/49827H01L33/642H01L2224/16225H01L2224/16227H01L2924/00014H01L2924/15311Y10T29/49165H01L2224/0401
    • A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.
    • 提供了一种封装载体的制造方法。 提供了具有上表面,下表面,位于下表面的多个空腔和穿过绝缘基板并分别与空腔连通的多个通孔的绝缘基板。 多个通孔由腔和通孔限定。 填充通孔的导电材料形成为限定多个导电柱。 在上表面上形成有从上表面延伸到导电柱的顶表面和多个盲孔的绝缘层。 填充盲孔的图案化电路层形成在顶表面上,连接到导电柱并暴露顶表面的一部分。 在图案化电路层上形成焊料掩模层,并且具有暴露图案化电路层的一部分以限定多个焊盘的多个开口。
    • 8. 发明申请
    • MANUFACTURING METHOD OF PACKAGE STRUCTURE
    • 包装结构的制造方法
    • US20140317907A1
    • 2014-10-30
    • US14324232
    • 2014-07-06
    • Shih-Hao Sun
    • Shih-Hao Sun
    • H05K13/00
    • H05K13/00H01L23/13H01L23/5389H01L24/19H01L24/20H01L2224/16225H01L2224/16227H01L2924/12041H01L2924/15788H05K1/0207H05K1/185Y10T29/49002Y10T29/49126Y10T29/49146H01L2924/00
    • A manufacturing method of a package structure is provided. A substrate having an upper surface and a lower surface opposite to each other and an opening communicating the surfaces is provided. An electronic device is configured in the opening. An adhesive layer and a patterned metal layer located on the adhesive layer are laminated on the lower surface and expose a bottom surface of the electronic device. A heat-dissipating column is formed on the bottom surface exposed by the adhesive layer and the patterned metal layer and connects the patterned metal layer and the bottom surface. A first and a second laminated structures are laminated on the upper surface of the substrate and the patterned metal layer, respectively. The first laminated structure covers the upper surface of the substrate and a top surface of the electronic device. The second laminated structure covers the heat-dissipating column and the patterned metal layer.
    • 提供一种封装结构的制造方法。 提供具有彼此相对的上表面和下表面的基板以及连通表面的开口。 电子设备配置在开口中。 位于粘合剂层上的粘合剂层和图案化的金属层层压在下表面上并暴露电子器件的底表面。 在由粘合层和图案化金属层露出的底面上形成散热柱,并连接图案化的金属层和底面。 第一和第二层压结构分别层叠在基板的上表面和图案化的金属层上。 第一层压结构覆盖基板的上表面和电子设备的顶表面。 第二层压结构覆盖散热柱和图案化的金属层。
    • 9. 发明授权
    • Method of manufacturing package structure
    • 制造包装结构的方法
    • US08669142B2
    • 2014-03-11
    • US13906355
    • 2013-05-31
    • Shih-Hao Sun
    • Shih-Hao Sun
    • H01L21/56
    • H01L21/56H01L33/486H01L33/641H01L33/642H01L2224/48091H01L2224/48247H01L2924/3025H01L2924/00014H01L2924/00
    • A manufacturing method of a package structure is provided. A seed layer is formed on a upper surface of a metal substrate. A patterned dry film layer is formed on a lower surface of the metal substrate and the seed layer. A portion of the seed layer is exposed by the patterned dry film layer. The patterned dry film layer is used as an electroplating mask to electroplate a circuit layer on the portion of the seed layer exposed by the patterned dry film layer. A chip is bonded to and electrically connected to the circuit layer. A molding compound is formed on the metal substrate. The molding compound encapsulates the chip, the circuit layer and the portion of the seed layer. A portion of the metal substrate and a portion of the seed layer are removed so as to expose a portion of the molding compound.
    • 提供一种封装结构的制造方法。 种子层形成在金属基板的上表面上。 在金属基板的下表面和种子层上形成图案化的干膜层。 种子层的一部分被图案化的干膜层曝光。 图案化的干膜层用作电镀掩模,以在由图案化的干膜层暴露的种子层的部分上电镀电路层。 芯片被接合并电连接到电路层。 在金属基材上形成模塑料。 模塑料封装芯片,电路层和种子层的部分。 去除金属基材的一部分和种子层的一部分,以暴露部分模塑料。
    • 10. 发明申请
    • PACKAGE CARRIER AND MANUFACTURING METHOD THEREOF
    • 包装及其制造方法
    • US20140041922A1
    • 2014-02-13
    • US13615698
    • 2012-09-14
    • Shih-Hao Sun
    • Shih-Hao Sun
    • H05K1/11H05K3/42
    • H05K3/42H01L21/447H01L21/486H01L23/49827H01L33/642H01L2224/16225H01L2224/16227H01L2924/00014H01L2924/15311Y10T29/49165H01L2224/0401
    • A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.
    • 提供了一种封装载体的制造方法。 提供了具有上表面,下表面,位于下表面的多个空腔和穿过绝缘基板并分别与空腔连通的多个通孔的绝缘基板。 多个通孔由腔和通孔限定。 填充通孔的导电材料形成为限定多个导电柱。 在上表面上形成有从上表面延伸到导电柱的顶表面和多个盲孔的绝缘层。 填充盲孔的图案化电路层形成在顶表面上,连接到导电柱并暴露顶表面的一部分。 在图案化电路层上形成焊料掩模层,并且具有暴露图案化电路层的一部分以限定多个焊盘的多个开口。