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1. 发明授权

US07666745B2 Method of manufacturing a semiconductor device and a semiconductor device 失效
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US07666745B2
公开(公告)日：2010-02-23
申请号：US12054684
申请日：2008-03-25
申请人： Hajime Kurata
发明人： Hajime Kurata
IPC分类号： H01L21/336
CPC分类号： H01L29/7835 , H01L29/0692 , H01L29/41783 , H01L29/456 , H01L29/4933 , H01L29/665 , H01L29/66659
摘要： A method of manufacturing a semiconductor device, has forming a gate insulating film over a surface of a substrate, eliminating a portion of the gate insulating film in a region, forming a gate electrode over the gate insulating film and a drain electrode on the region, implanting first impurities into the substrate using the gate electrode and the drain electrode as a mask, forming an insulating film to fill the space between the gate electrode and the drain electrode, and implanting second impurities into the substrate to form a source region using the gate electrode, the drain electrode and the insulating film as a mask.
摘要翻译：一种制造半导体器件的方法，在衬底的表面上形成栅极绝缘膜，在区域上消除栅极绝缘膜的一部分，在栅极绝缘膜上形成栅电极和在该区域上形成漏电极，使用栅电极和漏电极作为掩模将第一杂质注入到衬底中，形成绝缘膜以填充栅电极和漏电极之间的空间，以及将第二杂质注入到衬底中，以使用栅极电极，漏电极和绝缘膜作为掩模。

2. 发明申请

US20080237739A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US20080237739A1
公开(公告)日：2008-10-02
申请号：US12054684
申请日：2008-03-25
申请人： Hajime KURATA
发明人： Hajime KURATA
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7835 , H01L29/0692 , H01L29/41783 , H01L29/456 , H01L29/4933 , H01L29/665 , H01L29/66659
摘要： A method of manufacturing a semiconductor device, has forming a gate insulating film over a surface of a substrate, eliminating a portion of the gate insulating film in a region, forming a gate electrode over the gate insulating film and a drain electrode on the region, implanting first impurities into the substrate using the gate electrode and the drain electrode as a mask, forming an insulating film to fill the space between the gate electrode and the drain electrode, and implanting second impurities into the substrate to form a source region using the gate electrode, the drain electrode and the insulating film as a mask.
摘要翻译：一种制造半导体器件的方法，在衬底的表面上形成栅极绝缘膜，在区域上消除栅极绝缘膜的一部分，在栅极绝缘膜上形成栅电极和在该区域上形成漏电极，使用栅电极和漏电极作为掩模将第一杂质注入到衬底中，形成绝缘膜以填充栅电极和漏电极之间的空间，以及将第二杂质注入到衬底中，以使用栅极电极，漏电极和绝缘膜作为掩模。

3. 发明授权

US08138550B2 Method of manufacturing a semiconductor device and a semiconductor device 有权
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US08138550B2
公开(公告)日：2012-03-20
申请号：US12652836
申请日：2010-01-06
申请人： Hajime Kurata
发明人： Hajime Kurata
IPC分类号： H01L23/62
CPC分类号： H01L29/7835 , H01L29/0692 , H01L29/41783 , H01L29/456 , H01L29/4933 , H01L29/665 , H01L29/66659
摘要： A method of manufacturing a semiconductor device, has forming a gate insulating film over a surface of a substrate, eliminating a portion of the gate insulating film in a region, forming a gate electrode over the gate insulating film and a drain electrode on the region, implanting first impurities into the substrate using the gate electrode and the drain electrode as a mask, forming an insulating film to fill the space between the gate electrode and the drain electrode, and implanting second impurities into the substrate to form a source region using the gate electrode, the drain electrode and the insulating film as a mask.
摘要翻译：一种制造半导体器件的方法，在衬底的表面上形成栅极绝缘膜，在区域上消除栅极绝缘膜的一部分，在栅极绝缘膜上形成栅电极和在该区域上形成漏电极，使用栅电极和漏电极作为掩模将第一杂质注入到衬底中，形成绝缘膜以填充栅电极和漏电极之间的空间，以及将第二杂质注入到衬底中，以使用栅极电极，漏电极和绝缘膜作为掩模。

4. 发明授权

US07642840B2 Reference voltage generator circuit 有权
标题翻译：参考电压发生器电路
公开(公告)号：US07642840B2
公开(公告)日：2010-01-05
申请号：US11892209
申请日：2007-08-21
申请人： Hajime Kurata , Kunihiko Gotoh
发明人： Hajime Kurata , Kunihiko Gotoh
IPC分类号： G05F3/02
CPC分类号： G05F3/30
摘要： A reference voltage generator circuit is provided which is capable of stable generation of a reference voltage. A differential amplifier circuit has a non-inverting input terminal input with the voltage Vbe1 generated by a PNP transistor Q1 and an inverting input terminal input with an output signal thereof. A differential amplifier circuit has a non-inverting input terminal input with the voltage Vbe2 generated by a PNP transistor Q2 and an inverting input terminal input with the output signal of the differential amplifier circuit through a resistor R1 and also input with an output signal thereof through a resistor R2, to generate a reference voltage Vref.
摘要翻译：提供了能够稳定地产生参考电压的参考电压发生器电路。差分放大器电路具有非PN输入端，输入端由PNP晶体管Q1产生的电压Vbe1和输出信号的反相输入端。差分放大器电路具有非PN输入端子输入，其中由PNP晶体管Q2产生的电压Vbe2和通过电阻器R1输入差分放大器电路的输出信号的反相输入端子，并输入其输出信号通过电阻器R2，以产生参考电压Vref。

5. 发明授权

US06624483B2 Semiconductor device having an insulated gate and a fabrication process thereof 有权
公开(公告)号：US06624483B2
公开(公告)日：2003-09-23
申请号：US09818651
申请日：2001-03-28
申请人： Hajime Kurata
发明人： Hajime Kurata
IPC分类号： H01L2976
CPC分类号： H01L29/665 , H01L21/2807 , H01L21/28114 , H01L29/42376
摘要： A semiconductor device includes a T-shaped gate on a gate insulation film, wherein the T-shaped gate includes a lower polycrystal layer containing Si and Ge and an upper polycrystal layer of polysilicon.

6. 发明申请

US20090041533A1 JOINT 失效
标题翻译：联合
公开(公告)号：US20090041533A1
公开(公告)日：2009-02-12
申请号：US10575094
申请日：2005-04-06
申请人： Nobuo Domyo , Hajime Kurata , Shogo Ota
发明人： Nobuo Domyo , Hajime Kurata , Shogo Ota
IPC分类号： F16L37/28
CPC分类号： F16L29/02 , F16L15/08 , Y10T403/22
摘要： A joint for bringing into communication a first fluid passageway and a second fluid passageway of a nut member includes a push rod and a main body. The main body forms a push rod storage space, a communication path, a seal structure forming part and a male thread part. The push rod storage space houses the push rod so that one part of the push rod protrudes along a push rod longitudinal direction. The seal structure forming part is capable of forming a seal structure by contacting a first tapered part of the nut member. The male thread part is capable of screwing together with a female thread part of the nut member such that the seal structure forming part contacts the first tapered part. The part of the portion of the push rod contacts one part of the nut member.
摘要翻译：用于使第一流体通道和螺母构件的第二流体通道连通的接头包括推杆和主体。主体形成推杆存储空间，连通路径，密封结构形成部和阳螺纹部。推杆存储空间容纳推杆，使得推杆的一部分沿着推杆纵向方向突出。密封结构形成部件能够通过使螺母构件的第一锥形部接触而形成密封结构。外螺纹部分能够与螺母构件的阴螺纹部分一起旋拧，使得密封结构形成部分接触第一锥形部分。推杆部分的一部分接触螺母构件的一部分。

7. 发明申请

US20070045652A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20070045652A1
公开(公告)日：2007-03-01
申请号：US11362182
申请日：2006-02-27
申请人： Hajime Kurata , Kunihiko Gotoh
发明人： Hajime Kurata , Kunihiko Gotoh
IPC分类号： H01L33/00
CPC分类号： H01L27/0688 , H01L27/0802 , H01L27/0805 , H01L28/20 , H01L28/55 , H01L28/65
摘要： A semiconductor device is provided that includes a semiconductor substrate, a first resistance element on a semiconductor substrate, a capacitance element over the first resistance element, and an insulating layer between the first resistance element and the capacitance element.
摘要翻译：提供一种半导体器件，其包括半导体衬底，半导体衬底上的第一电阻元件，第一电阻元件上的电容元件以及第一电阻元件和电容元件之间的绝缘层。

8. 发明申请

US20120119299A1 SEMICONDUCTOR DEVICE MANUFACTURE METHOD AND SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件制造方法和半导体器件
公开(公告)号：US20120119299A1
公开(公告)日：2012-05-17
申请号：US13207931
申请日：2011-08-11
申请人： Kenzo IIZUKA , Hajime KURATA
发明人： Kenzo IIZUKA , Hajime KURATA
IPC分类号： H01L27/088 , H01L21/8238
CPC分类号： H01L27/088 , H01L21/823456 , H01L21/823462 , H01L21/823468
摘要： A semiconductor device manufacturing method includes: forming a first active region and a second active region in a semiconductor substrate; forming a first gate insulating film on the first active region and a second gate insulating film thinner than the first gate insulating film on the second active region by using material containing silicon oxide; forming first and second gate electrodes on the first and second gate insulating films respectively; forming an insulating film on the semiconductor substrate, and anisotropically etching the insulating film to leave first side wall insulating films on side walls of the first and second gate electrodes; removing the first side wall insulating film on the first gate electrode; and after removing the first side wall insulating film on the first gate electrode, thermally treating in an oxidizing atmosphere the semiconductor substrate to form a second side wall insulating film on the first gate electrode.
摘要翻译：半导体器件制造方法包括：在半导体衬底中形成第一有源区和第二有源区; 通过使用含有氧化硅的材料，在第一有源区上形成第一栅极绝缘膜和比第二有源区上的第一栅极绝缘膜更薄的第二栅极绝缘膜; 分别在第一和第二栅极绝缘膜上形成第一和第二栅电极; 在所述半导体衬底上形成绝缘膜，并且各向异性地蚀刻所述绝缘膜以在所述第一和第二栅电极的侧壁上留下第一侧壁绝缘膜; 去除第一栅电极上的第一侧壁绝缘膜; 并且在去除第一栅电极上的第一侧壁绝缘膜之后，在氧化气氛中对半导体衬底进行热处理，以在第一栅电极上形成第二侧壁绝缘膜。

9. 发明申请

US20070290669A1 Reference voltage generator circuit 有权
标题翻译：参考电压发生器电路
公开(公告)号：US20070290669A1
公开(公告)日：2007-12-20
申请号：US11892209
申请日：2007-08-21
申请人： Hajime Kurata , Kunihiko Gotoh
发明人： Hajime Kurata , Kunihiko Gotoh
IPC分类号： G05F3/20
CPC分类号： G05F3/30
摘要： A reference voltage generator circuit is provided which is capable of stable generation of a reference voltage. A differential amplifier circuit has a non-inverting input terminal input with the voltage Vbe1 generated by a PNP transistor Q1 and an inverting input terminal input with an output signal thereof. A differential amplifier circuit has a non-inverting input terminal input with the voltage Vbe2 generated by a PNP transistor Q2 and an inverting input terminal input with the output signal of the differential amplifier circuit through a resistor R1 and also input with an output signal thereof through a resistor R2, to generate a reference voltage Vref.
摘要翻译：提供了能够稳定地产生参考电压的参考电压发生器电路。差分放大器电路具有由PNP晶体管Q 1产生的电压Vbe 1和其输出信号输入的反相输入端子的非反相输入端子输入。差分放大器电路具有非PN反相输入端子，其中由PNP晶体管Q 2产生的电压Vbe 2和通过电阻器R 1输入差分放大器电路的输出信号的反相输入端子，并输入一个输出端信号通过电阻器R 2产生参考电压Vref。

10. 发明授权

US06800536B2 Semiconductor device having an insulated gate and a fabrication process thereof 有权
标题翻译：具有绝缘栅的半导体器件及其制造方法
公开(公告)号：US06800536B2
公开(公告)日：2004-10-05
申请号：US10442224
申请日：2003-05-21
申请人： Hajime Kurata
发明人： Hajime Kurata
IPC分类号： H01L2120
CPC分类号： H01L29/665 , H01L21/2807 , H01L21/28114 , H01L29/42376
摘要： A semiconductor device includes a T-shaped gate on a gate insulation film, wherein the T-shaped gate includes a lower polycrystal layer containing Si and Ge and an upper polycrystal layer of polysilicon.
摘要翻译：半导体器件包括栅极绝缘膜上的T形栅极，其中T形栅极包括含有Si和Ge的下多晶层和多晶硅的上多晶层。

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