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1. 发明申请

US20160036786A1 SYSTEM AND METHOD FACILITATING ENHANCED INTER-OBJECT AND HUMAN-OBJECT INTERACTIVITY USING NETWORKED ELECTRONIC DEVICES 审中-公开
标题翻译：使用网络电子设备的加强对象和人对象交互的系统和方法
公开(公告)号：US20160036786A1
公开(公告)日：2016-02-04
申请号：US14816067
申请日：2015-08-03
申请人： HARDIK PRAKASH GANDHI
发明人： HARDIK PRAKASH GANDHI
IPC分类号： H04L29/06 , H04L29/08
CPC分类号： H04W12/06 , H04L67/12 , H04W12/00512
摘要： Embodiments of the present invention disclose a method for facilitating enhanced inter-object and human-object interactivity using networked electronic devices. The method comprises providing one or more passive and active objects, generating and assigning a unique, encrypted and network-based Identification (ID) code corresponding to each of the one or more passive and active objects, custom designing a physical object Identification (ID) tag corresponding to each of the one or more passive and active objects, coupling the generated unique, encrypted and network-based Identification (ID) code with the physical object Identification (ID) tag corresponding to each of the one or more passive and active objects, retrofitting the physical object Identification (ID) tag to each of the one or more passive and active objects, providing a network for facilitating inter-object interactions and human interactions therewith, and interacting with the one or more passive and active objects retrofitted with the custom designed physical object Identification (ID) tags using one or more of at least one of portable and wearable computing and communications devices via the network, thereby facilitating realization of web of everything and anything.
摘要翻译：本发明的实施例公开了一种利用联网的电子设备促进增强的对象间和人物交互性的方法。该方法包括提供一个或多个被动和活动对象，生成和分配对应于一个或多个被动和活动对象中的每一个的唯一的，加密的和基于网络的识别（ID）代码，定制设计物理对象标识（ID）标签对应于一个或多个被动和活动对象中的每一个，将所生成的唯一，加密和基于网络的标识（ID）代码与对应于一个或多个被动和活动对象中的每一个的物理对象标识（ID）标签相耦合将物理对象识别（ID）标签改装到一个或多个被动和活动对象中的每一个上，提供用于促进对象间交互和与人之间的交互的网络，以及与一个或多个被动和活动对象交互使用便携式和可穿戴式计算机和通信设备中的至少一种中的一种或多种的定制设计的物理对象识别（ID）标签通过网络，从而有助于实现网络的一切和任何东西。

2. 发明授权

US08306149B2 Systems and methods of power amplifier digital pre-distortion 有权
标题翻译：功率放大器数字预失真的系统和方法
公开(公告)号：US08306149B2
公开(公告)日：2012-11-06
申请号：US12571435
申请日：2009-10-01
申请人： Fernando Alberto Mujica , Hardik Prakash Gandhi , Lei Ding , Milind Borkar , Zigang Yang , Roland Sperlich , Lars Morten Jorgensen , William L. Abbott
发明人： Fernando Alberto Mujica , Hardik Prakash Gandhi , Lei Ding , Milind Borkar , Zigang Yang , Roland Sperlich , Lars Morten Jorgensen , William L. Abbott
IPC分类号： H04L25/03 , H04L25/49
CPC分类号： H03F1/3258 , H03F1/3247 , H03F1/3294 , H03F3/195 , H03F3/24 , H03F2200/336 , H04L27/368
摘要： An apparatus is provided. In the apparatus, an input to index (I2I) module maps a complex input into a real signal. A real data tap delay line is coupled to the I2I module and includes N delay-elements. A complex data tap delay line is configured to receive the complex input and includes M delay elements. A set of K of non-linear function modules is also provided. Each non-linear function module from the set has at least one real input, at least one complex input, and at least one complex output. A configurable connectivity crossbar multiplexer couples K of the N real tap delay line elements to real inputs of the set non-linear functions and couples K of the M complex tap delay line elements to complex inputs of the set non-linear function modules.
摘要翻译：提供了一种装置。在该装置中，索引（I2I）模块的输入将复数输入映射到实际信号中。实际数据抽头延迟线耦合到I2I模块并且包括N个延迟元件。复数据抽头延迟线被配置为接收复合输入并且包括M个延迟元件。还提供了一组K个非线性功能模块。来自该组的每个非线性功能模块具有至少一个实际输入，至少一个复合输入和至少一个复合输出。可配置连接交叉开关多路复用器将N个实际分接延迟线路元件的K耦合到所设置的非线性函数的实际输入端，并将M个复杂抽头延迟线路元件的K耦合到该组非线性功能模块的复合输入端。

3. 发明授权

US08265196B2 Noise injection circuit and method for signal processing 有权
标题翻译：噪声注入电路及信号处理方法
公开(公告)号：US08265196B2
公开(公告)日：2012-09-11
申请号：US12342310
申请日：2008-12-23
申请人： Hardik Prakash Gandhi
发明人： Hardik Prakash Gandhi
IPC分类号： H04K1/02
CPC分类号： H04B1/0475 , H03F1/3241 , H03F1/3247 , H03F3/24 , H03F2200/405 , H03F2200/435 , H03F2201/3233 , H04B2001/0425 , H04L27/2624
摘要： A signal processing circuit is configured to calculate a gain ratio to efficiently reduce a peak to average signal ratio for an input signal by identifying signal peaks and determining the signal peak magnitudes. A window function in combination with the gain ratio is applied to a portion of the input stream having a peak signal to create a cancellation pulse to be applied to that peak signal. The cancellation pulse phase is aligned with the signal phase, thereby causing minimal phase distortion in the resultant output signal and accurate peak cancellation. The cancellation pulse can also include a finite impulse response filter portion to efficiently handle wide bandwidth signals. The hardware may be configured to process multiple signal streams in parallel to reduce hardware requirements. An algorithm can determine the effect of multiple corrections to the input stream to avoid overcorrection in the signal processing process.
摘要翻译：信号处理电路被配置为通过识别信号峰值并确定信号峰值幅度来计算增益比以有效地降低输入信号的峰值与平均信号比。将具有增益比的窗函数应用于具有峰值信号的输入流的一部分以产生要施加到该峰值信号的消除脉冲。消除脉冲相位与信号相位对准，从而在最终输出信号中产生最小的相位失真，并获得准确的峰值消除。消除脉冲还可以包括有效的脉冲响应滤波器部分，以有效地处理宽带宽信号。硬件可以被配置为并行处理多个信号流以减少硬件要求。算法可以确定多个校正对输入流的影响，以避免信号处理过程中的过度校正。

4. 发明申请

US20110080216A1 Systems and Methods of Power Amplifier Digital Pre-Distortion 有权
标题翻译：功率放大器数字预失真的系统与方法
公开(公告)号：US20110080216A1
公开(公告)日：2011-04-07
申请号：US12571435
申请日：2009-10-01
申请人： FERNANDO ALBERTO MUJICA , HARDIK PRAKASH GANDHI , LEI DING , MILIND BORKAR , ZIGANG YANG , ROLAND SPERLICH , LARS MORTEN JORGENSEN , WILLIAM L. ABBOTT
发明人： FERNANDO ALBERTO MUJICA , HARDIK PRAKASH GANDHI , LEI DING , MILIND BORKAR , ZIGANG YANG , ROLAND SPERLICH , LARS MORTEN JORGENSEN , WILLIAM L. ABBOTT
IPC分类号： H03F1/26
CPC分类号： H03F1/3258 , H03F1/3247 , H03F1/3294 , H03F3/195 , H03F3/24 , H03F2200/336 , H04L27/368
摘要： Systems and methods for power amplifier pre-distortion are provided. The systems and methods of power amplifier digital pre-distortion disclosed herein may include a generic pre-distorter architecture which can implement a variety of Volterra cross terms involving single dimension convolutions (first order dynamics). For hardware implementations, this generic pre-distorter is further fine-tuned to provide a choice between different sets of cross terms that can be selected for a given PA for optimal performance. The novel pre-distorter architecture provides flexibility to trade off memory depth for additional Volterra terms and vice versa. A further novelty is the ability to trade off both memory depth and cross terms for a higher sample rate operation, which may enable higher order non-linear pre-distortion, or support for higher signal bandwidths. A poly-phase non-linear filtering mode allows for this flexibility.
摘要翻译：提供了功率放大器预失真的系统和方法。本文公开的功率放大器数字预失真的系统和方法可以包括通用预失真器架构，其可以实现涉及单维卷积（一阶动力学）的各种Volterra交叉项。对于硬件实现，该通用预失真器进一步被微调，以提供可以为给定PA选择的不同交叉项集之间的选择，以获得最佳性能。该新颖的预失真器架构提供了灵活性，以便与额外的Volterra术语交换记忆深度，反之亦然。更进一步的新颖性是能够对较高的采样率操作进行存储深度和交叉项的权衡，这可以实现更高阶的非线性预失真或支持更高的信号带宽。多相非线性滤波模式允许这种灵活性。

5. 发明授权

US08416893B2 Systems and methods of improved power amplifier efficiency through adjustments in crest factor reduction 有权
标题翻译：通过调整波峰因数降低提高功率放大器效率的系统和方法
公开(公告)号：US08416893B2
公开(公告)日：2013-04-09
申请号：US12957278
申请日：2010-11-30
申请人： Hardik Prakash Gandhi , Zigang Yang
发明人： Hardik Prakash Gandhi , Zigang Yang
IPC分类号： H04L27/08
CPC分类号： H04L27/2623 , H03G3/3042 , H03G7/007 , H04L27/08 , H04L27/3411
摘要： Crest factor reduction algorithms described herein may be used to improve power amplifier efficiency during low signal power conditions compared to traditional static threshold techniques. Techniques described herein insure that the signal power level at the output of the crest fact reduction block is held constant relative to the input power level under all signal power level conditions. Two different solutions may be implemented together or separately to achieve the desired conditions. The first technique provides constant ratio between input power and output power. Constant ratio of peak and average output levels keeps the amount of crest factor reduction applied to the signal constant, irrespective of the signal power level. A second technique is to hold signal power level constant in respect to the amount of crest factor reduction applied.
摘要翻译：与传统的静态阈值技术相比，本文描述的波峰因数降低算法可用于在低信号功率条件下提高功率放大器效率。这里描述的技术确保峰值事实减少块的输出处的信号功率电平在所有信号功率电平条件下相对于输入功率电平保持恒定。两个不同的解决方案可以一起实施或单独实现以实现期望的条件。第一种技术提供输入功率与输出功率之间的恒定比例。峰值和平均输出电平的恒定比率保持峰值因数降低量应用于信号常数，而与信号功率电平无关。第二种技术是保持相对于施加的波峰因数降低量的信号功率电平恒定。

6. 发明申请

US20120134399A1 Systems and Methods of Improved Power Amplifier Efficiency Through Adjustments in Crest Factor Reduction 有权
标题翻译：通过调整峰值因数来改善功率放大器效率的系统和方法
公开(公告)号：US20120134399A1
公开(公告)日：2012-05-31
申请号：US12957278
申请日：2010-11-30
申请人： Hardik Prakash Gandhi , Zigang Yang
发明人： Hardik Prakash Gandhi , Zigang Yang
IPC分类号： H04L27/08 , H04B17/00
CPC分类号： H04L27/2623 , H03G3/3042 , H03G7/007 , H04L27/08 , H04L27/3411
摘要： Crest factor reduction algorithms described herein may be used to improve power amplifier efficiency during low signal power conditions compared to traditional static threshold techniques. Techniques described herein insure that the signal power level at the output of the crest fact reduction block is held constant relative to the input power level under all signal power level conditions. Two different solutions may be implemented together or separately to achieve the desired conditions. The first technique provides constant ratio between input power and output power. Constant ratio of peak and average output levels keeps the amount of crest factor reduction applied to the signal constant, irrespective of the signal power level. A second technique is to hold signal power level constant in respect to the amount of crest factor reduction applied.
摘要翻译：与传统的静态阈值技术相比，本文描述的波峰因数降低算法可用于在低信号功率条件下提高功率放大器效率。这里描述的技术确保峰值事实减少块的输出处的信号功率电平在所有信号功率电平条件下相对于输入功率电平保持恒定。两个不同的解决方案可以一起实施或单独实现以实现期望的条件。第一种技术提供输入功率与输出功率之间的恒定比例。峰值和平均输出电平的恒定比率保持峰值因数降低量应用于信号常数，而与信号功率电平无关。第二种技术是保持相对于施加的波峰因数降低量的信号功率电平恒定。

7. 发明申请

US20100158166A1 Noise Injection Circuit and Method for Signal Processing 有权
标题翻译：噪声注入电路和信号处理方法
公开(公告)号：US20100158166A1
公开(公告)日：2010-06-24
申请号：US12342310
申请日：2008-12-23
申请人： Hardik Prakash GANDHI
发明人： Hardik Prakash GANDHI
IPC分类号： H04B1/00 , H04L27/08
CPC分类号： H04B1/0475 , H03F1/3241 , H03F1/3247 , H03F3/24 , H03F2200/405 , H03F2200/435 , H03F2201/3233 , H04B2001/0425 , H04L27/2624
摘要： A signal processing circuit is configured to calculate a gain ratio to efficiently reduce a peak to average signal ratio for an input signal by identifying signal peaks and determining the signal peak magnitudes. A window function in combination with the gain ratio is applied to a portion of the input stream having a peak signal to create a cancellation pulse to be applied to that peak signal. The cancellation pulse phase is aligned with the signal phase, thereby causing minimal phase distortion in the resultant output signal and accurate peak cancellation. The cancellation pulse can also include a finite impulse response filter portion to efficiently handle wide bandwidth signals. The hardware may be configured to process multiple signal streams in parallel to reduce hardware requirements. An algorithm can determine the effect of multiple corrections to the input stream to avoid overcorrection in the signal processing process.
摘要翻译：信号处理电路被配置为通过识别信号峰值并确定信号峰值幅度来计算增益比以有效地降低输入信号的峰值与平均信号比。将具有增益比的窗函数应用于具有峰值信号的输入流的一部分以产生要施加到该峰值信号的消除脉冲。消除脉冲相位与信号相位对准，从而在最终输出信号中产生最小的相位失真，并获得准确的峰值消除。消除脉冲还可以包括有效的脉冲响应滤波器部分，以有效地处理宽带宽信号。硬件可以被配置为并行处理多个信号流以减少硬件要求。算法可以确定多个校正对输入流的影响，以避免信号处理过程中的过度校正。

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