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1. 发明申请

US20160252943A1 DYNAMICALLY UPDATING LOGICAL IDENTIFIERS OF CORES OF A PROCESSOR 有权
标题翻译：动态更新处理器的逻辑逻辑标识符
公开(公告)号：US20160252943A1
公开(公告)日：2016-09-01
申请号：US14633455
申请日：2015-02-27
申请人： Ankush Varma , Krishnakanth V. Sistla , Guy G. Sotomayor , Andrew D. Henroid , Robert E. Gough , Tod F. Schiff
发明人： Ankush Varma , Krishnakanth V. Sistla , Guy G. Sotomayor , Andrew D. Henroid , Robert E. Gough , Tod F. Schiff
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F15/00 , G06F1/206 , G06F1/26 , G06F1/3243 , G06F9/45541 , G06F9/45558 , G06F9/5077 , G06F2009/4557 , Y02D10/152 , Y02D10/16
摘要： In one embodiment, a processor includes a plurality of cores each including a first storage to store a physical identifier for the core and a second storage to store a logical identifier associated with the core; a plurality of thermal sensors to measure a temperature at a corresponding location of the processor; and a power controller including a dynamic core identifier logic to dynamically remap a first logical identifier associated with a first core to associate the first logical identifier with a second core, based at least in part on a temperature associated with the first core, the dynamic remapping to cause a first thread to be migrated from the first core to the second core transparently to an operating system. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，处理器包括多个核心，每个核心包括存储用于核心的物理标识符的第一存储器和存储与所述核心相关联的逻辑标识符的第二存储器; 多个热传感器，用于测量处理器相应位置处的温度; 以及功率控制器，其包括动态核心标识符逻辑，用于至少部分地基于与所述第一核相关联的温度来动态地重新映射与第一核相关联的第一逻辑标识符以将所述第一逻辑标识符与第二核相关联，所述动态重映射以使第一线程从第一核心迁移到第二核心到操作系统。描述和要求保护其他实施例。

2. 发明授权

US5675795A Boot architecture for microkernel-based systems 失效
标题翻译：基于微内核的系统的引导架构
公开(公告)号：US5675795A
公开(公告)日：1997-10-07
申请号：US494742
申请日：1995-06-26
申请人： Freeman L. Rawson, III , Guy G. Sotomayor, Jr.
发明人： Freeman L. Rawson, III , Guy G. Sotomayor, Jr.
IPC分类号： G06F9/06 , G06F9/445
CPC分类号： G06F9/4411
摘要： A data processing system having an operating system environment, an operating system kernel, and a plurality of device drivers, wherein the plurality of device drivers are programs separate from the kernel. The data processing system includes a kernel that excludes device driver functions. The device drivers in the data processing system are user level tasks or programs. A boot volume stored in a storage device in the data processing system is provided, wherein the boot volume includes: (1) a file anchor, indicating a starting point to find files associated with the boot volume; (2) a plurality of file headers associated with the file anchor, each file header including an identification of files associated with the boot volume; and (3) a plurality of block list elements, each block list element identifying a contiguous block of data in a storage device, wherein data structures comprising a file may be identified and accessed using at least one block list element. A bootstrap task is used to load files into the memory from the data storage device using the boot volume to access the appropriate files, wherein the operating system environment may be initialized.
摘要翻译：一种具有操作系统环境，操作系统内核和多个设备驱动器的数据处理系统，其中多个设备驱动程序是与内核分离的程序。数据处理系统包括排除设备驱动程序功能的内核。数据处理系统中的设备驱动程序是用户级别的任务或程序。提供存储在数据处理系统中的存储设备中的引导卷，其中引导卷包括：（1）文件锚，指示查找与引导卷相关联的文件的起始点; （2）与文件锚相关联的多个文件头，每个文件头包括与引导卷相关联的文件的标识; 和（3）多个块列表元素，每个块列表元素标识存储设备中的连续的数据块，其中可以使用至少一个块列表元素来识别和访问包括文件的数据结构。引导任务用于使用引导卷从数据存储设备将文件加载到存储器中以访问适当的文件，其中可以初始化操作系统环境。

3. 发明授权

US5535401A Method and system of power and thermal management for a data processing system using object-oriented program design 失效
标题翻译：使用面向对象程序设计的数据处理系统的电源和热管理方法和系统
公开(公告)号：US5535401A
公开(公告)日：1996-07-09
申请号：US223498
申请日：1994-04-05
申请人： Freeman L. Rawson, III , Guy G. Sotomayor, Jr.
发明人： Freeman L. Rawson, III , Guy G. Sotomayor, Jr.
IPC分类号： G06F1/20 , G06F1/26 , G06F1/32 , G06F9/44 , G06N5/04
CPC分类号： G06F1/325 , G06F1/3203 , G06F1/3287 , Y02B60/1282
摘要： A power management architecture in a data processing system comprising physical devices having at least one state, each state has corresponding power value, and where a system state is defined as the set of all current states of the physical devices. Power objects and thermal objects, each corresponding to a physical device, contain information about the power requirements and thermal characteristics of each possible state for that physical device. The power and thermal objects also describe the allowed state transitions from each possible state to another state, and the power requirements and thermal characteristics of all possible state transitions. Also communicated is the current state of each physical device. Event means generate signals indicating the occurrence of an event in the system. A policy module contains rules, implementing the power management, that direct an action, the rules being a function of events and of power object information. A controller, in communication with the physical devices, the thermal and power objects, the event means, and the policy module, changes the state of any one of the physical devices in response to an event. The controller determines whether to change a physical device state based on the policy module rules.
摘要翻译：数据处理系统中的电源管理架构包括具有至少一个状态的物理设备，每个状态具有对应的功率值，并且其中系统状态被定义为物理设备的所有当前状态的集合。电力对象和热物体（每个对应于物理设备）包含有关该物理设备的每个可能状态的功率需求和热特性的信息。功率和热对象还描述了从每个可能状态到另一状态的允许状态转换，以及所有可能状态转换的功率需求和热特性。还传达了每个物理设备的当前状态。事件意味着产生指示系统中事件发生的信号。策略模块包含规则，实现电源管理，指导动作，规则作为事件和电源对象信息的功能。与物理设备通信的控制器，热和电力对象，事件装置和策略模块响应于事件改变任何一个物理设备的状态。控制器根据策略模块规则确定是否更改物理设备状态。

4. 发明授权

US5193161A Computer system having mode independent addressing 失效
标题翻译：具有模式独立寻址的计算机系统
公开(公告)号：US5193161A
公开(公告)日：1993-03-09
申请号：US525792
申请日：1990-05-18
申请人： Richard Bealkowski , Richard A. Dayan , David J. Doria , Scott G. Kinnear , Jeffrey I. Krantz , Robert B. Liverman , Guy G. Sotomayor , Donald D. Williams , Gary A. Vaiskauckas
发明人： Richard Bealkowski , Richard A. Dayan , David J. Doria , Scott G. Kinnear , Jeffrey I. Krantz , Robert B. Liverman , Guy G. Sotomayor , Donald D. Williams , Gary A. Vaiskauckas
IPC分类号： G06F9/06 , G06F12/02 , G06F12/14
CPC分类号： G06F12/0292 , G06F12/145
摘要： A computer system and method for operating a computer system capable of running in mutually incompatible real and protected addressing modes, in which programs written for one mode can be run in the other mode without modification. The BIOS assembles two different common data areas for the two modes, each inclusive of device block pointers, function transfer table pointers, data pointers, and function pointers. The common data area for the real mode is assembled first. To assembly the pointers for the protected mode common data area, the offset values from the real mode area ae copied directly, and then selector values are inserted whose physical addresses correspond to the segments of the corresponding pointers in the real mode area. The selector values are derived from a segment descriptor table.
摘要翻译：一种用于操作能够以相互不兼容的实际和受保护寻址模式运行的计算机系统的计算机系统和方法，其中针对一种模式编写的程序可以在另一种模式下运行而无需修改。 BIOS为两种模式组装两个不同的公共数据区域，每个模块包括设备块指针，功能传输表指针，数据指针和函数指针。首先组装实模式的公共数据区。为了组装保护模式公共数据区域的指针，直接复制实模式区域的偏移值，然后插入其物理地址对应于实模式区域中相应指针的段的选择器值。选择器值是从段描述符表导出的。

5. 发明授权

US5265252A Device driver system having generic operating system interface 失效
标题翻译：具有通用操作系统接口的设备驱动程序系统
公开(公告)号：US5265252A
公开(公告)日：1993-11-23
申请号：US675230
申请日：1991-03-26
申请人： Freeman L. Rawson, III , Guy G. Sotomayor, Jr. , Edward M. Tuggle, Jr.
发明人： Freeman L. Rawson, III , Guy G. Sotomayor, Jr. , Edward M. Tuggle, Jr.
IPC分类号： G06F13/10 , G06F3/00
CPC分类号： G06F13/105 , G06F13/102
摘要： A device driver system comprises a core that manages the specific functions of a plurality of I/O devices. The core includes an operating system interface that is generic to different operating systems. An operating system has a device driver interface that is unique to the operating system. A conversion program is layered between the core and the operating system for converting communications between the device driver interface of the operating system and the generic operating system interface of the core. The core includes a channel manager including a request dispatcher, request queues, a command initiator, and a plurality of state machines corresponding to state machine in the I/O devices. A transport layer interfaces between the hardware and the channel manager.

6. 发明授权

US4928237A Computer system having mode independent addressing 失效
标题翻译：具有模式独立寻址的计算机系统
公开(公告)号：US4928237A
公开(公告)日：1990-05-22
申请号：US30789
申请日：1987-03-27
申请人： Richard Bealkowski , Richard A. Dayan , David J. Doria , Scott G. Kinnear , Jeffrey I. Krantz , Robert B. Liverman , Guy G. Sotomayor , Donald D. Williams , Gary A. Vaiskauckas
发明人： Richard Bealkowski , Richard A. Dayan , David J. Doria , Scott G. Kinnear , Jeffrey I. Krantz , Robert B. Liverman , Guy G. Sotomayor , Donald D. Williams , Gary A. Vaiskauckas
IPC分类号： G06F9/06 , G06F12/02 , G06F12/14
CPC分类号： G06F12/0292 , G06F12/145
摘要： A computer system and method for operating a computer system capable of running in mutually incompatible real and protected addressing modes, in which programs written for one mode can be run in the other mode without modification. The operating system using BIOS assembles two different common data areas for the two modes, each inclusive of device block pointers, function transfer table pointers, data pointers, and function pointers. The common data area for the real mode is assembled first. To assemble the pointers for the protected mode common data area, the offset values from the real mode area are copied directly, and then selector values are inserted whose physical addresses correspond to the segments of the corresponding pointers in the real mode area. The selector values are derived from a segment descriptor table.

7. 发明申请

US20130111242A1 SYSTEM AND METHOD FOR MANAGING CLOCK SPEED BASED ON TASK URGENCY 有权
标题翻译：基于任务管理时钟速度的系统和方法
公开(公告)号：US20130111242A1
公开(公告)日：2013-05-02
申请号：US13284734
申请日：2011-10-28
申请人： Daniel S. HELLER , Guy G. SOTOMAYOR , Joseph SOKOL, JR.
发明人： Daniel S. HELLER , Guy G. SOTOMAYOR , Joseph SOKOL, JR.
IPC分类号： G06F1/32
CPC分类号： G06F1/3206 , G06F1/324 , G06F1/3287 , Y02D10/126 , Y02D10/171
摘要： A system and method are described for utilizing task urgency information when making power management decisions. For example, one embodiment of a method for managing power states of a processor comprises: executing a first power management state machine based on a first urgency level associated with a first task; detecting the execution of a second task having a second urgency level associated therewith; if the second urgency level is greater than the first urgency level, then executing a second power management state machine associated with the second urgency level.
摘要翻译：描述了在进行电源管理决策时利用任务紧急信息的系统和方法。例如，用于管理处理器的电源状态的方法的一个实施例包括：基于与第一任务相关联的第一紧急程度来执行第一电源管理状态机; 检测具有与其相关联的第二紧急程度的第二任务的执行; 如果第二紧急度级别大于第一紧急度级别，则执行与第二紧急度级别相关联的第二电源管理状态机。

8. 发明申请

US20150381227A1 INTERNET OF THINGS ELECTRONIC SIGNAL AGGREGATOR AND REPEATER 有权
标题翻译：电子信号聚合器和重复器的互联网
公开(公告)号：US20150381227A1
公开(公告)日：2015-12-31
申请号：US14450482
申请日：2014-08-04
申请人： David W. Browning , Kristoffer D. Fleming , Robert E. Gough , Guy G. Sotomayor , Vasudev Bibikar , Ankush Varma
发明人： David W. Browning , Kristoffer D. Fleming , Robert E. Gough , Guy G. Sotomayor , Vasudev Bibikar , Ankush Varma
IPC分类号： H04B1/40 , H04W4/00
CPC分类号： H04W4/70 , H04W84/20
摘要： The present disclosure is directed to logging random “chirps” of IoT devices and rebroadcasting these chirps to other devices on demand. An apparatus consistent with the present disclosure includes a transmitter to communicate with a network of wireless-communication-enabled devices. The apparatus also includes a receiver to detect communications transmitted from the wireless-communication-enabled device. Further, the apparatus includes control unit logic to tally the number of electrical signals emitted from each wireless-communication-enabled device. In addition, the apparatus includes memory to store the number of emitted electrical signals. The apparatus further includes a power unit electrically coupled to the transmitter, receiver, and memory.
摘要翻译：本公开旨在记录IoT设备的随机“啁啾”，并根据需要将这些啁啾转播给其他设备。与本公开一致的装置包括与无线通信使能设备的网络进行通信的发射机。该装置还包括用于检测从启用无线通信的设备发送的通信的接收机。此外，该装置包括控制单元逻辑，用于计数从每个启用无线通信的设备发射的电信号的数量。此外，该装置包括用于存储所发射的电信号的数量的存储器。该装置还包括电耦合到发射器，接收器和存储器的功率单元。

9. 发明申请

US20130111092A1 SYSTEM AND METHOD FOR ADJUSTING POWER USAGE TO REDUCE INTERRUPT LATENCY 有权
标题翻译：用于调节功耗以减少中断延迟的系统和方法
公开(公告)号：US20130111092A1
公开(公告)日：2013-05-02
申请号：US13284746
申请日：2011-10-28
申请人： Daniel S. Heller , Christopher G. Peak , Guy G. Sotomayor , Umesh S. Vaishampayan
发明人： Daniel S. Heller , Christopher G. Peak , Guy G. Sotomayor , Umesh S. Vaishampayan
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , Y02D10/14
摘要： A system and method are described for warming a processor from a low power state in anticipation of a time critical interrupt. For example, one embodiment of a method comprises: detecting that a time-critical interrupt will require processor resources at some point in the future; estimating a time at which the time-critical interrupt will be triggered; scheduling a timer interrupt to fire at a specified time prior to the estimated time that the time-critical interrupt will be triggered, the timer interrupt being scheduled with sufficient time to ensure that the processor is warmed to a level at which it is capable of handling the time-critical interrupt at the time that the time-critical interrupt is triggered; and responsively triggering the timer interrupt at the specified time prior to the time critical interrupt.
摘要翻译：描述了一种系统和方法，用于在处于时间关键中断的情况下从处于低功率状态的处理器升温。例如，一种方法的一个实施例包括：检测到时间关键中断将来需要处理器资源; 估计触发时间关键中断的时间; 调度定时器中断以在触发时间关键中断的估计时间之前的指定时间触发，定时器中断被调度足够的时间以确保处理器被加热到能够处理的水平触发时间关键中断时的时间关键中断; 并在时间关键中断之前的指定时间响应触发定时器中断。

10. 发明申请

US20110219247A1 FORCED IDLE OF A DATA PROCESSING SYSTEM 有权
标题翻译：数据处理系统的强制空闲
公开(公告)号：US20110219247A1
公开(公告)日：2011-09-08
申请号：US13112634
申请日：2011-05-20
申请人： Guy G. Sotomayor, JR. , Keith Cox , David G. Conroy , Michael Culbert
发明人： Guy G. Sotomayor, JR. , Keith Cox , David G. Conroy , Michael Culbert
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , G06F11/3423 , Y02D10/126 , Y02D10/172 , Y02D10/34 , Y02D50/20
摘要： Exemplary embodiments of methods and apparatuses to manage a power of a data processing system are described. One or more constraint parameters of a system are monitored. The data processing system is forced into an idle state for a first portion of a time while allowed to operate for a second portion of the time based on the one or more constraint parameters, wherein the system is forced into the idle state in response to comparing a target idle time to an actual idle time. The target idle time of the system is determined, in one embodiment, based on the one or more constraint parameters. The actual idle time of the system may be monitored to take into account interrupts which disrupt an idle time and idle times resulting from no software instructions to execute. The system may be allowed to operate based on comparisons of the target idle time and the actual idle time.
摘要翻译：描述了用于管理数据处理系统的功率的方法和装置的示例性实施例。监视系统的一个或多个约束参数。数据处理系统在一段时间内被强制进入空闲状态，同时基于一个或多个约束参数允许对时间的第二部分进行操作，其中响应于比较而将系统强制进入空闲状态目标空闲时间到实际空闲时间。在一个实施例中，基于一个或多个约束参数确定系统的目标空闲时间。可以监视系统的实际空闲时间以考虑中断，其中断由空闲时间和空闲时间引起的无法执行的软件指令。可以基于目标空闲时间和实际空闲时间的比较来允许系统操作。

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