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    • 2. 发明授权
      US07493586B2 Method and system product for implementing uncertainty in integrated circuit designs with programmable logic 失效
    • Method and system product for implementing uncertainty in integrated circuit designs with programmable logic
    • 用可编程逻辑实现集成电路设计中的不确定性的方法和系统产品
    • US07493586B2
    • 2009-02-17
    • US11553076
    • 2006-10-26
    • John A Darringer , George W Doerre , Victor N Kravets
    • John A Darringer , George W Doerre , Victor N Kravets
    • G06F17/50
    • G06F17/505
    • Disclosed is a method, system and computer program product to specify an integrated circuit. The integrated circuit includes a hardwired specific logic technology portion and a programmable specific logic technology portion. The method includes generating a hybrid logic network by mapping each uncertain logic function to an abstract programmable logic element implementation thereof and by mapping each known logic function to a technology-independent logic element implementation thereof; simplifying the hybrid logic network using logic synthesis optimizations; mapping the simplified hybrid logic network to a specific technology by mapping the abstract programmable logic element implementation to the specific programmable logic technology and the technology-independent logic element implementation to the specific logic technology; and further includes optimizing the mapped network to meet performance constraints. Generating involves using integrated circuit specification language extensions that include an Uncertain Function that is used in place of a logic function or operator, an Uncertain Function Assertion for imposing at least one constraint on the Uncertain Function, an Uncertain Register for a register having a programmable size within a specified range and an Uncertain Constant.
    • 公开了一种用于指定集成电路的方法，系统和计算机程序产品。 集成电路包括硬连线专用逻辑技术部分和可编程特定逻辑技术部分。 该方法包括通过将每个不确定逻辑函数映射到其抽象可编程逻辑元件实现并通过将每个已知逻辑功能映射到与技术无关的逻辑元件实现来生成混合逻辑网络; 使用逻辑综合优化简化混合逻辑网络; 通过将抽象可编程逻辑元件实现映射到特定可编程逻辑技术和与技术无关的逻辑元件实现到特定逻辑技术，将简化的混合逻辑网络映射到特定技术; 并且还包括优化映射网络以满足性能约束。 生成涉及使用集成电路规范语言扩展，包括用于代替逻辑功能或运算符的不确定函数，用于对不确定函数施加至少一个约束的不确定函数断言，具有可编程大小的寄存器的不确定寄存器 在指定范围内和不确定常数。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 4. 发明授权
      US07131098B2 Computer program product for implementing uncertainty in integrated circuit designs with programmable logic 失效
    • Computer program product for implementing uncertainty in integrated circuit designs with programmable logic
    • 用于实现具有可编程逻辑的集成电路设计中的不确定性的计算机程序产品
    • US07131098B2
    • 2006-10-31
    • US10714750
    • 2003-11-17
    • John A Darringer , George W Doerre , Victor N Kravets
    • John A Darringer , George W Doerre , Victor N Kravets
    • G06F17/50
    • G06F17/505
    • Disclosed is a method, system and computer program product to specify an integrated circuit. The integrated circuit includes a hardwired specific logic technology portion and a programmable specific logic technology portion. The method includes generating a hybrid logic network by mapping each uncertain logic function to an abstract programmable logic element implementation thereof and by mapping each known logic function to a technology-independent logic element implementation thereof; simplifying the hybrid logic network using logic synthesis optimizations; mapping the simplified hybrid logic network to a specific technology by mapping the abstract programmable logic element implementation to the specific programmable logic technology and the technology-independent logic element implementation to the specific logic technology; and further includes optimizing the mapped network to meet performance constraints. Generating involves using integrated circuit specification language extensions that include an Uncertain Function that is used in place of a logic function or operator, an Uncertain Function Assertion for imposing at least one constraint on the Uncertain Function, an Uncertain Register for a register having a programmable size within a specified range and an Uncertain Constant.
    • 公开了一种用于指定集成电路的方法，系统和计算机程序产品。 集成电路包括硬连线专用逻辑技术部分和可编程特定逻辑技术部分。 该方法包括通过将每个不确定逻辑函数映射到其抽象可编程逻辑元件实现并通过将每个已知逻辑功能映射到与技术无关的逻辑元件实现来生成混合逻辑网络; 使用逻辑综合优化简化混合逻辑网络; 通过将抽象可编程逻辑元件实现映射到特定可编程逻辑技术和与技术无关的逻辑元件实现到特定逻辑技术，将简化的混合逻辑网络映射到特定技术; 并且还包括优化映射网络以满足性能约束。 生成涉及使用集成电路规范语言扩展，包括用于代替逻辑功能或运算符的不确定函数，用于对不确定函数施加至少一个约束的不确定函数断言，具有可编程大小的寄存器的不确定寄存器 在指定范围内和不确定常数。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 5. 发明授权
      US08112727B2 Method and system product for implementing uncertainty in integrated circuit designs with programmable logic 有权
    • Method and system product for implementing uncertainty in integrated circuit designs with programmable logic
    • 用可编程逻辑实现集成电路设计中的不确定性的方法和系统产品
    • US08112727B2
    • 2012-02-07
    • US12137628
    • 2008-06-12
    • John A Darringer , George W Doerre , Victor N Kravets
    • John A Darringer , George W Doerre , Victor N Kravets
    • G06F17/50
    • G06F17/505
    • Disclosed is a method, system and computer program product to specify an integrated circuit. The integrated circuit includes a hardwired specific logic technology portion and a programmable specific logic technology portion. The method includes generating a hybrid logic network by mapping each uncertain logic function to an abstract programmable logic element implementation thereof and by mapping each known logic function to a technology-independent logic element implementation thereof; simplifying the hybrid logic network using logic synthesis optimizations; mapping the simplified hybrid logic network to a specific technology by mapping the abstract programmable logic element implementation to the specific programmable logic technology and the technology-independent logic element implementation to the specific logic technology; and further includes optimizing the mapped network to meet performance constraints. Generating involves using integrated circuit specification language extensions that include an Uncertain Function that is used in place of a logic function or operator, an Uncertain Function Assertion for imposing at least one constraint on the Uncertain Function, an Uncertain Register for a register having a programmable size within a specified range and an Uncertain Constant.
    • 公开了一种用于指定集成电路的方法，系统和计算机程序产品。 集成电路包括硬连线专用逻辑技术部分和可编程特定逻辑技术部分。 该方法包括通过将每个不确定逻辑函数映射到其抽象可编程逻辑元件实现并通过将每个已知逻辑功能映射到与技术无关的逻辑元件实现来生成混合逻辑网络; 使用逻辑综合优化简化混合逻辑网络; 通过将抽象可编程逻辑元件实现映射到特定可编程逻辑技术和与技术无关的逻辑元件实现到特定逻辑技术，将简化的混合逻辑网络映射到特定技术; 并且还包括优化映射网络以满足性能约束。 生成涉及使用集成电路规范语言扩展，包括用于代替逻辑功能或运算符的不确定函数，用于对不确定函数施加至少一个约束的不确定函数断言，具有可编程大小的寄存器的不确定寄存器 在指定范围内和不确定常数。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 6. 发明申请
      US20080250362A1 Method and System Product for Implementing Uncertainty in Integrated Circuit Designs with Programmable Logic 有权
    • Method and System Product for Implementing Uncertainty in Integrated Circuit Designs with Programmable Logic
    • 用可编程逻辑实现集成电路设计中的不确定性的方法和系统产品
    • US20080250362A1
    • 2008-10-09
    • US12137628
    • 2008-06-12
    • John A. Darringer , George W. Doerre , Victor N. Kravets
    • John A. Darringer , George W. Doerre , Victor N. Kravets
    • G06F17/50
    • G06F17/505
    • Disclosed is a method, system and computer program product to specify an integrated circuit. The integrated circuit includes a hardwired specific logic technology portion and a programmable specific logic technology portion. The method includes generating a hybrid logic network by mapping each uncertain logic function to an abstract programmable logic element implementation thereof and by mapping each known logic function to a technology-independent logic element implementation thereof; simplifying the hybrid logic network using logic synthesis optimizations; mapping the simplified hybrid logic network to a specific technology by mapping the abstract programmable logic element implementation to the specific programmable logic technology and the technology-independent logic element implementation to the specific logic technology; and further includes optimizing the mapped network to meet performance constraints. Generating involves using integrated circuit specification language extensions that include an Uncertain Function that is used in place of a logic function or operator, an Uncertain Function Assertion for imposing at least one constraint on the Uncertain Function, an Uncertain Register for a register having a programmable size within a specified range and an Uncertain Constant.
    • 公开了一种用于指定集成电路的方法，系统和计算机程序产品。 集成电路包括硬连线专用逻辑技术部分和可编程特定逻辑技术部分。 该方法包括通过将每个不确定逻辑函数映射到其抽象可编程逻辑元件实现并通过将每个已知逻辑功能映射到与技术无关的逻辑元件实现来生成混合逻辑网络; 使用逻辑综合优化简化混合逻辑网络; 通过将抽象可编程逻辑元件实现映射到特定可编程逻辑技术和与技术无关的逻辑元件实现到特定逻辑技术，将简化的混合逻辑网络映射到特定技术; 并且还包括优化映射网络以满足性能约束。 生成涉及使用集成电路规范语言扩展，包括用于代替逻辑功能或运算符的不确定函数，用于对不确定函数施加至少一个约束的不确定函数断言，具有可编程大小的寄存器的不确定寄存器 在指定范围内和不确定常数。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
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