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1. 发明授权

US5825697A Circuit and method for enabling a function in a multiple memory device module 失效
公开(公告)号：US5825697A
公开(公告)日：1998-10-20
申请号：US577840
申请日：1995-12-22
申请人： Gary R. Gilliam , Kevin G. Duesman , Leland R. Nevill
发明人： Gary R. Gilliam , Kevin G. Duesman , Leland R. Nevill
IPC分类号： G06F12/16 , G11C29/00 , G11C7/00
CPC分类号： G11C29/80 , G11C29/808
摘要： A memory device module in a package having externally accessible contacts includes multiple integrated memory circuits accessible to external circuitry exclusively through the contacts. An accessing circuit for each memory circuit accesses memory cells in the memory circuit for communication with the external circuitry. Each accessing circuit can be enabled to access redundant memory cells instead of inoperative memory cells by an enabling signal. An enabling circuit for each accessing circuit can output the enabling signal in response to receiving a unique set of input signals from external circuitry. Each unique set is selected with fuses in each enabling circuit, and includes row and column address strobe signals and a data signal. Upon receiving its unique set, one of the enabling circuits advantageously enables its associated accessing circuit to access redundant memory cells without the accessing circuits of the other memory circuits also being so enabled.

2. 发明授权

US06172924B2 Memory device with a sense amplifier 有权
标题翻译：具有读出放大器的存储器件
公开(公告)号：US06172924B2
公开(公告)日：2001-01-09
申请号：US09497295
申请日：2000-02-03
申请人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
发明人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
IPC分类号： G11C702
CPC分类号： G11C7/065 , G11C11/4091
摘要： A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).
摘要翻译：一种用于与存储器件（10）一起使用的读出放大器（14）的电路。电路包括由选择器（44）控制的两个装置（40和42）。第一装置（40）以第一电流电平驱动读出放大器（14）。第二装置（42）以与第一电流电平不同的第二电流电平来驱动读出放大器（14）。所述选择器（44）耦合到所述第一和第二器件（40和42），以便基于所述第一和第二器件的电源电压将所述第一和第二器件（40和42）中的一个选择性地耦合到所述读出放大器（14）存储装置（10）。

3. 发明授权

US5940338A Memory device with a sense amplifier 有权
公开(公告)号：US5940338A
公开(公告)日：1999-08-17
申请号：US137893
申请日：1998-08-20
申请人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
发明人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
IPC分类号： G11C7/06 , G11C11/4091 , G11C7/02 , G11C7/00 , G11C8/00
CPC分类号： G11C7/065 , G11C11/4091
摘要： A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).

4. 发明授权

US5920516A Circuit and method for enabling a function in a multiple memory device module 失效
标题翻译：用于启用多存储器件模块中的功能的电路和方法
公开(公告)号：US5920516A
公开(公告)日：1999-07-06
申请号：US42129
申请日：1998-03-12
申请人： Gary R. Gilliam , Kevin G. Duesman , Leland R. Nevill
发明人： Gary R. Gilliam , Kevin G. Duesman , Leland R. Nevill
IPC分类号： G06F12/16 , G11C29/00 , G11C7/00
CPC分类号： G11C29/80 , G11C29/808
摘要： A memory device module in a package having externally accessible contacts includes multiple integrated memory circuits accessible to external circuitry exclusively through the contacts. An accessing circuit for each memory circuit accesses memory cells in the memory circuit for communication with the external circuitry. Each accessing circuit can be enabled to access redundant memory cells instead of inoperative memory cells by an enabling signal. An enabling circuit for each accessing circuit can output the enabling signal in response to receiving a unique set of input signals from external circuitry. Each unique set is selected with fuses in each enabling circuit, and includes row and column address strobe signals and a data signal. Upon receiving its unique set, one of the enabling circuits advantageously enables its associated accessing circuit to access redundant memory cells without the accessing circuits of the other memory circuits also being so enabled.
摘要翻译：具有外部可访问触点的封装中的存储器件模块包括仅通过触点对外部电路可访问的多个集成存储器电路。每个存储器电路的访问电路访问存储器电路中的存储器单元以与外部电路通信。可以通过使能信号使每个访问电路能够访问冗余存储器单元而不是不工作的存储器单元。每个访问电路的使能电路可以响应于从外部电路接收到一组唯一的输入信号而输出使能信号。每个独特的集合在每个使能电路中选择熔丝，并包括行和列地址选通信号和数据信号。在接收到其唯一的集合之后，启用电路之一有利地使其相关联的访问电路访问冗余存储器单元，而其他存储器电路的访问电路也被启用。

5. 发明授权

US5901099A Memory device with a sense amplifier 失效
标题翻译：具有读出放大器的存储器件
公开(公告)号：US5901099A
公开(公告)日：1999-05-04
申请号：US915271
申请日：1997-08-22
申请人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
发明人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
IPC分类号： G11C7/06 , G11C11/4091 , G11C7/02 , G11C7/00
CPC分类号： G11C11/4091 , G11C7/065
摘要： A circuit for a sense amplifier (14) for use with a memory device (10). The circuts includes two devices(40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier(14) with a second current level, different from the first current level. The selector (14) is couple to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices(40and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).
摘要翻译：一种用于与存储器件（10）一起使用的读出放大器（14）的电路。电路包括由选择器（44）控制的两个装置（40和42）。第一装置（40）以第一电流电平驱动读出放大器（14）。第二装置（42）以与第一电流电平不同的第二电流电平来驱动读出放大器（14）。选择器（14）耦合到第一和第二器件（40和42），以便基于存储器的电源电压选择性地将第一和第二器件（40和42）之一耦合到读出放大器（14）装置（10）。

6. 发明授权

US5627785A Memory device with a sense amplifier 失效
标题翻译：具有读出放大器的存储器件
公开(公告)号：US5627785A
公开(公告)日：1997-05-06
申请号：US619808
申请日：1996-03-15
申请人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
发明人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
IPC分类号： G11C7/06 , G11C11/4091 , G11C7/00
CPC分类号： G11C11/4091 , G11C7/065
摘要： A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).
摘要翻译：一种用于与存储器件（10）一起使用的读出放大器（14）的电路。电路包括由选择器（44）控制的两个装置（40和42）。第一装置（40）以第一电流电平驱动读出放大器（14）。第二装置（42）以与第一电流电平不同的第二电流电平来驱动读出放大器（14）。所述选择器（44）耦合到所述第一和第二器件（40和42），以便基于所述第一和第二器件的电源电压将所述第一和第二器件（40和42）中的一个选择性地耦合到所述读出放大器（14）存储装置（10）。

7. 发明授权

US5566107A Programmable circuit for enabling an associated circuit 失效
标题翻译：用于启用相关电路的可编程电路
公开(公告)号：US5566107A
公开(公告)日：1996-10-15
申请号：US437438
申请日：1995-05-05
申请人： Gary R. Gilliam
发明人： Gary R. Gilliam
IPC分类号： G11C17/18 , G11C29/00 , G11C7/00 , H01H37/76
CPC分类号： G11C29/789 , G11C17/18 , G11C29/83
摘要： A circuit enables an associated function circuit in response to an activate signal. The enable circuit includes a zero-standby-current select circuit that may be programmed in either a select or unselect state. When programmed in a select state, the select circuit generates a select signal in response to the activate signal. When programmed in an unselect state, the select circuit prohibits the generation of the select signal in response to the activate signal. When it is programmed in either the select or unselect state, the select circuit dissipates substantially zero quiescent power. A latch generates and maintains, in response to the select signal, an enable signal that enables the function circuit.
摘要翻译：电路响应于激活信号使能相关联的功能电路。使能电路包括可以选择或取消选择状态编程的零待机电流选择电路。当在选择状态下编程时，选择电路响应于激活信号产生选择信号。当被编程为未选择状态时，选择电路响应于激活信号禁止产生选择信号。当选择或取消选择状态时，选择电路消耗基本为零的静态功耗。锁存器响应于选择信号产生和维持启用功能电路的使能信号。

8. 发明授权

US6058058A Memory device with a sense amplifier 有权
标题翻译：具有读出放大器的存储器件
公开(公告)号：US6058058A
公开(公告)日：2000-05-02
申请号：US137636
申请日：1998-08-20
申请人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
发明人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
IPC分类号： G11C7/06 , G11C11/4091 , G11C7/02 , G11C7/00
CPC分类号： G11C7/065 , G11C11/4091
摘要： A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).
摘要翻译：一种用于与存储器件（10）一起使用的读出放大器（14）的电路。电路包括由选择器（44）控制的两个装置（40和42）。第一装置（40）以第一电流电平驱动读出放大器（14）。第二装置（42）以与第一电流电平不同的第二电流电平来驱动读出放大器（14）。所述选择器（44）耦合到所述第一和第二器件（40和42），以便基于所述第一和第二器件的电源电压将所述第一和第二器件（40和42）中的一个选择性地耦合到所述读出放大器（14）存储装置（10）。

9. 发明授权

US5764574A Method and apparatus for back-end repair of multi-chip modules 失效
标题翻译：用于多芯片模块后端修复的方法和装置
公开(公告)号：US5764574A
公开(公告)日：1998-06-09
申请号：US666247
申请日：1996-06-20
申请人： Leland R. Nevill , Gary R. Gilliam , Kevin Duesman
发明人： Leland R. Nevill , Gary R. Gilliam , Kevin Duesman
IPC分类号： G11C29/00 , G11C7/00
CPC分类号： G11C29/785
摘要： A method and apparatus for independent redundancy programming of individual components of a multiple-component semiconductor device assembly. In the disclosed embodiment, a multiple-chip memory module includes a plurality of memory devices each having redundant circuitry therein for facilitating backend repair of those devices should a defective memory cell (or group of memory cells) be detected. The redundant circuitry in each device is responsive to a predetermined combination of programming signals applied to terminals of that device to activate a redundant column (or row) of memory cells into operation in place of a column (or row) containing a defective memory cell. In the disclosed embodiment, the predetermined combination of programming signals includes at least one signal applied to a data terminal of the device. The interconnection of individual memory devices in the multiple-device assembly is such that a predetermined combination of signals applied to predetermined terminals of the assembly, including at least one data terminal thereof, can uniquely identify an individual one of the plurality of individual memory devices in the assembly, facilitating back-end repair of the assembly without requiring disassembly thereof.
摘要翻译：一种用于多分量半导体器件组件的各个部件的独立冗余编程的方法和装置。在所公开的实施例中，多芯片存储器模块包括多个存储器件，每个存储器件在其中具有冗余电路，用于在检测到缺陷存储器单元（或存储器单元组）时便于对这些器件进行后端修复。每个设备中的冗余电路响应于施加到该设备的终端的编程信号的预定组合，以激活存储器单元的冗余列（或行）来代替包含有缺陷的存储器单元的列（或行）。在所公开的实施例中，编程信号的预定组合包括施加到设备的数据终端的至少一个信号。多器件组件中的各个存储器件的互连使得施加到组件的预定端子（包括其至少一个数据端）的预定信号组合可以唯一地识别多个单独存储器件中的单个存储器件该组件有助于组装的后端修复而不需要拆卸组件。

10. 发明授权

US5744978A Variable load device responsive to a circuit parameter 失效
标题翻译：响应于电路参数的可变负载设备
公开(公告)号：US5744978A
公开(公告)日：1998-04-28
申请号：US783573
申请日：1997-01-15
申请人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
发明人： Gary R. Gilliam , Steve G. Renfro , Kacey Cutler , Roland Ochoa , Craig E. Schneider
IPC分类号： G11C7/06 , G11C11/4091 , H03K17/14
CPC分类号： G11C11/4091 , G11C7/065
摘要： A circuit for a sense amplifier (14) for use with a memory device (10). The circuit includes two devices (40 and 42) that are controlled by a selector (44). The first device (40) drives the sense amplifier (14) with a first current level. The second device (42) drives the sense amplifier (14) with a second current level, different from the first current level. The selector (44) is coupled to the first and second devices (40 and 42) so as to selectively couple one of the first and second devices (40 and 42) to the sense amplifier (14) based on a power supply voltage of the memory device (10).
摘要翻译：一种用于与存储器件（10）一起使用的读出放大器（14）的电路。电路包括由选择器（44）控制的两个装置（40和42）。第一装置（40）以第一电流电平驱动读出放大器（14）。第二装置（42）以与第一电流电平不同的第二电流电平来驱动读出放大器（14）。所述选择器（44）耦合到所述第一和第二器件（40和42），以便基于所述第一和第二器件的电源电压将所述第一和第二器件（40和42）中的一个选择性地耦合到所述读出放大器（14）存储装置（10）。

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