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1. 发明授权

US09188622B1 Power spectrum analysis for defect screening in integrated circuit devices 有权
标题翻译：集成电路器件缺陷筛选功率谱分析
公开(公告)号：US09188622B1
公开(公告)日：2015-11-17
申请号：US13309281
申请日：2011-12-01
申请人： Paiboon Tangyunyong , Edward I. Cole, Jr. , David J. Stein
发明人： Paiboon Tangyunyong , Edward I. Cole, Jr. , David J. Stein
IPC分类号： G01R31/26 , G01R27/28
CPC分类号： G01R31/31721 , G01R27/28 , G01R31/26
摘要： A device sample is screened for defects using its power spectrum in response to a dynamic stimulus. The device sample receives a time-varying electrical signal. The power spectrum of the device sample is measured at one of the pins of the device sample. A defect in the device sample can be identified based on results of comparing the power spectrum with one or more power spectra of the device that have a known defect status.
摘要翻译：使用其功率谱来响应于动态刺激来筛选设备样品的缺陷。器件样品接收时变电信号。在器件样品的一个引脚测量器件样品的功率谱。可以基于将功率谱与具有已知缺陷状态的设备的一个或多个功率谱进行比较的结果来识别器件样本中的缺陷。

2. 发明授权

US07525325B1 System and method for floating-substrate passive voltage contrast 失效
标题翻译：浮动基板无源电压对比的系统和方法
公开(公告)号：US07525325B1
公开(公告)日：2009-04-28
申请号：US11640720
申请日：2006-12-18
申请人： Mark W. Jenkins , Edward I. Cole, Jr. , Paiboon Tangyunyong , Jerry M. Soden , Jeremy A. Walraven , Alejandro A. Pimentel
发明人： Mark W. Jenkins , Edward I. Cole, Jr. , Paiboon Tangyunyong , Jerry M. Soden , Jeremy A. Walraven , Alejandro A. Pimentel
IPC分类号： G01R31/305 , G01R31/26 , G01N23/00
CPC分类号： G01R31/307
摘要： A passive voltage contrast (PVC) system and method are disclosed for analyzing ICs to locate defects and failure mechanisms. During analysis a device side of a semiconductor die containing the IC is maintained in an electrically-floating condition without any ground electrical connection while a charged particle beam is scanned over the device side. Secondary particle emission from the device side of the IC is detected to form an image of device features, including electrical vias connected to transistor gates or to other structures in the IC. A difference in image contrast allows the defects or failure mechanisms be pinpointed. Varying the scan rate can, in some instances, produce an image reversal to facilitate precisely locating the defects or failure mechanisms in the IC. The system and method are useful for failure analysis of ICs formed on substrates (e.g. bulk semiconductor substrates and SOI substrates) and other types of structures.
摘要翻译：公开了一种无源电压对比（PVC）系统和方法，用于分析IC来定位缺陷和故障机制。在分析期间，在装置侧扫描带电粒子束时，包含IC的半导体管芯的器件侧保持在电浮动状态而没有任何接地电连接。检测来自IC的器件侧的二次粒子发射以形成器件特征的图像，包括连接到晶体管栅极的电通路或IC中的其它结构。图像对比度的差异允许确定缺陷或故障机制。在某些情况下，改变扫描速率可以产生图像反转，以便于精确定位IC中的缺陷或故障机制。该系统和方法对于在衬底（例如，体半导体衬底和SOI衬底）上形成的IC和其它类型的结构的故障分析是有用的。

3. 发明授权

US6031386A Apparatus and method for defect testing of integrated circuits 失效
标题翻译：集成电路缺陷检测装置及方法
公开(公告)号：US6031386A
公开(公告)日：2000-02-29
申请号：US962465
申请日：1997-10-31
申请人： Edward I. Cole, Jr. , Jerry M. Soden
发明人： Edward I. Cole, Jr. , Jerry M. Soden
IPC分类号： G01R31/30 , G01R31/26
CPC分类号： G01R31/3004
摘要： An apparatus and method for defect and failure-mechanism testing of integrated circuits (ICs) is disclosed. The apparatus provides an operating voltage, V.sub.DD, to an IC under test and measures a transient voltage component, V.sub.DDT, signal that is produced in response to switching transients that occur as test vectors are provided as inputs to the IC. The amplitude or time delay of the V.sub.DDT signal can be used to distinguish between defective and defect-free (i.e. known good) ICs. The V.sub.DDT signal is measured with a transient digitizer, a digital oscilloscope, or with an IC tester that is also used to input the test vectors to the IC. The present invention has applications for IC process development, for the testing of ICs during manufacture, and for qualifying ICs for reliability.
摘要翻译：公开了一种用于集成电路（IC）的缺陷和故障机制测试的装置和方法。该装置向待测IC提供工作电压VDD，并测量响应于作为测试向量作为IC的输入提供的切换瞬变而产生的瞬态电压分量VDDT信号。 VDDT信号的幅度或时间延迟可用于区分有缺陷和无缺陷（即已知的良好）IC。 VDDT信号用瞬态数字转换器，数字示波器或IC测试仪测量，也可用于向IC输入测试矢量。本发明具有用于IC工艺开发的应用，用于制造期间的IC的测试以及用于可靠性的IC的合格化。

4. 发明授权

US06546513B1 Data processing device test apparatus and method therefor 失效
标题翻译：数据处理装置试验装置及其方法
公开(公告)号：US06546513B1
公开(公告)日：2003-04-08
申请号：US09586572
申请日：2000-06-02
申请人： Richard Jacob Wilcox , Jason D. Mulig , David Eppes , Michael R. Bruce , Victoria J. Bruce , Rosalinda M. Ring , Edward I. Cole, Jr. , Paiboon Tangyunyong , Charles F. Hawkins , Arnold Y. Louie
发明人： Richard Jacob Wilcox , Jason D. Mulig , David Eppes , Michael R. Bruce , Victoria J. Bruce , Rosalinda M. Ring , Edward I. Cole, Jr. , Paiboon Tangyunyong , Charles F. Hawkins , Arnold Y. Louie
IPC分类号： G01R3128
CPC分类号： G06F11/263 , G01R31/307
摘要： A method and apparatus mechanism for testing data processing devices are implemented. The test mechanism isolates critical paths by correlating a scanning microscope image with a selected speed path failure. A trigger signal having a preselected value is generated at the start of each pattern vector. The sweep of the scanning microscope is controlled by a computer, which also receives and processes the image signals returned from the microscope. The value of the trigger signal is correlated with a set of pattern lines being driven on the DUT. The trigger is either asserted or negated depending the detection of a pattern line failure and the particular line that failed. In response to the detection of the particular speed path failure being characterized, and the trigger signal, the control computer overlays a mask on the image of the device under test (DUT). The overlaid image provides a visual correlation of the failure with the structural elements of the DUT at the level of resolution of the microscope itself.
摘要翻译：实现了用于测试数据处理设备的方法和设备机制。测试机制通过将扫描显微镜图像与选定的速度路径故障相关联来隔离关键路径。在每个图案向量的开始处产生具有预选值的触发信号。扫描显微镜的扫描由计算机控制，计算机还接收并处理从显微镜返回的图像信号。触发信号的值与在DUT上驱动的一组图案线相关。根据模式线路故障的检测和失败的特定线路，触发器被断言或否定。响应于特征的特定速度路径故障的检测和触发信号，控制计算机覆盖被测器件（DUT）的图像上的掩模。重叠的图像在显微镜本身的分辨率水平下提供了故障与DUT的结构元件的视觉相关性。

5. 发明授权

US5465046A Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits 失效
标题翻译：磁力显微镜方法和装置，用于检测和图像集成电路中的电流
公开(公告)号：US5465046A
公开(公告)日：1995-11-07
申请号：US215431
申请日：1994-03-21
申请人： Ann. N. Campbell , Richard E. Anderson , Edward I. Cole, Jr.
发明人： Ann. N. Campbell , Richard E. Anderson , Edward I. Cole, Jr.
IPC分类号： G01Q60/00 , G01R33/038 , G01R33/02
CPC分类号： G01Q60/54 , B82Y35/00 , G01R33/0385 , B82Y25/00 , Y10S977/865
摘要： A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits.
摘要翻译：磁力显微镜法和改进的磁头，用于检测和量化集成电路电流产生的内部磁场。检测电流用于故障分析，设计验证和模型验证。集成芯片上的电流与磁场的相互作用可以使用悬臂磁头检测。通过交流耦合或外差技术，通过电压实现对交流和直流电流和电压检测的增强灵敏度。这些技术可以用于从模拟电路中提取信息。

6. 发明授权

US06549022B1 Apparatus and method for analyzing functional failures in integrated circuits 有权
标题翻译：用于分析集成电路功能故障的装置和方法
公开(公告)号：US06549022B1
公开(公告)日：2003-04-15
申请号：US09586505
申请日：2000-06-02
申请人： Edward I. Cole, Jr. , Paiboon Tangyunyong , Charles F. Hawkins , Michael R. Bruce , Victoria J. Bruce , Rosalinda M. Ring
发明人： Edward I. Cole, Jr. , Paiboon Tangyunyong , Charles F. Hawkins , Michael R. Bruce , Victoria J. Bruce , Rosalinda M. Ring
IPC分类号： G01R3102
CPC分类号： G01R31/308
摘要： An apparatus and method are presented for identifying and mapping functional failures in an integrated circuit (IC) due to timing errors therein based on the generation of functional failures in the IC. This is done by providing a set of input test vectors to the IC and adjusting one or more: of the IC voltage, temperature or clock frequency; the rate at which the test vectors are provided to the IC; or the power level of a focused laser beam used to probe the IC and produce localized heating which changes the incidence of the functional failures in the IC which can be sensed for locating the IC circuit elements responsible for the functional failures. The present invention has applications for optimizing the design and fabrication of ICs, for failure analysis, and for qualification or validation testing of ICs.
摘要翻译：提出了一种基于IC中的功能故障的产生由于其中的定时误差来识别和映射集成电路（IC）中的功能故障的装置和方法。这通过向IC提供一组输入测试向量并且调整IC电压，温度或时钟频率的一个或多个来完成; 将测试向量提供给IC的速率; 或用于探测IC并产生局部加热的聚焦激光束的功率电平，其改变IC中的功能故障的发生率，其可被感测用于定位负责功能故障的IC电路元件。本发明具有优化IC的设计和制造，故障分析以及IC的鉴定或验证测试的应用。

7. 发明授权

US6078183A Thermally-induced voltage alteration for integrated circuit analysis 失效
标题翻译：用于集成电路分析的热诱导电压变化
公开(公告)号：US6078183A
公开(公告)日：2000-06-20
申请号：US34546
申请日：1998-03-03
申请人： Edward I. Cole, Jr.
发明人： Edward I. Cole, Jr.
IPC分类号： G01R31/28 , G01R31/02
CPC分类号： G01R31/2853 , G01R31/311
摘要： A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing an integrated circuit (IC) either from a device side of the IC or through the IC substrate to locate any open-circuit or short-circuit defects therein. The TIVA apparatus uses constant-current biasing of the IC while scanning a focused laser beam over electrical conductors (i.e. a patterned metallization) in the IC to produce localized heating of the conductors. This localized heating produces a thermoelectric potential due to the Seebeck effect in any conductors with open-circuit defects and a resistance change in any conductors with short-circuit defects, both of which alter the power demand by the IC and thereby change the voltage of a source or power supply providing the constant-current biasing. By measuring the change in the supply voltage and the position of the focused and scanned laser beam over time, any open-circuit or short-circuit defects in the IC can be located and imaged. The TIVA apparatus can be formed in part from a scanning optical microscope, and has applications for qualification testing or failure analysis of ICs.
摘要翻译：公开了一种用于从IC的器件侧或通过IC基板分析集成电路（IC）的热感应电压变化（TIVA）装置和方法，以定位其中的任何开路或短路缺陷。 TIVA装置使用恒定电流偏置IC，同时在IC中的电导体（即图案化金属化）上扫描聚焦激光束，以产生导体的局部加热。由于在具有短路缺陷的任何导体中具有开路缺陷的任何导体中的塞贝克效应以及具有短路缺陷的任何导体的电阻变化，这种局部加热产生热电势，这两者都改变了IC的功率需求，从而改变了源或电源提供恒流偏置。通过测量电源电压和聚焦和扫描的激光束随时间的位置的变化，可以定位和成像IC中的任何开路或短路缺陷。 TIVA设备可以部分地由扫描光学显微镜形成，并且具有用于IC的鉴定测试或故障分析的应用。

8. 发明授权

US06407560B1 Thermally-induced voltage alteration for analysis of microelectromechanical devices 有权
标题翻译：用于分析微机电装置的热诱导电压变化
公开(公告)号：US06407560B1
公开(公告)日：2002-06-18
申请号：US09596858
申请日：2000-06-19
申请人： Jeremy A. Walraven , Edward I. Cole, Jr.
发明人： Jeremy A. Walraven , Edward I. Cole, Jr.
IPC分类号： G01R3102
CPC分类号： G01R31/2853 , G01R31/311
摘要： A thermally-induced voltage alteration (TIVA) apparatus and method are disclosed for analyzing a microelectromechanical (MEM) device with or without on-board integrated circuitry. One embodiment of the TIVA apparatus uses constant-current biasing of the MEM device while scanning a focused laser beam over electrically-active members therein to produce localized heating which alters the power demand of the MEM device and thereby changes the voltage of the constant-current source. This changing voltage of the constant-current source can be measured and used in combination with the position of the focused and scanned laser beam to generate an image of any short-circuit defects in the MEM device (e.g. due to stiction or fabrication defects). In another embodiment of the TIVA apparatus, an image can be generated directly from a thermoelectric potential produced by localized laser heating at the location of any short-circuit defects in the MEM device, without any need for supplying power to the MEM device. The TIVA apparatus can be formed, in part, from a scanning optical microscope, and has applications for qualification testing or failure analysis of MEM devices.
摘要翻译：公开了用于分析具有或不具有车载集成电路的微机电（MEM）装置的热感应电压变化（TIVA）装置和方法。 TIVA装置的一个实施例使用MEM装置的恒定电流偏置，同时在其中的电活动部件上扫描聚焦的激光束以产生局部加热，其改变MEM装置的功率需求，从而改变恒定电流的电压资源。可以测量恒定电流源的这种变化的电压并与聚焦和扫描的激光束的位置结合使用以产生MEM器件中的任何短路缺陷的图像（例如由于粘性或制造缺陷）。在TIVA装置的另一实施例中，可以直接从在MEM装置中的任何短路缺陷的位置处由局部激光加热产生的热电势产生图像，而不需要向MEM装置供电。 TIVA设备可以部分地由扫描光学显微镜形成，并且具有MEM器件的鉴定测试或故障分析的应用。

9. 发明授权

US5430305A Light-induced voltage alteration for integrated circuit analysis 失效
标题翻译：用于集成电路分析的光诱导电压变化
公开(公告)号：US5430305A
公开(公告)日：1995-07-04
申请号：US225021
申请日：1994-04-08
申请人： Edward I. Cole, Jr. , Jerry M. Soden
发明人： Edward I. Cole, Jr. , Jerry M. Soden
IPC分类号： G01R31/311 , G01N21/88
CPC分类号： G01R31/311
摘要： An apparatus and method are described for analyzing an integrated circuit (IC), The invention uses a focused light beam that is scanned over a surface of the IC to generate a light-induced voltage alteration (LIVA) signal for analysis of the IC, The LIVA signal may be used to generate an image of the IC showing the location of any defects in the IC; and it may be further used to image and control the logic states of the IC. The invention has uses for IC failure analysis, for the development of ICs, for production-line inspection of ICs, and for qualification of ICs.
摘要翻译：描述了用于分析集成电路（IC）的装置和方法。本发明使用在IC的表面上扫描的聚焦光束以产生用于IC的分析的光感应电压变化（LIVA）信号。 LIVA信号可用于产生显示IC中任何缺陷位置的IC的图像; 并且可以进一步用于对IC的逻辑状态进行成像和控制。本发明用于IC故障分析，IC开发，IC生产线检测和IC鉴定。

10. 发明授权

US5781017A Capacitive charge generation apparatus and method for testing circuits 失效
标题翻译：电容式电荷产生装置及电路测试方法
公开(公告)号：US5781017A
公开(公告)日：1998-07-14
申请号：US638519
申请日：1996-04-26
申请人： Edward I. Cole, Jr. , Kenneth A. Peterson , Daniel L. Barton
发明人： Edward I. Cole, Jr. , Kenneth A. Peterson , Daniel L. Barton
IPC分类号： G01R31/305 , G01R31/302
CPC分类号： G01R31/318513 , G01R31/305
摘要： An electron beam apparatus and method for testing a circuit. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 .mu.m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits.
摘要翻译：一种用于测试电路的电子束装置和方法。电子束装置包括入射在绝缘层的外表面上的电子束，该绝缘层覆盖电路的一个或多个电导体，用于在表面上产生时变或交流电位; 以及测量单元，其连接到所述电路，用于测量电容耦合到所述电导体的电信号，以识别和映射每个所述电导体的导通状态，所述电传导器的电气偏置信号被施加到所述电路。电子束装置还可以包括二次电子检测器，用于形成用于与电导体的导通状态的映射对准的二次电子图像。该装置和方法对于故障分析或鉴定测试是有用的，以确定是否存在任何开路或短路，并且验证埋在1-100μm或更大绝缘层厚度之下的电导体的连续性或完整性而不会破坏或分解绝缘层。可测试的电路类型包括集成电路，多芯片模块，印刷电路板和柔性印刷电路。

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