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1. 发明授权

US4141068A Auxiliary ROM memory system 失效
标题翻译：辅助ROM存储系统
公开(公告)号：US4141068A
公开(公告)日：1979-02-20
申请号：US780875
申请日：1977-03-24
申请人： George E. Mager , Frank M. Nelson , Steven L. Reid , Philip Richardson , Vernon E. Rochat , Donald S. Post
发明人： George E. Mager , Frank M. Nelson , Steven L. Reid , Philip Richardson , Vernon E. Rochat , Donald S. Post
IPC分类号： G06F12/06 , G06F9/26 , G06F9/445 , G06F13/00
CPC分类号： G06F8/66 , G06F12/0638
摘要： An auxiliary ROM memory system which is hierarchied for providing for the contingency of additional read-only memory control program storage requirements in excess or in lieu of the predetermined ROM memory provided on-board a microprocessor based central processing unit module, and a read-only memory altering capability utilizing programmable read-only memory to expedite the implementation/installation of changes to the ROM bit patterns. The alterable PROM storage comprises bulk PROM memory including a first PROM set that is mutually exclusive as to existing on-board ROM memory for addressably branching to code extensions and/or in-line code insertions, and/or a second PROM set that is mutually inclusive as to existent on-board and contingent ROM memory for decodably addressing large-scale code overlays thereto. In addition, the alterable PROM storage comprises patch PROM for addressing, through multi-leveled decoding, small-scale code overlays to the on-board and contingent ROM memory for single in-line bit pattern alterations. Conflicting memory requests involving addresses recognized by more than one of the supra memory categories, when enabled, are presented to a predetermined hierarchy of memory precedences for resolution thereof. Each of the enumerated memory categories of the auxiliary ROM memory system may be operative to have its population incremented or decremented without invalidating the above hierarchy of addressing.
摘要翻译：分级的辅助ROM存储器系统，用于提供附加的只读存储器控制程序存储要求的过多或替代提供在基于微处理器的中央处理单元模块上的预定ROM存储器的可能性，以及只读利用可编程只读存储器来加快对ROM位模式的改变的实现/安装的存储器改变能力。可变的PROM存储器包括批量PROM存储器，其包括与现有的板上ROM存储器相互排斥的第一PROM集合，用于可寻址地分支到代码扩展和/或在线代码插入，和/或相互间的第二PROM集合包括存在的板载和即时ROM存储器，用于可解码地寻址大规模代码覆盖。另外，可改变的PROM存储器包括补丁PROM，用于通过多级解码将小规模代码叠加到板上以及用于单列直插位模式改变的偶然ROM存储器中。涉及存储器请求的相互关联的存储器请求被提供给存储器优先级的预定层级以进行解析，这些存储器请求涉及由超过一个存储器类别识别的地址的存储器请求。辅助ROM存储器系统的每个枚举的存储器类别可以操作以使其总体增加或减少，而不使上述寻址层次化。

2. 发明授权

US5170340A System state controller for electronic image processing systems 失效
标题翻译：电子图像处理系统的系统状态控制器
公开(公告)号：US5170340A
公开(公告)日：1992-12-08
申请号：US591325
申请日：1990-09-28
申请人： Patricia A. Prokop , Irene M. Allen , Ernest L. Legg , Anthony M. Federico , Donald S. Post , Daniel Fleysher
发明人： Patricia A. Prokop , Irene M. Allen , Ernest L. Legg , Anthony M. Federico , Donald S. Post , Daniel Fleysher
IPC分类号： B41J29/42 , B41J29/46 , G03G15/00 , G03G15/22 , G03G21/00 , G06F9/46 , G06F9/48 , G06T1/00 , H04N1/23 , H04N1/32
CPC分类号： G06F9/4881 , G03G15/50 , H04N1/00915 , H04N1/00954 , H04N1/32561 , G03G2215/00126 , H04N2201/0081 , H04N2201/0082
摘要： A state controller for an electronic reprographic system for controlling system operations when processing requests in which the system has a plurality of hardware and software system components providing discrete services for processing requests and maintaining operation of the system, and job programming means including a display screen for inputting requests, including: a state holder for monitoring the current operating state of the system components; plural discrete job processing virtual machines with each of the virtual machines having at least one service associated with it for implementing the virtual machine; each of the services having at least one of the system components for carrying out the service; and a scheduler for managing resources of and setting priorities for the virtual machines to process the requests in an efficient manner, the scheduler being adapted to cause memory from a first one of the virtual machines to be distributed to a second one of the virtual machines when the second one of the virtual machines requests more memory than is normally allocated to it.
摘要翻译：一种用于电子重现系统的状态控制器，用于在处理系统具有多个硬件和软件系统组件的请求时控制系统操作，所述多个硬件和软件系统组件提供用于处理请求和维护系统操作的离散服务，以及作业编程装置，包括用于输入请求，包括：监控系统组件当前运行状态的状态持有者; 多个离散作业处理虚拟机，其中每个虚拟机具有与其相关联的用于实现虚拟机的至少一个服务; 每个服务具有用于执行服务的系统组件中的至少一个; 以及调度器，用于管理虚拟机的资源并且设置优先级以便以有效的方式处理所述请求，所述调度器适于使来自所述虚拟机中的第一虚拟机的存储器分配给所述虚拟机中的第二虚拟机，虚拟机中的第二个请求比通常分配给它更多的内存。

3. 发明授权

US4054380A Control system for high speed copier/duplicators 失效
标题翻译：高速复印机/复印机控制系统
公开(公告)号：US4054380A
公开(公告)日：1977-10-18
申请号：US445014
申请日：1974-02-22
申请人： James M. Donohue , Ronald J. Carter , Kenton W. Fiske , Daniel L. Mueller , Donald S. Post , Edward G. Reehil , Edward L. Steiner
发明人： James M. Donohue , Ronald J. Carter , Kenton W. Fiske , Daniel L. Mueller , Donald S. Post , Edward G. Reehil , Edward L. Steiner
IPC分类号： G03G21/00 , B42C1/00 , B65H39/11 , G03G15/04 , G03G15/36 , G03G21/02 , G03G21/14 , G03G15/00
CPC分类号： G03G21/14
摘要： A processing system having central control including an automated condition responsive system for automatically sequencing and integrating the operation of selected external features utilizable in conjunction with an electrostatographic reproducing process. The processing operation is monitored by means of a central timing control initiated in accordance with a preprogrammed sequence for each of the peripheral operations to be performed in conjunction with the central processing sequence. Sequence control is provided for controlling the sequencing of the peripheral operation in accordance with the timing cycles controlling the central reproducing process. More specifically, control means are set up for automatic document handling, sorting, billing, and jam and recovery control. By utilization of central command logic and separate processing logic, integration of all these operations in accordance with externally controlled program operation is achieved.
摘要翻译：一种具有中央控制的处理系统，包括自动化状况响应系统，用于自动排序并整合可与电静态再现处理结合使用的所选择的外部特征的操作。通过中央定时控制来监视处理操作，该中央定时控制是根据与中央处理序列一起执行的每个外围操作的预编程序列发起的。提供了顺序控制，用于根据控制中央再现处理的定时周期来控制外围操作的排序。更具体地，设置控制装置用于自动文件处理，分类，计费和卡纸和恢复控制。通过利用中央命令逻辑和单独的处理逻辑，实现了所有这些操作根据外部控制的程序操作的集成。

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