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    • 1. 发明授权
    • High-speed universal scaler
    • 高速通用刻度机
    • US4983966A
    • 1991-01-08
    • US470473
    • 1990-01-26
    • Donald J. GroneRandy J. Kelsey
    • Donald J. GroneRandy J. Kelsey
    • H03M7/12
    • H03M7/12
    • A high-speed universal scaler operates in real time, accepting as an input an N-bit binary data word which is to be scaled (multiplied) by a scale factor specified in units per bit. The input data word is divided into M-bit sections which are provided (together with a count value indicating the position of the M-bit section within the input data word and a scale indicator value specifying which of a plurality of programmed scale factors values is to be used) sequentially as scaling addresses specifying binary coded decimal scale data in a scale memory. The sequential outputs of the scale memory in response to the scaling addresses are summed. When the sequence of addresses has been completed and all of the sequential memory outputs have been summed, the resulting sum will be a scaled binary coded decimal value equivalent to the input data word.
    • 高速通用缩放器实时操作,接受作为输入的N位二进制数据字,该字节将以每位单位指定的比例因子进行缩放(乘以)。 输入数据字被分成M位部分(连同指示输入数据字中的M位部分的位置的计数值以及指定多个编程的比例因子值中的哪一个是比例指标值 被顺序地用作在缩放存储器中指定二进制编码十进制尺度数据的缩放地址。 响应于缩放地址的比例存储器的顺序输出被相加。 当地址序列已经完成并且所有顺序存储器输出被求和时,所得到的和将是与输入数据字相当的缩放二进制编码十进制值。
    • 2. 发明授权
    • Counter-based simulated target generator
    • 基于计数器的模拟目标发生器
    • US4737792A
    • 1988-04-12
    • US876554
    • 1986-06-20
    • Donald J. Grone
    • Donald J. Grone
    • G01S7/40G09B9/54
    • G01S7/4052G09B9/54G01S2007/4082
    • Apparatus and a method for generating simulated target signals for testing a radar system is disclosed. The fundamental timing intervals for each pulse of the simulated target signal are generated based upon the contents of a high-speed continuously running digital counter. The resolution of the system is determined by the clock rate utilized to increment the counter. Simulated target signals are generated by utilizing an adder to add the desired range to the contents of the counter at a time interval corresponding to each pulse of the radar sync signal. The output signal of the adder corresponds to the expected output of the counter at a time corresponding to the return pulse associated with the transmit sync signal. These values are stored in a digital memory at sequential address locations. The stored values are sequentially read to produce at the output of the memory a digital signal corresponding to the value of the high-speed counter at the time that the return pulse is to be generated. The output data of the memory is compared to the contents of the counter and when they are found to be equal, a pulse of the simulated target signal is generated and the read address to the memory is incremented one count. This process is repeated for each pulse of the transmit sync signal to generate at the output a pulse train with each pulse of the output being delayed from its corresponding pulse of the transmit sync signal by the value determined by the range signal.
    • 公开了用于产生用于测试雷达系统的模拟目标信号的装置和方法。 基于高速连续运行的数字计数器的内容生成模拟目标信号的每个脉冲的基本定时间隔。 系统的分辨率由用于增加计数器的时钟速率决定。 通过利用加法器在与雷达同步信号的每个脉冲相对应的时间间隔将期望的范围加到计数器的内容上来产生模拟的目标信号。 加法器的输出信号对应于与对应于与发送同步信号相关联的返回脉冲的时间的计数器的预期输出。 这些值存储在顺序地址位置的数字存储器中。 存储的值被依次读取,以在存储器的输出端产生对应于在产生返回脉冲时高速计数器的值的数字信号。 将存储器的输出数据与计数器的内容进行比较,并且当它们被发现相等时,产生模拟目标信号的脉冲,并且向存储器读取的地址增加一个计数。 对于发送同步信号的每个脉冲重复该过程,以在输出端产生脉冲序列,其中输出的每个脉冲从发射同步信号的相应脉冲延迟由范围信号确定的值。
    • 4. 发明授权
    • System and method for simulating targets for a radar receiver utilizing
an optical link
    • 用于模拟使用光链路的雷达接收机的目标的系统和方法
    • US5047782A
    • 1991-09-10
    • US532835
    • 1990-06-04
    • Stanley Y. LewDonald J. Grone
    • Stanley Y. LewDonald J. Grone
    • G01S7/40
    • G01S7/4052G01S2007/4095
    • Both a system and a method for simulating targets for a radar system is disclosed herein which generally comprises a test target generator having an input slaved to the pulse transmit frequencies of the radar system for generating a target simulating signal, a horn antenna for emitting the target simulating signal back to the radar receiver, a laser-operated optical transmission link having a single mode fiber optic cable for transmitting the target simulating signal from the test target generator to the horn antenna via optical carrier, and an amplification and processing circuit system connected between the output of the optical transmission link and the input of the horn antenna for increasing the amplitude of the target simulating signal to a level that is detectable by the radar receiver, and for further processing the signal. The test target generator also generates control signals indicative of a desired amplitude of the resulting target simulating signal, and the system preferably includes a controller in the form of a microprocessor whose input receives the control signal generated by the target generator, and whose output is connected to the amplifier system of the amplification and processing circuit. A phase shift circuit may be included in the processing circuit for both compensating for phase distortions that result from the impedances inherent in the remote transmission of the target simulating signal, and for providing a further means for selectively modifying the signature characteristics of the target simulating signal.
    • 本文公开了一种用于模拟雷达系统的目标的系统和方法,其通常包括测试目标发生器,其具有从属于雷达系统的脉冲发射频率的输入,用于产生目标模拟信号,用于发射目标的喇叭天线 模拟信号回到雷达接收机,具有单模光纤电缆的激光操作光传输链路,用于经由光载波将目标模拟信号从测试目标发生器传输到喇叭天线,以及放大和处理电路系统 光传输链路的输出和喇叭天线的输入,用于将目标模拟信号的幅度增加到可由雷达接收机检测的水平,并用于进一步处理该信号。 测试目标发生器还产生指示所得到的目标仿真信号的期望振幅的控制信号,并且系统优选地包括微处理器形式的控制器,其输入接收由目标发生器产生的控制信号,并且其输出被连接 到放大器系统的放大和处理电路。 相移电路可以包括在处理电路中,用于补偿由目标模拟信号的远程传输中固有的阻抗引起的相位失真,并且用于提供用于选择性地修改目标仿真信号的签名特性的另一装置 。