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1. 发明授权

US07119714B2 Multi-bit digital input using a single pin 有权
标题翻译：使用单个引脚的多位数字输入
公开(公告)号：US07119714B2
公开(公告)日：2006-10-10
申请号：US11222996
申请日：2005-09-09
申请人： David M Dwelley , Robert L Reay
发明人： David M Dwelley , Robert L Reay
IPC分类号： G08C19/16
CPC分类号： H03K19/1732 , H04L25/49
摘要： Electronic devices, and methods, for transmitting, transferring and/or conveying a multi-bit digital signal as a voltage signal via a single pin. Devices and methods according to the invention substantially reduce the pin count of a device because inputting of a multi-bit digital signal preferably does not use more than one input pin. In addition, the speed of transmission is improved because the multi-bit digital signal is transmitted as a voltage signal substantially at one time as opposed to serially.
摘要翻译：用于通过单个引脚传输，传送和/或传送多位数字信号作为电压信号的电子设备和方法。根据本发明的装置和方法基本上减少了装置的引脚数，因为多位数字信号的输入优选地不使用多于一个的输入引脚。此外，与串行相反，多位数字信号基本上一次作为电压信号发送，从而提高了传输速度。

2. 发明授权

US06404251B1 Systems and methods for linearly varying a pulse-width modulation signal with a control signal 有权
标题翻译：用于通过控制信号线性地改变脉宽调制信号的系统和方法
公开(公告)号：US06404251B1
公开(公告)日：2002-06-11
申请号：US09536271
申请日：2000-03-27
申请人： David M. Dwelley , Trevor W. Barcelo
发明人： David M. Dwelley , Trevor W. Barcelo
IPC分类号： H03K3017
CPC分类号： H03K7/08
摘要： A linear pulse-width modulator system is provided. The pulse-width modulation system of the present invention provides a pulse-width modulated (PWM) signal from a control voltage. The PWM signal varies linearly with the control voltage over a full range of duty cycles. The pulse width modulation system of the present invention has as plurality of comparators, each having one input coupled to a control voltage and a second input coupled to a periodic waveform signal provide by a waveform generator. The periodic waveform signals are identical except that each waveform is time delayed with respect to the other waveform signals. The outputs the comparators are coupled to a multiplexer which selects the output of each comparator as the PWM signal for a time interval corresponding to when the output signal of the comparator has substantially constant propagation delays. The propagation delays in the a comparator's output signal are substantially constant when the periodic waveform signal input of the comparator is not near the its minimum or maximum voltage.
摘要翻译：提供线性脉宽调制器系统。本发明的脉宽调制系统提供来自控制电压的脉宽调制（PWM）信号。在整个占空比范围内，PWM信号与控制电压线性变化。本发明的脉冲宽度调制系统具有多个比较器，每个具有耦合到控制电压的一个输入端和耦合到由波形发生器提供的周期波形信号的第二输入。周期波形信号是相同的，除了每个波形相对于其他波形信号是时间延迟的。比较器的输出耦合到多路复用器，该多路复用器选择每个比较器的输出作为PWM信号，该时间间隔对应于当比较器的输出信号具有基本上恒定的传播延迟时。当比较器的周期性波形信号输入不接近其最小或最大电压时，比较器的输出信号中的传播延迟基本上是恒定的。

3. 发明授权

US06522118B1 Constant-current/constant-voltage current supply 有权
标题翻译：恒流/恒压电源
公开(公告)号：US06522118B1
公开(公告)日：2003-02-18
申请号：US09837658
申请日：2001-04-18
申请人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
发明人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
IPC分类号： G05F316
CPC分类号： H02M3/158 , G05F3/262
摘要： Methods and circuits implementing a constant-current/constant-voltage circuit architecture are provided. The methods and circuits preferably provide a charging system that provides current to a load using a fixed current until the load is charged. When the load is charged, the methods and circuits preferably provide a variable current to the load in order to maintain the voltage level across the load. This variable current varies according to the voltage across the load. In one embodiment of the invention, a constant power current may also be used as one of the load charging currents. The constant power current may act as a limit on the charging circuit's power output.
摘要翻译：提供实现恒流/恒压电路架构的方法和电路。方法和电路优选地提供一种充电系统，其使用固定电流向负载提供电流，直到负载被充电。当负载充电时，方法和电路优选地向负载提供可变电流，以便跨过负载保持电压电平。该可变电流根据负载上的电压而变化。在本发明的一个实施例中，恒定功率电流也可以用作负载充电电流之一。恒定功率电流可充当充电电路的功率输出限制。

4. 发明授权

US06967591B1 Multi-bit digital input using a single pin 有权
标题翻译：使用单个引脚的多位数字输入
公开(公告)号：US06967591B1
公开(公告)日：2005-11-22
申请号：US10124658
申请日：2002-04-15
申请人： David M. Dwelley , Robert L. Reay
发明人： David M. Dwelley , Robert L. Reay
IPC分类号： H03K19/173 , H03M5/20 , H04L25/49 , G08C19/16
CPC分类号： H03K19/1732 , H04L25/49
摘要： Electronic devices, and methods, for transmitting, transferring and/or conveying a multi-bit digital signal as a voltage signal via a single pin. Devices and methods according to the invention substantially reduce the pin count of a device because inputting of a multi-bit digital signal preferably does not use more than one input pin. In addition, the speed of transmission is improved because the multi-bit digital signal is transmitted as a voltage signal substantially at one time as opposed to serially.
摘要翻译：用于通过单个引脚传输，传送和/或传送多位数字信号作为电压信号的电子设备和方法。根据本发明的装置和方法基本上减少了装置的引脚数，因为多位数字信号的输入优选地不使用多于一个的输入引脚。此外，与串行相反，多位数字信号基本上一次作为电压信号发送，从而提高了传输速度。

5. 发明授权

US06819094B2 Constant-current/constant-voltage circuit architecture 有权
公开(公告)号：US06819094B2
公开(公告)日：2004-11-16
申请号：US10716129
申请日：2003-11-17
申请人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
发明人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
IPC分类号： G05F316
CPC分类号： H02M3/158 , G05F3/262
摘要： Methods and circuits implementing a constant-current/constant-voltage circuit architecture are provided. The methods and circuits preferably provide a charging system that provides current to a load using a fixed current until the load is charged. When the load is charged, the methods and circuits preferably provide a variable current to the load in order to maintain the voltage level across the load. This variable current varies according to the voltage across the load. In one embodiment of the invention, a constant power current may also be used as one of the load charging currents. The constant power current may act as a limit on the charging circuit's power output.

6. 发明授权

US06570372B2 Constant-current/constant-voltage current supply 有权
公开(公告)号：US06570372B2
公开(公告)日：2003-05-27
申请号：US10106499
申请日：2002-03-27
申请人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
发明人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
IPC分类号： G05F316
CPC分类号： H02M3/158 , G05F3/262
摘要： Methods and circuits implementing a constant-current/constant-voltage circuit architecture are provided. The methods and circuits preferably provide a charging system that provides current to a load using a fixed current until the load is charged. When the load is charged, the methods and circuits preferably provide a variable current to the load in order to maintain the voltage level across the load. This variable current varies according to the voltage across the load. In one embodiment of the invention, a constant power current may also be used as one of the load charging currents. The constant power current may act as a limit on the charging circuit's power output.

7. 发明授权

US06307356B1 Voltage mode feedback burst mode circuit 失效
标题翻译：电压模式反馈突发模式电路
公开(公告)号：US06307356B1
公开(公告)日：2001-10-23
申请号：US09099409
申请日：1998-06-18
申请人： David M. Dwelley
发明人： David M. Dwelley
IPC分类号： G05F140
CPC分类号： H02M3/156
摘要： A voltage-mode feedback switching regulator circuit capable of automatically entering and exiting burst mode is provided. When the load current is low, the switching regulator utilizes a fixed minimum non-zero duty cycle generator to override a pulse-width modulator generator and provide a minimum ON-cycle to a power switch in the switching regulator. This drives the required duty cycle generated by the pulse-width modulator lower. When the pulse-width modulator is driven so low that it requires a zero duty cycle, digital logic, which has been receiving the duty cycle of the pulse-width modulator, commands the switching regulator to enter burst mode and shut down. This principle can be utilized in either a non-synchronous or synchronous switching regulator with small modifications. In addition, the principle can be utilized for both step-down and step-up configurations.
摘要翻译：提供能够自动进入和退出突发模式的电压模式反馈开关调节器电路。当负载电流低时，开关稳压器利用固定的最小非零占空比发生器来覆盖脉宽调制器发生器，并为开关稳压器中的电源开关提供最小的导通周期。这将驱动脉宽调制器产生的所需占空比降低。当脉冲宽度调制器被驱动到低电平以使其需要零占空比时，已经接收到脉冲宽度调制器的占空比的数字逻辑命令开关稳压器进入脉冲串模式并关断。该原理可以用于具有小修改的非同步或同步开关调节器中。此外，该原理可以用于降压和升压配置。

8. 发明授权

US6166527A Control circuit and method for maintaining high efficiency in a buck-boost switching regulator 有权
标题翻译：用于在降压 - 升压开关稳压器中保持高效率的控制电路和方法
公开(公告)号：US6166527A
公开(公告)日：2000-12-26
申请号：US536266
申请日：2000-03-27
申请人： David M. Dwelley , Trevor W. Barcelo
发明人： David M. Dwelley , Trevor W. Barcelo
IPC分类号： H02M3/155 , H02M3/158 , G05F1/10
CPC分类号： H02M3/1582
摘要： A high efficiency control circuit for operating a buck-boost switching regulator is provided. The switching regulator can regulate an output voltage higher, lower, or the same as the input voltage. The switching regulator may be synchronous or non-synchronous. The control circuit can operate the switching regulator in buck mode, boost mode, or buck-boost mode. In buck mode, the switching regulator regulates an output voltage that is less than the input voltage. In boost mode, the switching regulator regulates an output voltage that is greater than the input voltage. In buck and boost modes, less than all of the switches are switched ON and OFF to regulate the output voltage to conserve power. In buck-boost mode, all of the switches switch ON and OFF to regulate the output voltage to a value that is greater than, less than, or equal to the input voltage.
摘要翻译：提供了一种用于操作降压 - 升压开关调节器的高效率控制电路。开关稳压器可以调节输入电压的高低，或等同于输入电压。开关稳压器可以是同步或不同步的。控制电路可以在降压模式，升压模式或降压 - 升压模式下操作开关稳压器。在降压模式下，开关稳压器调节小于输入电压的输出电压。在升压模式下，开关稳压器调节大于输入电压的输出电压。在降压和升压模式下，小于所有开关都被接通和关断以调节输出电压以节省功率。在降压 - 升压模式下，所有开关都接通和关断，以将输出电压调节到大于，小于或等于输入电压的值。

9. 发明授权

US07239251B2 Multi-bit digital input using a single pin 有权
标题翻译：使用单个引脚的多位数字输入
公开(公告)号：US07239251B2
公开(公告)日：2007-07-03
申请号：US11223188
申请日：2005-09-09
申请人： David M Dwelley , Robert L Reay
发明人： David M Dwelley , Robert L Reay
IPC分类号： G08C19/16
CPC分类号： H03K19/1732 , H04L25/49
摘要： Electronic devices, and methods, for transmitting, transferring and/or conveying a multi-bit digital signal as a voltage signal via a single pin. Devices and methods according to the invention substantially reduce the pin count of a device because inputting of a multi-bit digital signal preferably does not use more than one input pin. In addition, the speed of transmission is improved because the multi-bit digital signal is transmitted as a voltage signal substantially at one time as opposed to serially.
摘要翻译：用于通过单个引脚传输，传送和/或传送多位数字信号作为电压信号的电子设备和方法。根据本发明的装置和方法基本上减少了装置的引脚数，因为多位数字信号的输入优选地不使用多于一个的输入引脚。此外，与串行相反，多位数字信号基本上一次作为电压信号发送，从而提高了传输速度。

10. 发明授权

US06700364B2 Constant-current/constant-voltage circuit architecture 有权
标题翻译：恒流/恒压电路架构
公开(公告)号：US06700364B2
公开(公告)日：2004-03-02
申请号：US10443299
申请日：2003-05-21
申请人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
发明人： Trevor W. Barcelo , Robert L. Reay , David M. Dwelley
IPC分类号： G05F316
CPC分类号： H02M3/158 , G05F3/262
摘要： Methods and circuits implementing a constant-current/constant-voltage circuit architecture are provided. The methods and circuits preferably provide a charging system that provides current to a load using a fixed current until the load is charged. When the load is charged, the methods and circuits preferably provide a variable current to the load in order to maintain the voltage level across the load. This variable current varies according to the voltage across the load. In one embodiment of the invention, a constant power current may also be used as one of the load charging currents. The constant power current may act as a limit on the charging circuit's power output.
摘要翻译：提供实现恒流/恒压电路架构的方法和电路。方法和电路优选地提供一种充电系统，其使用固定电流向负载提供电流，直到负载被充电。当负载充电时，方法和电路优选地向负载提供可变电流，以便跨过负载保持电压电平。该可变电流根据负载上的电压而变化。在本发明的一个实施例中，恒定功率电流也可以用作负载充电电流之一。恒定功率电流可充当充电电路的功率输出限制。

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