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1. 发明授权

US06887779B2 Integrated circuit structure 失效
标题翻译：集成电路结构
公开(公告)号：US06887779B2
公开(公告)日：2005-05-03
申请号：US10719495
申请日：2003-11-21
申请人： David J. Alcoe , Francis J. Downes, Jr. , Gerald W. Jones , John S. Kresge , Cheryl L. Tytran-Palomaki
发明人： David J. Alcoe , Francis J. Downes, Jr. , Gerald W. Jones , John S. Kresge , Cheryl L. Tytran-Palomaki
IPC分类号： H01L23/498 , H05K3/46 , H01L21/4763
CPC分类号： H01L23/49827 , H01L23/49822 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H05K3/4602 , H05K3/4641 , H05K2201/0215 , H05K2201/09536 , H05K2201/0959 , H05K2201/096 , H01L2924/00
摘要： A semiconductor chip carrier having an increased chip connector and plated through hole density. In particular, a substrate having a plurality of plated through holes therein, and a fatigue resistant redistribution layer thereon. The redistribution layer includes a plurality of vias selectively positioned over and contacting the plated through holes. The substrate further including a ground plane, two pair of signal planes, and two pair of power planes, wherein the second pair of power planes are located directly underneath the external dielectric layer. A buried plated through hole within the substrate.
摘要翻译：一种具有增加的芯片连接器和电镀通孔密度的半导体芯片载体。特别地，其中具有多个电镀通孔的基板和其上的抗疲劳再分布层。再分配层包括选择性地定位在电镀通孔上并接触电镀通孔的多个通孔。所述基板还包括接地平面，两对信号面和两对电源层，其中所述第二对电源层位于所述外部电介质层的正下方。衬底内埋入电镀通孔。

2. 发明授权

US07088008B2 Electronic package with optimized circuitization pattern 失效
标题翻译：电子封装具有优化的电路图案
公开(公告)号：US07088008B2
公开(公告)日：2006-08-08
申请号：US10392617
申请日：2003-03-20
申请人： David J. Alcoe , William Infantolino , Virendra R. Jadhav
发明人： David J. Alcoe , William Infantolino , Virendra R. Jadhav
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/49838 , H01L23/49811 , H01L23/49822 , H01L2224/16225 , H01L2224/73253 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/15312 , H01L2924/16195 , H05K1/113 , H05K1/114 , H05K1/115 , H05K1/116 , H05K3/3426 , H05K3/4602 , H05K2201/09454 , H05K2201/09472 , H05K2201/09509 , H05K2201/0979 , H05K2201/10318 , Y10T29/49149 , H01L2224/0401
摘要： An electronic package, such as a chip carrier, with an optimized circuit pattern having a circuitized substrate with a first and second circuit pattern is provided. The circuitized substrate includes a corner surface region. The second circuit pattern is electrically connected to the first circuit pattern on the corner surface region of the circuitized substrate and is positioned in such a manner so as to substantially inhibit cracking of the first circuit pattern during flexure of the chip carrier.
摘要翻译：提供具有电路图案的具有第一和第二电路图案的电路化基板的具有优化的电路图案的诸如芯片载体的电子封装。电路化基板包括拐角表面区域。第二电路图案电连接到电路化基板的角表面区域上的第一电路图案，并且以这样的方式定位，以便在芯片载体弯曲期间基本上抑制第一电路图案的破裂。

3. 发明授权

US06978542B2 Method of reforming reformable members of an electronic package and the resultant electronic package 失效
标题翻译：电子封装的可重整构件的重整方法和所得的电子封装
公开(公告)号：US06978542B2
公开(公告)日：2005-12-27
申请号：US10402289
申请日：2003-03-28
申请人： David J. Alcoe
发明人： David J. Alcoe
IPC分类号： H05K3/34 , H05K13/04 , H01R43/02
CPC分类号： H05K13/0465 , H01L2224/05568 , H01L2224/05573 , H01L2224/056 , H01L2224/10126 , H01L2924/01322 , H01L2924/09701 , H05K3/3436 , H05K2201/0133 , H05K2201/10265 , H05K2201/10977 , H05K2203/043 , H05K2203/0465 , H05K2203/306 , Y02P70/613 , Y10T29/49204 , Y10T29/49211 , Y10T29/49213 , H01L2924/00014
摘要： An electronic package includes a substrate having a contact pad thereon, a reformable member such as a solder ball positioned on the contact pad, and an elastic member positioned around the reformable member. The elastic member exerts a girdling force on the reformable member so that when the reformable member is softened, the elastic member elongates the reformable member. This elongation accommodates thermal and other stresses between the foregoing substrate and another substrate joined at the free end of the reformable member. An apparatus is also provided for positioning the elastic member on and around the reformable member.
摘要翻译：电子封装包括其上具有接触焊盘的衬底，位于接触焊盘上的诸如焊球的可重新构件，以及位于可重整构件周围的弹性构件。弹性构件在可重整构件上施加环形力，使得当可重整构件软化时，弹性构件使可重整构件伸长。该伸长率适应上述基底与在可重整构件的自由端连接的另一基底之间的热应力和其它应力。还提供了一种用于将弹性构件定位在可重整构件上和周围的装置。

4. 发明授权

US06455924B1 Stress-relieving heatsink structure and method of attachment to an electronic package 失效
标题翻译：应力消除散热器结构和附接到电子封装的方法
公开(公告)号：US06455924B1
公开(公告)日：2002-09-24
申请号：US09814589
申请日：2001-03-22
申请人： David J. Alcoe , Randall J. Stutzman
发明人： David J. Alcoe , Randall J. Stutzman
IPC分类号： H01L2302
CPC分类号： H01L23/367 , H01L23/42 , H01L2924/0002 , H01L2924/00
摘要： A stress-relieving heatsink structure and method of forming thereof for an electronic package, for instance, that including a semiconductor chip package which is mounted on a wired carrier, such as a circuitized substrate. The heatsink structure is constituted from a plurality of base structures which are joined along slits so as to impart a degree of flexibility to the electronic package inhibiting the forming of stresses tending to cause delamination of the package components.
摘要翻译：一种减轻应力的散热器结构及其形成方法，例如包括安装在诸如电路化基板的有线载体上的半导体芯片封装的电子封装。散热器结构由沿着狭缝结合的多个基座结构构成，以便赋予电子封装一定程度的柔性，从而抑制趋向于引起封装部件分层的应力的形成。

5. 发明申请

US20080164300A1 Method of making circuitized substrate with solder balls having roughened surfaces, method of making electrical assembly including said circuitized substrate, and method of making multiple circuitized substrate assembly 审中-公开
标题翻译：制造具有粗糙表面的焊球的电路化衬底的方法，包括所述电路化衬底的电气组件的制造方法以及制造多个电路化衬底组件的方法
公开(公告)号：US20080164300A1
公开(公告)日：2008-07-10
申请号：US11650520
申请日：2007-01-08
申请人： David J. Alcoe , Paul J. Hart
发明人： David J. Alcoe , Paul J. Hart
IPC分类号： B23K31/02 , B23K1/20
CPC分类号： B23K3/0623 , B23K2101/42 , H01L24/16 , H01L24/81 , H01L2224/05124 , H01L2224/05568 , H01L2224/05573 , H01L2224/81193 , H01L2224/81801 , H01L2924/01078 , H01L2924/01322 , H01L2924/14 , H01L2924/15311 , H05K3/3457 , H05K2201/10674 , H05K2203/0278 , H05K2203/0307 , H01L2924/00014
摘要： A method of making a circuitized substrate (e.g., a chip carrier) with solder balls thereon which are each formed in such a manner so as to have rough surfaces thereon, thereby providing enhanced connections with conductors (e.g., conductive sites) of an electronic device (e.g., a semiconductor chip). Methods of making an electrical assembly including both substrate and device, as well as this assembly and another substrate, thereby forming a multiple substrate assembly, are also provided.
摘要翻译：制造其上具有焊球的电路化基板（例如，芯片载体）的方法，每个方法使其上具有粗糙表面，从而提供与电子设备的导体（例如，导电部位）的增强连接（例如，半导体芯片）。还提供了制造包括基板和装置的电组件以及该组件和另一基板，从而形成多基板组件的方法。

6. 发明授权

US06949415B2 Module with adhesively attached heat sink 失效
标题翻译：模块带有粘附连接的散热器
公开(公告)号：US06949415B2
公开(公告)日：2005-09-27
申请号：US10787471
申请日：2004-02-26
申请人： David J. Alcoe , Thomas W. Dalrymple , Michael A. Gaynes , Randall J. Stutzman
发明人： David J. Alcoe , Thomas W. Dalrymple , Michael A. Gaynes , Randall J. Stutzman
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50 , H01L23/02 , H01L23/10 , H01L23/16 , H01L23/48
CPC分类号： H01L23/16 , H01L23/10 , H01L2224/16 , H01L2224/73253 , H01L2924/01012 , H01L2924/01019 , H01L2924/16195
摘要： A method and structure to adhesively couple a cover plate to a semiconductor device. A semiconductor device is electrically coupled to a substrate. A stiffener ring surrounding the semiconductor device is adhesively coupled to the substrate. A cover plate is adhesively coupled to both a top surface of the semiconductor device and a top surface of the stiffener ring using a first and second adhesive, respectively. The modulus of the first adhesive is less than the modulus of the second adhesive.
摘要翻译：一种用于将盖板粘合地耦合到半导体器件的方法和结构。半导体器件电耦合到衬底。围绕半导体器件的加强环粘合地耦合到衬底。分别使用第一和第二粘合剂将覆盖板粘合地耦合到半导体器件的顶表面和加强环的顶表面。第一粘合剂的模量小于第二粘合剂的模量。

7. 发明授权

US06570259B2 Apparatus to reduce thermal fatigue stress on flip chip solder connections 有权
公开(公告)号：US06570259B2
公开(公告)日：2003-05-27
申请号：US09814789
申请日：2001-03-22
申请人： David J. Alcoe , Eric A. Johnson , Matthew M. Reiss , Charles G. Woychik
发明人： David J. Alcoe , Eric A. Johnson , Matthew M. Reiss , Charles G. Woychik
IPC分类号： H01L2348
CPC分类号： H01L21/563 , H01L23/16 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01004 , H01L2924/01079 , H01L2924/01322 , H01L2924/09701 , H01L2924/10253 , H01L2924/13091 , H01L2924/00 , H01L2224/05639 , H01L2924/00014 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655
摘要： The present invention provides a package for a semiconductor chip that minimizes stresses and strains that arise from differential thermal expansion on chip-to-substrate or chip-to-card interconnections. A collar element of one or more elements is provided. Adhesive material connects the collar element to the electric device and to the substrate that supports it, forming a unitary electrical package.

8. 发明授权

US5873740A Electrical connector system with member having layers of different durometer elastomeric materials 失效
标题翻译：电连接器系统，其具有不同硬度弹性体材料层
公开(公告)号：US5873740A
公开(公告)日：1999-02-23
申请号：US4681
申请日：1998-01-07
申请人： David J. Alcoe , William L. Brodsky , David V. Caletka
发明人： David J. Alcoe , William L. Brodsky , David V. Caletka
IPC分类号： H01R12/04 , H01R13/24 , H01R43/24 , H01R9/09
CPC分类号： H01R13/2414 , H01R43/24
摘要： An electrical connector assembly which utilizes a double layered elastomeric for a pressure exertion member wherein the two, individual layers are of different hardness. The first layer is of a relatively low durometer elastomeric material while the second layer is of higher durometer elastomeric material and includes several projections, e.g., for engaging a circuitized substrate such as a flexible circuit. Both layers preferably have the same spring rate, while the projections of the second layer may possess a variety of different configurations, e.g., cylindrical or boxlike. The individual projections may each include extension portions which in turn are positioned within corresponding openings within the substantially solid first layer.
摘要翻译：一种电连接器组件，其使用双层弹性体用于压力消耗构件，其中两个单独的层具有不同的硬度。第一层具有相对较低的硬度弹性体材料，而第二层具有较高硬度的弹性体材料，并且包括多个突起，例如用于接合诸如柔性电路的电路化基底。两层优选地具有相同的弹簧速率，而第二层的突起可以具有各种不同的构造，例如圆柱形或盒状。各个突起可以各自包括延伸部分，该延伸部分又位于基本上固体的第一层内的对应的开口内。

9. 发明授权

US07972178B2 High density connector for interconnecting fine pitch circuit packaging structures 有权
标题翻译：用于互连细间距电路封装结构的高密度连接器
公开(公告)号：US07972178B2
公开(公告)日：2011-07-05
申请号：US12789642
申请日：2010-05-28
申请人： Benson Chan , David J. Alcoe
发明人： Benson Chan , David J. Alcoe
IPC分类号： H01R31/06
CPC分类号： H05K7/1061 , Y10T29/49117
摘要： A pinned interposer and mating sockets to facilitate removable mounting of high connection density micro devices between a pair of substrates in compact electronic circuit packages. The pinned interposer has an inner set of contacts, typically in a rectangular array, that, in cooperation with a mating socket, allows pluggable connection of a micro device such as a MEMS device connected to a first printed circuit substrate. An outer set of contacts on the interposer provides electrical interconnection between the first substrate and a second substrate located atop the high connection density micro device, thereby effectively sandwiching the micro device between the first and second substrates. The outer set of contacts may be disposed in a circular array.
摘要翻译：插入式插入器和配合插座，以便于在紧凑型电子电路封装中的一对基板之间移除高连接密度微器件的安装。固定插入件具有一组通常为矩形阵列的内部触点，其与配合插座配合，允许诸如连接到第一印刷电路基板的MEMS装置的微型装置的可插拔连接。插入器上的外部一组触点提供位于高连接密度微器件顶部的第一衬底和第二衬底之间的电互连，从而将微器件有效地夹在第一和第二衬底之间。外套接触件可以以圆形阵列布置。

10. 发明授权

US07629684B2 Adjustable thickness thermal interposer and electronic package utilizing same 失效
标题翻译：可调节厚度的热插入器和使用它的电子封装
公开(公告)号：US07629684B2
公开(公告)日：2009-12-08
申请号：US11396711
申请日：2006-04-04
申请人： David J. Alcoe , Varaprasad V. Calmidi
发明人： David J. Alcoe , Varaprasad V. Calmidi
IPC分类号： H01L23/34
CPC分类号： H01L23/3737 , H01L23/3735 , H01L23/433 , H01L24/31 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01079 , H01L2924/01087 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/3011
摘要： An electronic package which includes a substrate (e.g., a chip carrier substrate or a PCB), an electronic component (e.g., a semiconductor chip), a heatsink and a thermal interposer for effectively transferring heat from the chip to the heatsink. The interposer includes a compressible, resilient member (e.g., an elastomeric pad) and a plurality of thin, metallic sheets (e.g., copper foils) and the thickness thereof can be adjusted by altering the number of such foils.
摘要翻译：包括衬底（例如，芯片载体衬底或PCB），电子部件（例如，半导体芯片），散热器和热插入件的电子封装件，用于将热量从芯片有效地传递到散热器。插入器包括可压缩的弹性构件（例如，弹性垫）和多个薄的金属片（例如铜箔），并且其厚度可以通过改变这种箔的数量来调节。

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