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    • 3. 发明授权
    • Single output transistor output stage for interface applications
    • 用于接口应用的单输出晶体管输出级
    • US5988819A
    • 1999-11-23
    • US24859
    • 1998-02-17
    • Sui Ping ShiehPirooz ParvarandehDavid Bingham
    • Sui Ping ShiehPirooz ParvarandehDavid Bingham
    • H03K19/003G05F1/10
    • H03K19/00315
    • An interface output stage includes a pull-up circuit and a pull-down circuit connected to a positive power supply signal line having a first voltage, an output signal line having an output voltage and a negative power supply signal line having a second voltage. The pull-up circuit includes a single output transistor and a body snatcher circuit, both interconnected between the positive power supply signal line and the output signal line. The body snatcher circuit ties the bodies of the output transistor and the transistors forming the body snatcher circuit to either the first voltage or the output voltage. The pull-down circuit is designed generally similar to the pull-up circuit to tie bodies of its transistors to either the output voltage or the second voltage.
    • 接口输出级包括上拉电路和连接到具有第一电压的正电源信号线,具有输出电压的输出信号线和具有第二电压的负电源信号线的下拉电路。 上拉电路包括在正电源信号线和输出信号线之间互连的单个输出晶体管和主体捕获电路。 身体拾取器电路将输出晶体管的主体和形成主体捕获电路的晶体管连接到第一电压或输出电压。 下拉电路的设计大体类似于将其晶体管的主体连接到输出电压或第二电压的上拉电路。
    • 4. 发明授权
    • Automatic pulse top optimization circuit for an ionizing radiation
spectroscopy system
    • 用于电离辐射光谱系统的自动脉冲优化电路
    • US5821533A
    • 1998-10-13
    • US807753
    • 1997-02-27
    • Russell David BinghamJesse Ursery, Jr.
    • Russell David BinghamJesse Ursery, Jr.
    • H03H17/02H03H17/00G01T1/22
    • H03H17/0225
    • An automatic pulse top optimization circuit for an ionizing radiation spectroscopy system includes a conversion circuit, responsive to random analog input pulses passing through the system, for converting the random analog pulses to digital pulses; a programmable shaping filter, responsive to the digital pulses, for producing an output of predetermined shape which maximizes the precision and accuracy of the anticipated measurement; pulse shape sampling means including means for defining a window for sampling the top of the pulse and means for sampling the pulses during that window to determine the presence of a deviation from the predetermined shape; and a control circuit, responsive to the pulse shaped sampling means, for programming the programmable shaping filter to compensate for a deviation in the predetermined shape.
    • 用于电离辐射光谱系统的自动脉冲顶部优化电路包括响应于通过系统的随机模拟输入脉冲的转换电路,用于将随机模拟脉冲转换成数字脉冲; 可编程整形滤波器,响应于数字脉冲,用于产生预定形状的输出,其使预期测量的精度和精度最大化; 脉冲形状采样装置包括用于定义用于对脉冲的顶部进行采样的窗口的装置,以及用于在该窗口期间采样脉冲以确定存在与预定形状的偏差的装置; 以及控制电路,响应于脉冲形状采样装置,用于编程可编程整形滤波器以补偿预定形状的偏差。
    • 5. 发明授权
    • Reverse current prevention method and apparatus and reverse current
guarded low dropout circuits
    • 反向电流预防方法和装置以及反向电流保护的低压差电路
    • US5594381A
    • 1997-01-14
    • US235688
    • 1994-04-29
    • David Bingham
    • David Bingham
    • G01R19/165H03K3/01
    • G01R19/16538H03K2217/0018
    • A reverse current limited circuit configured to provide a reverse current limited low dropout voltage output. The reverse current limited circuit, coupled between a pair of terminals, comprises (i) a MOS pass transistor coupled in series between the first and second terminals, (ii) connection circuitry to connect the substrate of the MOS pass transistor to either one of the pair of terminals based on the relative magnitudes of the voltages measured on the pair of terminals, (iii) activation circuitry for turning on and off the MOS pass transistor based on the relative magnitudes of the voltages measured on the pair of terminals and (iv) comparison circuitry used to compare the voltages of the pair of terminals and to control the activation circuitry and the connection circuitry in response to the comparison made.
    • 反向电流限制电路,被配置为提供反向电流限制的低压差电压输出。 耦合在一对端子之间的反向电流限制电路包括:(i)串联耦合在第一和第二端子之间的MOS通过晶体管,(ii)连接电路,用于将MOS通过晶体管的衬底连接到 基于在所述一对端子上测量的电压的相对大小的一对端子,(iii)基于在所述一对端子上测量的电压的相对幅度来导通和关断所述MOS通过晶体管的激活电路,以及(iv) 比较电路用于比较一对终端的电压,并响应于进行比较来控制激活电路和连接电路。
    • 6. 发明授权
    • Integrated dual charge pump power supply and RS-232 transmitter/receiver
    • 集成双电荷泵电源和RS-232发射器/接收器
    • US4777577A
    • 1988-10-11
    • US117992
    • 1987-11-09
    • David BinghamCharles M. Allen
    • David BinghamCharles M. Allen
    • H01L27/092H02M3/07H02M7/25
    • H02M3/07H01L27/0921H02M2001/009
    • A monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude. The unipolar input voltage is placed across a first external transfer capacitor by a first set of MOS switches during a first time period. The unipolar input voltage source is placed in series with the first transfer capacitor and this series combination of voltages is placed across a first external reservoir capacitor by a second set of MOS switches during a second time period. The voltage appearing across the first external reservoir capacitor is placed on a second transfer capacitor during the first time period by a third set of MOS switches. The voltage across the second transfer capacitor is placed into a second external reservoir capacitor with its polarity inverted by a fourth set of MOS switches during the second time period. A dual-collector lateral junction transistor, formed during the conventional CMOS processing steps used to fabricate the MOS switches, is connected as voltage clamp between a ground potential and the two bipolar DC output lines of the power supply circuit to assure correct start-up conditions for the conduit. Gain reduction devices are placed in the semiconductor substrate to collect minority carriers which would otherwise be injected into inherent parasitic four layer PNPN junction devices created as a result of the architecture of the circuit, to prevent latch-up of the four layer devices. In a preferred embodiment, an RS-232 receiver and transmitter are contained on the same monolithic integrated circuit as the dual charge pump power supply.
    • 公开了一种包含反相/非反相倍压器电荷泵电路的单片集成电路,用于将单极电源电压转换为更大幅度的双极电源电压。 在第一时间段期间,单极输入电压由第一组MOS开关置于第一外部转移电容器之间。 单极输入电压源与第一传输电容器串联布置,并且在第二时间段期间,第二组MOS开关将该串联组合的电压放置在第一外部存储器电容器之间。 跨越第一外部储存电容器出现的电压在第一时间周期期间被第三组MOS开关置于第二转移电容器上。 在第二时间段期间,第二转移电容器两端的电压被放置在第二外部储存电容器中,其极性被第四组MOS开关反转。 在用于制造MOS开关的常规CMOS处理步骤期间形成的双集电极横向结结晶体管作为电压钳位在电源电路的地电位和两个双极直流输出线之间连接,以确保正确的启动条件 为管道。 增益减小装置放置在半导体衬底中以收集少数载流子,否则这些载流子将被注入到作为电路架构的结果而产生的固有寄生四层PNPN结器件中,以防止四层器件的锁存。 在优选实施例中,RS-232接收器和发射器包含在与双电荷泵电源相同的单片集成电路上。
    • 7. 发明授权
    • Sequential coordination of test execution and dynamic data
    • 测试执行和动态数据的顺序协调
    • US07243268B2
    • 2007-07-10
    • US10736835
    • 2003-12-17
    • David Bingham
    • David Bingham
    • G06F11/00
    • G06F11/2294
    • An apparatus having: an agent; and a first test session servlet running on the agent, receiving a test description in a predetermined format from a caller, threading a first test session that invokes the agent to run the at least one subtest. The test description has at least one predefined subtest, dynamic data, and predefined test parameters. The first test session servlet receives test results from the first test session, and sends the subtest results from the at least one subtest and the dynamic data back to the caller.
    • 具有:代理人的装置; 以及在所述代理上运行的第一测试会话小服务器,从呼叫者接收预定格式的测试描述,穿过调用所述代理运行所述至少一个子测试的第一测试会话。 测试描述具有至少一个预定义的子测验,动态数据和预定义的测试参数。 第一个测试会话servlet从第一个测试会话接收测试结果,并将来自至少一个子测试的子测试结果和动态数据发回给调用者。
    • 10. 发明申请
    • System and methods for a survivable remote network
    • 可靠的远程网络的系统和方法
    • US20060077955A1
    • 2006-04-13
    • US10960225
    • 2004-10-08
    • Behrouz PoustchiDavid Bingham
    • Behrouz PoustchiDavid Bingham
    • H04L12/66H04L12/56H04L12/28
    • H04L29/06027H04L65/103H04L65/104H04L65/1043H04L67/104H04L69/40H04M7/0063H04M7/0084
    • Systems and methods for a Survivable Branch Office are provided by embodiments of the invention. The Survivable Branch Office includes a plurality of interconnected packet-based network devices, wherein the Branch Office is adapted to operate in a first mode during which centralized telephony call processing services are supplied to the Branch Office by a Main Office via a connection between the Branch Office and the Main Office. The Branch Office is also adapted to operate in a second mode when the connection between the Branch Office and the Main Office is interrupted. In the second mode the plurality of interconnected packet-based network devices collectively provide telephony call processing services in a distributed manner for the Branch Office. The network devices in some instances are packet-based peer-to-peer terminal sets, wherein the terminal sets themselves can collectively provide required telephony services normally supplied by the Main Office, by operating in a peer-to-peer mode when connection is lost with the Main Office.
    • 通过本发明的实施例提供了一个可行的分支机构的系统和方法。 Survivable Branch Office包括多个互连的基于分组的网络设备,其中分支机构适于在第一模式下操作,在该模式期间,主办公室通过分支机构之间的连接向中心电话呼叫处理服务提供给分支机构 办公室和办公室。 当办事处和总部之间的联系中断时,分局也适应第二种模式运作。 在第二模式中,多个互连的基于分组的网络设备以分布式方式共同为分支机构提供电话呼叫处理服务。 在某些情况下,网络设备是基于分组的对等终端机,其中终端机本身可以通过在连接丢失时以对等模式操作来共同提供通常由主办公室提供的所需电话服务 与主要办公室。