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    • 5. 发明授权
    • Multiple data rate filtered modulation system for digital data
    • 用于数字数据的多数据速率滤波调制系统
    • US06539064B1
    • 2003-03-25
    • US09234948
    • 1999-01-21
    • Michael K. EllisThomas J. SchusterRonald L. MahanyDaniel E. Alt
    • Michael K. EllisThomas J. SchusterRonald L. MahanyDaniel E. Alt
    • H04L2732
    • H04L27/2017
    • A multi-rate data modulation circuit includes a multi-rate data conversion circuit and a modulator such as a direct digital synthesis circuit. The multi-rate data conversion circuit receives digital data at varying data rates, receives a data rate input corresponding to the digital data and converts the digital data to a converted output based upon the data rate input. The direct digital synthesis circuit receives the converted output and synthesizes a modulated output signal based upon the converted output. The multi-rate data conversion circuit may include a multi-rate converter, a multi-rate digital data filter, an output scaler and an adder. The multi-rate converter receives the digital data, the data rate input and a clock signal and converts the digital data to converted digital data. The multi-rate digital data filter receives the converted digital data and produces a filtered digital output. The output scaler receives the filtered digital output and produces a scaled and filtered digital output. Finally, the adder combines the scaled and filtered digital output with a center frequency input and produces the converted output. The multi-rate digital data filter may include a look-up table that produces filter parameters based upon the converted digital data and that operates at multiple data rates. The multi-rate digital data filter may include a digital data filter look-up table, a data rate decode circuit and a plurality of multiplexors. In such case, the data rate decode circuit receives the data rate input and produces control signals therefrom. Each of the plurality of multiplexors receives a portion of the converted digital data and control signals from the data rate decode circuit such that the multiplexors selectively provide the converted digital data to the digital data filter look-up table to produce the filtered digital output.
    • 多速率数据调制电路包括多速率数据转换电路和诸如直接数字合成电路的调制器。 多速率数据转换电路以变化的数据速率接收数字数据,接收对应于数字数据的数据速率输入,并且基于数据速率输入将数字数据转换成转换的输出。 直接数字合成电路接收转换后的输出,并根据转换后的输出合成调制输出信号。 多速率数据转换电路可以包括多速率转换器,多速率数字数据滤波器,输出缩放器和加法器。 多速率转换器接收数字数据,数据速率输入和时钟信号,并将数字数据转换为转换的数字数据。 多速率数字数据滤波器接收转换的数字数据并产生滤波后的数字输出。 输出缩放器接收滤波后的数字输出,并产生一个缩放和滤波的数字输出。 最后,加法器将缩放和滤波的数字输出与中心频率输入相结合,并产生转换的输出。 多速率数字数据滤波器可以包括基于转换的数字数据产生滤波器参数并以多个数据速率操作的查找表。 多速率数字数据滤波器可以包括数字数据滤波器查找表,数据速率解码电路和多个多路复用器。 在这种情况下,数据速率解码电路接收数据速率输入并产生控制信号。 多个多路复用器中的每一个从数据速率解码电路接收转换的数字数据和控制信号的一部分,使得多路复用器选择性地将转换后的数字数据提供给数字数据滤波器查找表,以产生经滤波的数字输出。
    • 7. 发明授权
    • Wireless communications system having reduced noise mode operation capability
    • 具有降低的噪声模式操作能力的无线通信系统
    • US08170627B2
    • 2012-05-01
    • US12002303
    • 2007-12-15
    • Robert J. GrabonJohn K. RohdeRobert J. TraegerPatrick R. ErbDaniel E. AltDaniel J. Klostermann
    • Robert J. GrabonJohn K. RohdeRobert J. TraegerPatrick R. ErbDaniel E. AltDaniel J. Klostermann
    • H04M1/00
    • H04B15/02H04B2215/066
    • A wireless communication system having a terminal unit operates in a reduced noise state during receipt of a wireless transmission from a control unit. The terminal unit includes terminal circuitry, a radio and noise management circuitry. The noise management circuitry partially or fully disables operation of the terminal circuitry during a receipt by the radio. Noise management circuitry may disable a terminal processor, disable interrupts, buffer interrupts and otherwise modify operation of the terminal circuitry to reduce generated radio noise that would otherwise interfere with receipt of data by the radio. The wireless communication system includes noise management circuitry located in a control unit that operates in conjunction with noise management circuitry in a first terminal unit and a second terminal unit to schedule transmissions from the control unit. These scheduled transmissions allow the terminal units to perform required processing functions outside of the reduced noise period.
    • 具有终端单元的无线通信系统在从控制单元接收无线传输期间以降低的噪声状态工作。 终端单元包括终端电路,无线电和噪声管理电路。 噪声管理电路部分地或完全地禁止终端电路在无线电接收期间的操作。 噪声管理电路可以禁用终端处理器,禁止中断,缓冲中断以及否则修改终端电路的操作,以减少否则会干扰无线电接收数据的产生的无线电噪声。 无线通信系统包括位于控制单元中的噪声管理电路,其与第一终端单元中的噪声管理电路和第二终端单元一起操作以调度来自控制单元的传输。 这些调度的传输允许终端单元在减少的噪声周期之外执行所需的处理功能。
    • 8. 发明申请
    • Wireless communications system having reduced noise mode operation capability
    • 具有降低的噪声模式操作能力的无线通信系统
    • US20080212724A1
    • 2008-09-04
    • US12002303
    • 2007-12-15
    • Robert J. GrabonJohn K. RohdeRobert J. TraegerPatrick R. ErbDaniel E. AltDaniel J. Klostermann
    • Robert J. GrabonJohn K. RohdeRobert J. TraegerPatrick R. ErbDaniel E. AltDaniel J. Klostermann
    • H04B1/10
    • H04B15/02H04B2215/066
    • A wireless communication system having a terminal unit operates in a reduced noise state during receipt of a wireless transmission from a control unit. The terminal unit includes terminal circuitry, a radio and noise management circuitry. The noise management circuitry partially or fully disables operation of the terminal circuitry during a receipt by the radio. Noise management circuitry may disable a terminal processor, disable interrupts, buffer interrupts and otherwise modify operation of the terminal circuitry to reduce generated radio noise that would otherwise interfere with receipt of data by the radio. The wireless communication system includes noise management circuitry located in a control unit that operates in conjunction with noise management circuitry in a first terminal unit and a second terminal unit to schedule transmissions from the control unit. These scheduled transmissions allow the terminal units to perform required processing functions outside of the reduced noise period.
    • 具有终端单元的无线通信系统在从控制单元接收无线传输期间以降低的噪声状态工作。 终端单元包括终端电路,无线电和噪声管理电路。 噪声管理电路部分地或完全地禁止终端电路在无线电接收期间的操作。 噪声管理电路可以禁用终端处理器,禁止中断,缓冲中断以及否则修改终端电路的操作,以减少否则会干扰无线电接收数据的产生的无线电噪声。 无线通信系统包括位于控制单元中的噪声管理电路,其与第一终端单元中的噪声管理电路和第二终端单元一起操作以调度来自控制单元的传输。 这些调度的传输允许终端单元在减少的噪声周期之外执行所需的处理功能。
    • 10. 发明授权
    • Multiple date rate filtered modulation system for digital data
    • 用于数字数据的多日期滤波调制系统
    • US07298791B1
    • 2007-11-20
    • US10397057
    • 2003-03-25
    • Ronald L. MahanyThomas J. SchusterMichael K. EllisDaniel E. Alt
    • Ronald L. MahanyThomas J. SchusterMichael K. EllisDaniel E. Alt
    • H04L25/49
    • H04L27/2017
    • In an exemplary embodiment, a multi-rate data conversion circuit receives digital data at varying data rates, receives a data rate input corresponding to the digital data and converts the digital data to a converted output based upon the data rate input. A direct digital synthesis circuit receives the converted output and synthesizes a modulated output signal based upon the converted output. A multi-rate converter receives the digital data, the data rate input and a clock signal and converts the digital data to converted digital data. A multi-rate digital data filter receives the converted digital data and produces a filtered digital output. An output scaler receives the filtered digital output and produces a scaled and filtered digital output. Finally, an adder combines the scaled and filtered digital output with a center frequency input and produces the converted output.
    • 在一个示例性实施例中,多速率数据转换电路以变化的数据速率接收数字数据,接收对应于数字数据的数据速率输入,并且基于数据速率输入将数字数据转换成转换的输出。 直接数字合成电路接收转换的输出,并根据转换的输出合成调制的输出信号。 多速率转换器接收数字数据,数据速率输入和时钟信号,并将数字数据转换为转换的数字数据。 多速率数字数据滤波器接收转换的数字数据并产生滤波数字输出。 输出缩放器接收滤波后的数字输出并产生缩放和滤波的数字输出。 最后,加法器将缩放和滤波的数字输出与中心频率输入相结合,并产生转换的输出。