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    • 4. 发明申请
    • Media access control apparatus and method for guaranteeing quality of service in wireless LAN
    • 用于保证无线LAN服务质量的媒体访问控制装置和方法
    • US20050141548A1
    • 2005-06-30
    • US10917684
    • 2004-08-12
    • Ki KooDae Hwang
    • Ki KooDae Hwang
    • H04L12/28H04L12/413H04L12/56H04L12/66
    • H04W72/1242H04W28/14H04W84/12
    • The present invention relates to a media access control (MAC) apparatus and method for guaranteeing quality-of-service in a wireless local area network (LAN). The MAC method comprises: extracting a user priority from a frame received from an upper layer and separately storing a voice frame and a general frame according to an access category (AC); independently performing backoff operations for the voice frame and the general frame; determining whether the backoff operations for the voice frame and the general frame have simultaneously ended; if the backoff operations have simultaneously ended, transmitting the voice frame having a higher priority first and performing the backoff operation for the general frame; and if the backoff operations have not simultaneously ended, transmitting a frame whose backoff operation ends.
    • 本发明涉及一种用于保证无线局域网(LAN)中的服务质量的媒体接入控制(MAC)装置和方法。 MAC方法包括:根据接入类别(AC)从上层接收的帧中提取用户优先级,并单独存储语音帧和一般帧; 独立执行语音帧和通用帧的退避操作; 确定语音帧和一般帧的退避操作是否同时结束; 如果退避操作已经同时结束,则首先发送具有较高优先级的语音帧,并对一般帧执行退避操作; 并且如果退避操作没有同时结束,则发送退避操作结束的帧。
    • 7. 发明授权
    • Flat panel display apparatus with automatic tracking control
    • 具有自动跟踪控制的平板显示设备
    • US06201535B1
    • 2001-03-13
    • US09246133
    • 1999-02-08
    • Ho-Dae Hwang
    • Ho-Dae Hwang
    • G09G500
    • G09G5/008
    • A flat panel display apparatus includes a sampling clock generator for generating a sampling clock signal with a frequency corresponding to a synchronous signal supplied from a host, a delay circuit for delaying the sampling clock signal, a level converter for converting an analog video signal supplied from the host to have a given digital voltage level, a phase detector for detecting the phase difference between the digital voltage level video signal from the level converter and the sampling clock signal delayed by the delay circuit to generate a phase difference data, a comparator for comparing the phase difference data with a delay data corresponding to the synchronous signal, a micro-controller for generating the delay data to increase or decrease the delay time of the delay circuit to adjust the phase of the sampling clock signal in response to the output of the comparator, and an analog to digital converter for converting the analog video signal into corresponding digital video signal in response to the delayed sampling clock signal.
    • 平板显示装置包括:采样时钟发生器,用于产生具有对应于从主机提供的同步信号的频率的采样时钟信号,用于延迟采样时钟信号的延迟电路;电平转换器,用于转换从 主机具有给定的数字电压电平,相位检测器,用于检测来自电平转换器的数字电压电平视频信号与由延迟电路延迟的采样时钟信号之间的相位差,以产生相位差数据;比较器,用于比较 所述相位差数据具有对应于所述同步信号的延迟数据;微控制器,用于产生所述延迟数据以增加或减少所述延迟电路的延迟时间,以响应于所述延迟电路的输出来调整所述采样时钟信号的相位 比较器和用于将模拟视频信号转换成相应的数字视频的模数转换器 响应于延迟的采样时钟信号而被点亮。
    • 8. 发明授权
    • Tracking control circuit of a display
    • 跟踪显示器的控制电路
    • US6160542A
    • 2000-12-12
    • US204345
    • 1998-12-04
    • Ho-Dae Hwang
    • Ho-Dae Hwang
    • G09G3/36G09G3/20G09G5/00
    • G09G5/008
    • A display includes: a clock signal generator for generating a first sampling clock signal used for converting an analog video signal supplied from a host to a digital video signal; a tracking control circuit for generating tracking control data corresponding to a tracking adjustment key input; an A/D converter for converting the analog video signal to the digital video signal in synchronism with a second clock signal obtained by delaying the first sampling clock signal according to the tracking control data; a high frequency clock signal generator for generating a high frequency clock signal, and the tracking control circuit measuring the presently delayed time of the second sampling clock signal by means of the high frequency clock signal so as to adjust the delayed time according to the tracking control data.
    • 显示器包括:时钟信号发生器,用于产生用于将从主机提供的模拟视频信号转换为数字视频信号的第一采样时钟信号; 跟踪控制电路,用于产生对应于跟踪调整键输入的跟踪控制数据; A / D转换器,用于与根据跟踪控制数据延迟第一采样时钟信号而获得的第二时钟信号同步地将模拟视频信号转换成数字视频信号; 用于产生高频时钟信号的高频时钟信号发生器,并且跟踪控制电路借助于高频时钟信号测量第二采样时钟信号的当前延迟时间,以便根据跟踪控制调整延迟时间 数据。
    • 9. 发明授权
    • Pseudo-synchronizing signal generator for use in digital image
processing apparatus
    • 用于数字图像处理装置的伪同步信号发生器
    • US5966119A
    • 1999-10-12
    • US759598
    • 1996-12-05
    • Ho-Dae Hwang
    • Ho-Dae Hwang
    • H04N5/06G09G5/00G09G5/18H04N3/227H04N5/12H04N5/04
    • H04N5/123
    • A pseudo-synchronizing signal generator for use in a digital image processing apparatus is disclosed. The pseudo-synchronizing signal generation circuit comprising a pulse generating circuit for generating a train of predetermined pulses as being a dot clock oscillation signal for use with a digital image processing apparatus in response to a synchronizing signal input from an external source, a counting controller disposed to input a program data signal for synchronizing the program data signal with a pulse output by the pulse generating circuit and for outputting a program data enable signal, a down counter enabled by the program data enable signal synchronized with the clot clock oscillation signal so as to count down from a preset value, a detector for detecting when the down counting operation of the down counter reaches zero for generating a disable signal to be applied to the down counter and for generating a first pseudo-synchronizing signal, and a multiplexer to selectively outputting, as a second pseudo-synchronizing signal, a selected one of the first pseudo-synchronizing signal and the horizontal synchronizing signal in responsive to the program data signal. As a result, the circuit is able to generate a pseudo-synchronizing signal having a predetermined delay time duration with respect to its inherent synchronizing signal, in synchronization with a train of dot clock oscillation signal, thereby enabling a digital image processing apparatus to perform a positioning of a pictorial image being display on a variable visual monitor.
    • 公开了一种用于数字图像处理装置的伪同步信号发生器。 伪同步信号产生电路包括:脉冲发生电路,用于响应于从外部源输入的同步信号,产生预定脉冲序列作为与数字图像处理装置一起使用的点时钟振荡信号;计数控制器 输入用于使程序数据信号与由脉冲发生电路输出的脉冲同步的程序数据信号,并输出程序数据使能信号,通过与凝块时钟振荡信号同步的程序数据使能信号使能的递减计数器,以便 从预设值向下计数的检测器,用于检测下降计数器的向下计数操作何时达到零以产生要施加到递减计数器的禁用信号并用于产生第一伪同步信号的检测器,以及多路复用器选择性地输出 作为第二伪同步信号,选择第一伪同步信号si 并且响应于程序数据信号的水平同步信号。 结果,电路能够与点阵时钟振荡信号同步地产生具有相对于其固有同步信号的预定延迟持续时间的伪同步信号,从而使数字图像处理装置执行 在可变的视觉监视器上显示图形图像的定位。
    • 10. 发明授权
    • Oscillation and trigger circuit for vertical synchronizing signal
    • 用于垂直同步信号的振荡和触发电路
    • US5790112A
    • 1998-08-04
    • US648504
    • 1996-05-15
    • Ho-Dae Hwang
    • Ho-Dae Hwang
    • H03K3/282H03K5/13H04N5/04G09G5/00
    • H03K5/13H04N5/04
    • An oscillation and trigger circuit for a vertical synchronizing signal in a display apparatus, the oscillation and trigger circuit comprising: a pulse generator for generating a single pulse for each active cycle of the vertical synchronizing signal; a first signal detector having an input terminal connected to an output terminal of the pulse generator, for determining a state of no input of the vertical synchronizing signal whose frequency is less than a predetermined frequency and for generating a first predetermined signal indicative of the state; a second signal detector having input terminals connected to respective output terminals of the pulse generator and the first signal detector, for checking a time interval of the vertical synchronizing signal input to the pulse generator so as to output a second predetermined signal when the time interval exceeds a predetermined time period and for outputting the second predetermined signal responsive to the first predetermined signal input from the first signal detector; an input signal detector connected to the first signal detector, for determining an input of the vertical synchronizing signal; a multiplexer having a selection input terminal connected to receive the second predetermined signal output from an output terminal of the second signal detector, for selecting for output one of a first clock signal of a predetermined frequency and the vertical synchronizing signal; and a vertical oscillator having an input terminal connected to an output terminal of the multiplexer, for generating a vertical oscillation signal of a predetermined frequency in response to the selected one of the clock signal and the vertical synchronizing signal selected by the multiplexer.
    • 一种用于显示装置中的垂直同步信号的振荡和触发电路,所述振荡和触发电路包括:脉冲发生器,用于为所述垂直同步信号的每个有效周期产生单个脉冲; 第一信号检测器,其具有连接到脉冲发生器的输出端的输入端,用于确定频率小于预定频率的垂直同步信号的无输入状态,并产生指示状态的第一预定信号; 第二信号检测器,其具有连接到脉冲发生器和第一信号检测器的相应输出端的输入端,用于检查输入到脉冲发生器的垂直同步信号的时间间隔,以便当时间间隔超过时输出第二预定信号 预定时间段,并响应于从第一信号检测器输入的第一预定信号输出第二预定信号; 连接到第一信号检测器的输入信号检测器,用于确定垂直同步信号的输入; 多路复用器,其具有选择输入端,连接用于接收从第二信号检测器的输出端输出的第二预定信号,用于选择输出预定频率的第一时钟信号和垂直同步信号之一; 以及垂直振荡器,其具有连接到所述多路复用器的输出端子的输入端子,用于响应于由所述多路复用器选择的所述时钟信号和所述垂直同步信号中选择的一个产生预定频率的垂直振荡信号。