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1. 发明申请

US20210096071A1 SMOKE DETECTOR 有权
公开(公告)号：US20210096071A1
公开(公告)日：2021-04-01
申请号：US16948664
申请日：2020-09-28
申请人： Commissariat a I'Energie Atomique et aux Energies Alternatives
发明人： Roland PELISSON
IPC分类号： G01N21/53 , B08B13/00 , B08B1/00 , B08B1/04 , B08B9/00
摘要： The present disclosure concerns a smoke detector (1) including: a detection chamber, a baffle system surrounding the chamber enabling to isolate the chamber from outer light and enabling air to flow from the outside to the inside of the chamber, and a mechanical actuator capable of cleaning, in case of an obstruction, intervals between the elements.

2. 发明申请

US20210018488A1 METHOD AND SYSTEM FOR DETECTING AN ANALYTE PRESENT IN A LIQUID SPECIMEN 有权
公开(公告)号：US20210018488A1
公开(公告)日：2021-01-21
申请号：US16931535
申请日：2020-07-17
申请人： Commissariat a I'Energie Atomique et aux Energies Alternatives
发明人： Myriam-Laure CUBIZOLLES , Thomas BORDY , Frederic REVOL-CAVALIER
IPC分类号： G01N33/49 , G01N21/49 , G01N33/487
摘要： The invention relates to a method for detecting an analyte present in a liquid specimen, characterized in that it comprises steps of: injecting said liquid specimen into a detection chamber (23), said detection chamber (23) having a non-zero volume enclosing polymeric beads (25) covered with a reagent suitable for said analyte to be detected, capturing at least one image of at least one region of the detection chamber using a sensor (30), processing said image acquired by the sensor, this comprising determining a texture level of said acquired image, and determining a concentration of said analyte depending on the texture level determined for said image.

3. 发明申请

US20190221873A1 GROUP OF CELLS FOR POWER ADAPTATION OF ELECTROCHEMICAL REACTORS 审中-公开
公开(公告)号：US20190221873A1
公开(公告)日：2019-07-18
申请号：US16243275
申请日：2019-01-09
申请人： Commissariat a I'energie atomique et aux energies alternatives
发明人： Jean-Philippe POIROT-CROUVEZIER
IPC分类号： H01M8/1004 , H01M8/2465 , H01M8/0258 , C25B1/10 , C25B9/18 , C25B9/08 , C25B15/08
CPC分类号： H01M8/1004 , C25B1/10 , C25B9/08 , C25B9/18 , C25B15/08 , H01M4/861 , H01M4/8636 , H01M8/0258 , H01M8/241 , H01M8/2465 , H01M8/249 , H01M2008/1095
摘要： An assembly of electrochemical cells for an electrochemical reactor, including a first electrochemical cell, including a first membrane/electrode assembly including a first anode and a first cathode on either side of a proton exchange membrane; first and second flow guides positioned on either side of the first assembly; a second electrochemical cell, including a second membrane/electrode assembly including a second anode and a second cathode on either side of a proton exchange membrane; third and fourth flow guides on either side of the second membrane/electrode assembly; the first and third flow guides have one and the same geometry; the first anode and the second anode have different distributions of surface densities of electrocatalytic material on respective faces of the first and second proton exchange membranes.

4. 发明申请

US20180026036A1 INTEGRATED CIRCUIT COMPRISING TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES 有权
公开(公告)号：US20180026036A1
公开(公告)日：2018-01-25
申请号：US15652925
申请日：2017-07-18
申请人： Commissariat a I'energie atomique et aux energies alternatives
发明人： Francois ANDRIEU
IPC分类号： H01L27/092 , H01L29/78 , H01L29/06
CPC分类号： H01L27/0922 , H01L21/823828 , H01L27/0928 , H01L27/1203 , H01L29/0649 , H01L29/4966 , H01L29/66886 , H01L29/7848 , H01L29/78648
摘要： An integrated circuit comprising: first to third nMOS transistors with different threshold voltages, and first to third pMOS transistors with different threshold voltages, the nMOS transistors having channel regions made of silicon subjected to tensile stress and/or said pMOS transistors having channel regions made of SiGe subjected to compressive stress; a first well and a second well that are arranged underneath the nMOS transistors and underneath the pMOS transistors, respectively, with one and the same doping; two nMOS gate stacks comprising one and the same material, two of the nMOS gate stacks comprising materials having separate work functions, an nMOS gate stack having one and the same material as a pMOS gate stack, with the equation: Gp*Vdds−Gn*Gnds=Sn*|σn|+Sp* (|σp|−1.65*109)−VarCais+K.

5. 发明申请

US20160322784A1 Optical Device With Multisection Semiconductor Optical Amplifiers for Achieving Wide Optical Bandwidth and Large Output Power 审中-公开
标题翻译：具有多分辨半导体光放大器的光器件，用于实现宽光带宽和大输出功率
公开(公告)号：US20160322784A1
公开(公告)日：2016-11-03
申请号：US15139419
申请日：2016-04-27
申请人： Commissariat a I'Energie Atomique et aux Energies Alternatives
发明人： Romain Brenot , Mickael Faugeron
IPC分类号： H01S5/0625 , H01S5/343 , H01S5/50
CPC分类号： H01S5/0625 , H01S5/0014 , H01S5/3013 , H01S5/3434 , H01S5/5027
摘要： An optical device includes a first semiconductor optical amplifier having an active region embedded into a waveguide and including a first section intended for amplifying optical signals when it is crossed by a first current smaller than a chosen value inducing amplification over a large optical bandwidth, and a second section intended for amplifying the optical signals amplified by the first section when it is crossed by a second current greater than this chosen value, to deliver output optical signals with a large power.
摘要翻译：一种光学器件包括：第一半导体光放大器，其具有嵌入在波导中的有源区，并且包括第一部分，用于当第一部分被超过小于选择的值的第一电流，以便在大的光学带宽上引起放大时放大光信号;以及第二部分用于放大当第一部分被大于该选择值的第二电流交叉时由第一部分放大的光信号，以输出具有大功率的输出光信号。

6. 发明申请

US20150155600A1 ELECTROLYTIC COMPOSITION COMPRISING A COORDINATION COMPOUND INCLUDING LITHIUM AND AT LEAST ONE LIGAND OF THE TRIFLUOROMETHYLPHENATE TYPE 审中-公开
标题翻译：包含协调性化合物的电解质组合物，包括锂和至少一种三氟乙烯类型的配位体
公开(公告)号：US20150155600A1
公开(公告)日：2015-06-04
申请号：US14405375
申请日：2013-06-07
申请人： Commissariat a I'energie atomique et aux energies alternatives
发明人： Herve Galiano , Stephane Cadra , Jerome Thibonnet , Daniel Lemordant
IPC分类号： H01M10/0569 , H01M10/0525
CPC分类号： H01M10/0569 , H01M10/052 , H01M10/0525 , H01M10/0568 , H01M2300/0028
摘要： The invention relates to electrolytic compositions comprising: at least one coordination complex comprising lithium and one or several ligands thereof, this (these) ligand(s) corresponding to a phenate compound comprising at least one trifluoromethyl group; and at least one carbonate solvent.
摘要翻译：本发明涉及电解组合物，其包含：至少一种配位络合物，其包含锂和一个或多个配体，该（这些）配体对应于包含至少一个三氟甲基的酚盐化合物; 和至少一种碳酸酯溶剂。

7. 发明申请

US20140231916A1 Transistor with coupled gate and ground plane 有权
标题翻译：具有耦合栅极和接地层的晶体管
公开(公告)号：US20140231916A1
公开(公告)日：2014-08-21
申请号：US14156559
申请日：2014-01-16
申请人： STMicroelectronics SA , Commissariat a I'energie atomique et aux energies alternatives
发明人： Bastien Giraud , Jean-Philippe Noel , Maud Vinet
IPC分类号： H01L29/66 , H01L29/78
CPC分类号： H01L29/78 , H01L29/42392 , H01L29/66575 , H01L29/785 , H01L29/7855 , H01L29/7856 , H01L29/78696
摘要： An integrated circuit includes a silicon substrate, a ground plane above the substrate, a buried insulator layer above the ground plane, a silicon layer above the buried insulator layer and separated from the ground plane by the buried insulator layer, and an FDSOI transistor. The transistor has a channel adapted for being formed in the silicon layer, a source and drain in and/or on the silicon layer, and a gate covering an upper face of the channel and having a lateral portion covering a lateral face of the channel and above the ground plane. A distance between the lateral portion and the ground plane is not more than three nanometers and at least five times less than a thickness of the buried insulator layer between the ground plane and the silicon layer. The ground plane is separated from the gate by the buried insulator layer.
摘要翻译：集成电路包括硅衬底，衬底上方的接地平面，接地平面上方的掩埋绝缘体层，掩埋绝缘体层上方的硅层，并由掩埋绝缘体层与接地层分离，以及FDSOI晶体管。晶体管具有适于在硅层中形成的沟道，硅层中和/或硅层上的源极和漏极，以及覆盖沟道的上表面的栅极，并且具有覆盖沟道的侧面的侧面部分，以及在地面以上。横向部分和接地面之间的距离不大于接地平面和硅层之间的掩埋绝缘体层的厚度的三纳米至少五倍。接地层由掩埋绝缘体层与栅极分离。

8. 发明申请

US20130267049A1 METHOD FOR PRODUCING A STRUCTURE COMPRISING AT LEAST ONE ACTIVE PART HAVING ZONES OF DIFFERENT THICKNESSES 有权
标题翻译：生产包含至少一个具有不同厚度区域的有源部分的结构的方法
公开(公告)号：US20130267049A1
公开(公告)日：2013-10-10
申请号：US13682847
申请日：2012-11-21
申请人： Commissariat a I'energie atomique et aux energies alternatives
发明人： Philippe ROBERT , Sophie GIROUD
IPC分类号： B81C1/00
CPC分类号： B81C1/00134 , B81B2201/0264 , B81B2203/0109 , B81B2203/0136 , B81C1/00603 , B81C1/00801 , B81C2201/014
摘要： Method for producing a structure comprising an active part comprising a first and a second suspended zone of different thicknesses from a first comprising substrate, said method comprising the following steps: a) machining the front face of the first substrate to define the lateral contours of at least one first suspended zone according to a first thickness less than that of the first substrate, b) forming a stop layer of etching of the first suspended zone under said suspended zone, to do this a prior step of removal of the semi-conductor material arranged under the first suspended zone takes place, c) forming on the front face of the first substrate a sacrificial layer, d) machining from the rear face of the first substrate up to releasing said sacrificial layer to form at least one second suspended zone to reach the stop layer of the first suspended zone, e) releasing the first and second suspended zones.
摘要翻译：一种用于生产结构的方法，所述结构包括活性部分，所述活性部分包括不同厚度的第一和第二悬浮区域，所述第一和第二悬浮区域与第一包含基底的第一悬浮区域相同，所述方法包括以下步骤：a）加工所述第一基底的前表面以限定根据第一厚度小于第一衬底的第一厚度的至少一个第一悬浮区，b）在所述悬浮区下方形成蚀刻第一悬浮区的停止层，以此去除半导体材料的先前步骤布置在第一悬挂区域下方，c）在第一基板的正面上形成牺牲层，d）从第一基板的后表面加工到释放所述牺牲层以形成至少一个第二悬挂区域到达第一悬浮区的停止层，e）释放第一和第二悬浮区。

9. 发明申请

US20220246211A1 DEVICE COMPRISING A NON-VOLATILE MEMORY CIRCUIT 有权
公开(公告)号：US20220246211A1
公开(公告)日：2022-08-04
申请号：US17648449
申请日：2022-01-20
申请人： Commissariat a I'Energie Atomique et aux Energies Alternatives , CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE , Université d'Aix-Marseille
发明人： Valentin EGLOFF , Jean-Philippe NOEL , Jean-Michel PORTAL
IPC分类号： G11C14/00 , G06F3/06
摘要： The present description concerns a memory device (200) including a non-volatile memory circuit (101); a buffer memory circuit (203) comprising a volatile memory circuit (221); an input-output circuit (105); a first data link (104) coupling the non-volatile memory circuit (101) to the buffer memory circuit (203); a second data link (106) coupling the buffer memory circuit (203) to the input-output circuit (105); and a control circuit (225), wherein the buffer memory circuit (203) is adapted to implementing calculations having as operands data stored in the volatile memory circuit (221).

10. 发明申请

US20220030855A1 FUNCTIONALIZED SET OF CARBON ATOMS IN THE SP2 HYBRIDIZATION STATE, A METHOD FOR PREPARING IT AND ITS USES, IN PARTICULAR FOR RENDERING A SURFACE ANTIBACTERIAL 有权
公开(公告)号：US20220030855A1
公开(公告)日：2022-02-03
申请号：US17383817
申请日：2021-07-23
申请人： Commissariat a I'Energie Atomique et aux Energies Alternatives
发明人： Thomas Alava , Madhav Kumar
IPC分类号： A01N25/24 , A01N63/50 , A01N25/08 , A01N25/10 , A01P1/00
摘要： The present invention relates to a set of carbon atoms in the sp2 hybridization state functionalized with an antibacterial antibody or a lectin, and to an antibacterial peptide, a method for preparing it, and its uses, in particular for rendering a surface antibacterial. The present invention is also directed to a material covered with such a functionalized set, as well as to a method for preparing it.

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