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1. 发明授权

US06566905B2 Method and apparatus for a multi-state single program pin 有权
公开(公告)号：US06566905B2
公开(公告)日：2003-05-20
申请号：US09896550
申请日：2001-06-29
申请人： Christopher J. Sanzo , Claudio Tuozzolo
发明人： Christopher J. Sanzo , Claudio Tuozzolo
IPC分类号： H03K1900
CPC分类号： G01R31/31701
摘要： In one aspect the invention relates to a method of selecting a state from a plurality of states using a program pin. The method includes connecting the program pin to one of a first current source and a second current source, in response to a first voltage applied to the program pin, to thereby generate a second voltage at the program pin, and selecting a state from the plurality of states in response to the first and second voltages. In another embodiment, the method includes determining whether the first voltage exceeds a first reference voltage. In another embodiment, the method includes connecting the program pin to the first current source if the first voltage does not exceed the first reference voltage, and connecting the program pin to the second current source if the first voltage exceeds the first reference voltage.

2. 发明授权

US08148823B1 Low loss package for electronic device 有权
标题翻译：电子设备低损耗封装
公开(公告)号：US08148823B1
公开(公告)日：2012-04-03
申请号：US12637290
申请日：2009-12-14
申请人： Patrizio Vinciarelli , Claudio Tuozzolo
发明人： Patrizio Vinciarelli , Claudio Tuozzolo
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40 , H01L23/12 , H01L23/498
CPC分类号： H01L23/49844 , H01L23/3121 , H01L23/49822 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L25/072 , H01L2224/16225 , H01L2224/16227 , H01L2225/06517 , H01L2924/00014 , H01L2924/01087 , H01L2924/13091 , H01L2924/14 , H01L2924/00 , H01L2224/0401
摘要： A package for one or more semiconductor die is described. A generally rectangular package includes two large terminals that occupy substantially the entire length of the package and provide low resistance connections. Additional connections may be provided preferably in a central portion of a short end of the package. BGA connections between the semiconductor die and the package substrate provide low impedance connections between the die and the package contacts. The package and connections facilitate current flow orthogonal to the longest package dimension maximizing conductor width and minimizing interconnection resistance.
摘要翻译：描述用于一个或多个半导体管芯的封装。大致矩形的封装包括两个大的端子，其占据了封装的整个长度并提供低电阻连接。可以优选地在包装的短端的中心部分中提供附加连接。半导体管芯和封装衬底之间的BGA连接提供管芯和封装触点之间的低阻抗连接。封装和连接便于电流流动与最长封装尺寸正交，使导体宽度最大化并最小化互连电阻。

3. 发明授权

US07368957B2 Capacitively coupled floating gate driver 有权
标题翻译：电容耦合浮栅驱动器
公开(公告)号：US07368957B2
公开(公告)日：2008-05-06
申请号：US11490573
申请日：2006-07-21
申请人： John P. Clarkin , Alex Gusinov , Claudio Tuozzolo , Patrizio Vinciarelli
发明人： John P. Clarkin , Alex Gusinov , Claudio Tuozzolo , Patrizio Vinciarelli
IPC分类号： H03B1/00
CPC分类号： H02M1/08 , H03K17/133 , H03K17/6871 , H03K17/691
摘要： High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.
摘要翻译：公开了用于驱动高侧和浮动晶体管的高性能低功率隔离自举栅极驱动装置和方法。栅极驱动器使用边沿触发电容耦合输入。栅极驱动器可以包括检测和延迟电路，以促进高边或浮置晶体管的零电压切换，并提供更强大的假触发抑制。电容耦合的差分输入边沿触发栅极驱动器为假触发提供了特殊的抗扰性。使用变压器的变压器耦合驱动电路中可以使用栅极驱动器，该变压器仅需要支持足够大的耦合脉冲，以便由输入电路识别为边沿。

4. 发明授权

US08299767B1 Dynamic safe operating area control 有权
标题翻译：动态安全操作区控制
公开(公告)号：US08299767B1
公开(公告)日：2012-10-30
申请号：US12776634
申请日：2010-05-10
申请人： Claudio Tuozzolo , Aiman Alhoussami , John P. Clarkin , Robert M. Lanoue , Andreas Gerasimos Ladas
发明人： Claudio Tuozzolo , Aiman Alhoussami , John P. Clarkin , Robert M. Lanoue , Andreas Gerasimos Ladas
IPC分类号： H02H5/04 , H02H3/08
CPC分类号： H03K17/0822 , H03K2017/0806
摘要： In some implementations, a method of dynamically maintaining a device's operation within a safe operating area (SOA) may include sensing instantaneous voltage and current of the device; determining, based on the sensed instantaneous voltage and current, a value that represents a power dissipated in the device; using the determined dissipated power and a model of thermal behavior of the device to model a junction temperature of the device; and controlling operation of the device based on the modeled junction temperature. A programmable SOA circuit including sensing, scaling, filtering, and controlling functions may be packaged on a single die or in a package with a power transistor.
摘要翻译：在一些实现中，在安全操作区域（SOA）内动态维护设备操作的方法可以包括感测设备的瞬时电压和电流; 基于所感测的瞬时电压和电流来确定表示在所述装置中消散的功率的值; 使用所确定的耗散功率和所述装置的热行为模型来建模所述装置的结温度; 并根据建模结温控制设备的运行。包括感测，缩放，滤波和控制功能的可编程SOA电路可以封装在单个管芯或具有功率晶体管的封装中。

5. 发明申请

US20080018364A1 Capacitively coupled floating gate driver 有权
公开(公告)号：US20080018364A1
公开(公告)日：2008-01-24
申请号：US11490573
申请日：2006-07-21
申请人： John P. Clarkin , Alex Gusinov , Claudio Tuozzolo , Patrizio Vinciarelli
发明人： John P. Clarkin , Alex Gusinov , Claudio Tuozzolo , Patrizio Vinciarelli
IPC分类号： H03B1/00
CPC分类号： H02M1/08 , H03K17/133 , H03K17/6871 , H03K17/691
摘要： High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.

6. 发明授权

US5886511A Temperature insensitive foldback network 失效
标题翻译：温度不敏感的折返网络
公开(公告)号：US5886511A
公开(公告)日：1999-03-23
申请号：US063980
申请日：1998-02-21
申请人： Claudio Tuozzolo , George E. Schuellein
发明人： Claudio Tuozzolo , George E. Schuellein
IPC分类号： G05F1/46 , G05F1/56 , G05F3/30
CPC分类号： G05F1/56 , G05F3/30 , G05F1/468
摘要： A foldback circuit which responds to a voltage differential between the input and output terminals of a voltage regulator in excess of a foldback threshold by lowering the current limit threshold of a current limit circuit. The foldback circuit includes a transistor with a base coupled to the input voltage and an emitter coupled to the output voltage. The collector when conducting provides a current that decreases the current limit threshold. Diodes in the path between the input and output voltages through the transistor may be used in establishing the foldback threshold.
摘要翻译：折返电路，其通过降低限流电路的电流限制阈值来响应电压调节器的输入和输出端子之间的电压差超过折返阈值。折返电路包括具有耦合到输入电压的基极的晶体管和耦合到输出电压的发射极。集电极在导通时提供降低电流限制阈值的电流。在通过晶体管的输入和输出电压之间的路径中的二极管可用于建立折返阈值。

7. 发明授权

US5796280A Thermal limit circuit with built-in hysteresis 失效
标题翻译：具有内置迟滞的限热电路
公开(公告)号：US5796280A
公开(公告)日：1998-08-18
申请号：US795942
申请日：1997-02-05
申请人： Claudio Tuozzolo
发明人： Claudio Tuozzolo
IPC分类号： H03K3/2893 , H03K17/08 , H03K17/082 , H03K3/037
CPC分类号： H03K17/0826 , H03K3/2893 , H03K2017/0806
摘要： A thermal shut down circuit with built-in temperature hysteresis, comprising first and second transistors configured as a bistable trigger circuit. The two transistors switch either a first or second emitter current through a bias resistor, thereby establishing a voltage hysteresis. By applying a reference voltage to the base of the first transistor, temperature dependent state transitions occur. A buffer transistor coupled to the collector of the second transistor allows the thermal shut down circuit to turn ON or OFF an auxiliary circuit. Thermal communication between the auxiliary circuit and the base-emitter junction of the first transistor allows the thermal shut down circuit to shut down the auxiliary circuit when the temperature exceeds a shutdown temperature, and thermal hysteresis built into the thermal shut down circuit prevents undesirable ON-OFF oscillation of the auxiliary circuit.
摘要翻译：具有内置温度滞后的热关断电路，包括配置为双稳态触发电路的第一和第二晶体管。两个晶体管通过偏置电阻器切换第一或第二发射极电流，从而建立电压滞后。通过将参考电压施加到第一晶体管的基极，发生温度依赖状态转变。耦合到第二晶体管的集电极的缓冲晶体管允许热关断电路接通或关断辅助电路。辅助电路和第一晶体管的基极 - 发射极结之间的热连通允许热关断电路在温度超过关断温度时关闭辅助电路，并且热关断电路内置的热滞后可防止不期望的导通 - OFF辅助电路的振荡。

8. 发明授权

US06512353B2 Synchronized, ripple independent window comparator for switch-mode power converters 有权
公开(公告)号：US06512353B2
公开(公告)日：2003-01-28
申请号：US09879427
申请日：2001-06-12
申请人： Christopher J. Sanzo , Claudio Tuozzolo
发明人： Christopher J. Sanzo , Claudio Tuozzolo
IPC分类号： G05F140
CPC分类号： H02M3/156
摘要： This invention synchronizes the control signals generated by the out-of-range detection circuits with a predefined event. In one aspect, the invention relates to a method of controlling a switching regulator to regulate an output voltage. The method includes receiving a first enable signal and a second enable signal, comparing a feedback voltage representative of the output voltage to a first reference voltage and generating a first limit signal in response thereto and generating, in response to the first enable signal, a close switch command if the first limit signal indicates that the feedback voltage is less than the first reference voltage. The method further includes comparing the feedback voltage to a second reference voltage and generating a second limit signal in response thereto and generating, in response to the second enable signal, an open switch command if the second limit signal indicates that the feedback voltage is greater than the second reference voltage.

9. 发明授权

US5804955A Low voltage current limit circuit with temperature insensitive foldback network 失效
标题翻译：低压限流电路，具有温度不敏感的折返网络
公开(公告)号：US5804955A
公开(公告)日：1998-09-08
申请号：US741625
申请日：1996-10-30
申请人： Claudio Tuozzolo , George E. Schuellein
发明人： Claudio Tuozzolo , George E. Schuellein
IPC分类号： G05F1/46 , G05F1/56 , G05F3/30
CPC分类号： G05F1/56 , G05F3/30 , G05F1/468
摘要： A voltage regulator with a current limit circuit for limiting pass current in a pass transistor below a current limit threshold and a foldback circuit for lowering the current limit threshold when the voltage differential between the input and output terminals of the voltage regulator exceeds a foldback threshold, where the current limit threshold has a negative temperature coefficient, the current limit circuit comprising two transistors coupled to a sense resistor such that the difference in emitter-to-base voltages of the transistors is equal to the voltage drop of the sense resistor, where the collectors of the two transistors provides first and second currents to first and second resistors, respectively, where the first current is responsive to a pass current flowing through the sense resistor and decreases when the pass current increases, where the second current is independent of the pass current, and the foldback circuit provides a third current to the second resistor when the voltage differential between the input and output terminals of the voltage regulator exceeds the foldback threshold. A comparator circuit compares a first voltage drop developed across the first resistor with a second voltage drop developed across the second resistor, and limits base current to the pass transistor based upon the ratio of first and second voltage drops to thereby prevent the pass current from exceeding the current limit threshold.
摘要翻译：一种具有限流电路的电压调节器，用于将传输晶体管中的通过电流限制在电流限制阈值以下，以及当电压调节器的输入和输出端之间的电压差超过折返阈值时降低电流限制阈值的折返电路，其中电流限制阈值具有负温度系数，电流限制电路包括耦合到检测电阻器的两个晶体管，使得晶体管的发射极到基极电压的差值等于检测电阻器的电压降，其中两个晶体管的集电极分别向第一和第二电阻器提供第一和第二电流，其中第一电流响应流过检测电阻器的通过电流并且当通过电流增加时减小，其中第二电流独立于通过电流和折返电路提供第三电流到第二电阻器电压调节器的输入和输出端子之间的电压差超过折返阈值。比较器电路将跨第一电阻器开发的第一电压降与横跨第二电阻器的第二电压降进行比较，并且基于第一和第二电压降的比率将基极电流限制到通过晶体管，从而防止通过电流超过当前限制阈值。

10. 发明授权

US5666044A Start up circuit and current-foldback protection for voltage regulators 失效
标题翻译：为电压调节器启动电路和电流折返保护
公开(公告)号：US5666044A
公开(公告)日：1997-09-09
申请号：US722342
申请日：1996-09-27
申请人： Claudio Tuozzolo
发明人： Claudio Tuozzolo
IPC分类号： G05F1/573 , G05F1/40
CPC分类号： G05F1/573 , Y10S323/901
摘要： A circuit providing start-up capability and foldback protection to a voltage regulator. A start-up circuit provides a start-up signal to initiate current flow to a load and also provides a foldback signal to set a current limit threshold under an over-load or short-circuit condition. A signal generator circuit operating on the regulated output voltage of the voltage regulator provides a current limit signal and a start-up control signal. The start-up circuit provides the start-up signal in response to the start-up control signal. The current limit signal sets the current limit threshold under normal operating conditions after start-up.
摘要翻译：提供启动能力和向电压调节器提供折返保护的电路。启动电路提供启动信号以启动向负载的电流，并且还提供折返信号以在过载或短路条件下设置电流限制阈值。在稳压输出电压上工作的信号发生器电路提供电流限制信号和启动控制信号。启动电路响应于启动控制信号提供启动信号。电流限制信号在启动后在正常工作条件下设置电流限制阈值。

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