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    • 3. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US07709319B2
    • 2010-05-04
    • US11450269
    • 2006-06-12
    • Yeol JonChung-Ki MinYong-Sun KoKyung-Hyun Kim
    • Yeol JonChung-Ki MinYong-Sun KoKyung-Hyun Kim
    • H01L27/108
    • H01L27/10894H01L27/10852
    • Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.
    • 提供一种包括在基板表面上方延伸的垂直取向的电容器的半导体器件以及制造这样的器件的方法,其中在半导体衬底上限定了单元和外围区域之间的单元,外围和边界区域。 电容器形成在电池区域中,在外围区域设置模具图案,并且在边界区域中设置细长的虚拟图案。 虚拟图案包括边界开口,其中在形成下电极期间在细长的内侧壁上和在基板的暴露部分上形成薄层。 然后形成具有基本上相同高度的模具图案和下部电极结构,使得随后的绝缘中间层呈现大致平坦的表面,即在电池区域和外围区域之间没有显着的步进差异。
    • 4. 发明申请
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US20080042240A1
    • 2008-02-21
    • US11976251
    • 2007-10-23
    • Yeol JonChung-Ki MinYong-Sun KoKyung-Hyun Kim
    • Yeol JonChung-Ki MinYong-Sun KoKyung-Hyun Kim
    • H01L29/00
    • H01L27/10894H01L27/10852
    • Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.
    • 提供一种包括在基板表面上方延伸的垂直取向的电容器的半导体器件以及制造这样的器件的方法,其中在半导体衬底上限定了单元和外围区域之间的单元,外围和边界区域。 电容器形成在电池区域中,在外围区域设置模具图案,并且在边界区域中设置细长的虚拟图案。 虚拟图案包括边界开口,其中在形成下电极期间在细长的内侧壁上和在基板的暴露部分上形成薄层。 然后形成具有基本上相同高度的模具图案和下部电极结构,使得随后的绝缘中间层呈现大致平坦的表面,即在电池区域和外围区域之间没有显着的步进差异。