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    • 1. 发明授权
    • Methods and systems for storing texels retrievable in a single cycle
    • 用于存储在单个周期中可检索的纹素的方法和系统
    • US06104413A
    • 2000-08-15
    • US38760
    • 1998-03-11
    • Chun-Yang ChengSy-Shann LuoChun-Kai HuangYu-Ming Lin
    • Chun-Yang ChengSy-Shann LuoChun-Kai HuangYu-Ming Lin
    • G06T1/60G06F13/00
    • G06T1/60
    • Methods and systems for storing texels in memory banks in a manner that allows the retrieval of four neighboring texels within a single cycle are disclosed. The four neighboring texels are stored in separate memory banks according to a predetermined set of combinations of 2-D (u, v) coordinate pairs. In interpolating the color value of a color texel C(u, v), a texel buffer retrieves the four neighboring texels in a single cycle to reduce the memory access time. In one embodiment, a plurality of memory banks in the texel buffer are designed in an interleave mode. In an alternative embodiment, a plurality of memory banks in the texel buffer are implemented in a noninterleave mode. In both embodiments, a texel buffer retrieves the four neighboring texels of a color texel C(u, v) within a single cycle according to a predetermined set of criteria.
    • 公开了以允许在单个周期内检索四个相邻纹素的方式在存储体中存储纹素的方法和系统。 根据预定的2-D(u,v)坐标对的组合,四个相邻的纹素被存储在分开的存储体中。 在内插颜色纹理C(u,v)的颜色值时,纹素缓冲器在单个周期中检索四个相邻纹理,以减少存储器访问时间。 在一个实施例中,纹理缓冲器中的多个存储体被设计成交错模式。 在替代实施例中,纹理缓冲器中的多个存储体以不间断模式实现。 在两个实施例中,纹素缓冲器根据预定的一组标准在单个周期内检索颜色纹理C(u,v)的四个相邻纹理。
    • 3. 发明授权
    • Virtual coordinate to linear physical memory address converter for
computer graphics system
    • 虚拟坐标到计算机图形系统的线性物理内存地址转换器
    • US5745739A
    • 1998-04-28
    • US598522
    • 1996-02-08
    • Erh-Chiao WangWei-Kuo ChiaChun-Yang Cheng
    • Erh-Chiao WangWei-Kuo ChiaChun-Yang Cheng
    • G06F12/02G09G5/393G06F12/06
    • G09G5/393G06F12/0207
    • An address generator is disclosed for performing 2-D virtual coordinate to linear physical memory address conversion. The address generator has an edge walking circuit which receives a 2-D virtual coordinate of a first pixel on a first edge of an object displayed on the display screen. The edge walking circuit selectively outputs a 2-D virtual coordinate of a second pixel which intercepts the first edge of the object at an adjacent pixel row or column to the first pixel. The address generator also has a span expansion circuit which receives the 2-D virtual coordinate of the second pixel. The span expansion circuit selectively expands the 2-D virtual coordinate of the second pixel, according to the number of bits used to represent each pixel and the amount of information which can be accessed at a time from memory. This produces first and second expanded coordinates of the second pixel. Furthermore, the address generator has a linear address circuit which receives the first and second expanded coordinates of the second pixel. The linear address circuit outputs a linear physical address of the second pixel in memory.
    • 公开了一种地址发生器,用于对线性物理存储器地址转换执行2-D虚拟坐标。 地址发生器具有边缘行走电路,其接收在显示屏上显示的对象的第一边缘上的第一像素的2-D虚拟坐标。 边缘步行电路选择性地输出将相邻像素行或列的对象的第一边缘截取到第一像素的第二像素的2-D虚拟坐标。 地址发生器还具有接收第二像素的2-D虚拟坐标的跨度扩展电路。 跨度扩展电路根据用于表示每个像素的位数和从存储器一次可访问的信息量来选择性地扩展第二像素的2-D虚拟坐标。 这产生第二像素的第一和第二扩展坐标。 此外,地址发生器具有接收第二像素的第一和第二扩展坐标的线性地址电路。 线性地址电路输出存储器中第二像素的线性物理地址。