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1. 发明申请

US20090015287A1 APPARATUS FOR TESTING AN OBJECT 失效
标题翻译：用于测试物体的装置
公开(公告)号：US20090015287A1
公开(公告)日：2009-01-15
申请号：US12167000
申请日：2008-07-02
申请人： YOUNG-KI KWAK , Chul-Woong Jang , Woon-Sup Choi , Jong-pil Park
发明人： YOUNG-KI KWAK , Chul-Woong Jang , Woon-Sup Choi , Jong-pil Park
IPC分类号： G01R31/26
CPC分类号： G01R31/2893
摘要： An apparatus for testing an object includes a test chamber, a guiding member, testing units and a transferring unit. The test chamber is configured to receive the object. The guiding member is arranged extending along a first direction in the test chamber. The testing units are movably connected to the guiding member to test electrical characteristics of the object. The transferring unit is arranged in the test chamber to load the object into one of the testing units and unload the object from one of the testing units. The testing units may be transferred to a position for repair without suspension of the apparatus. The object may be tested using another testing unit while the other testing unit is being repaired.
摘要翻译：用于测试物体的装置包括测试室，引导构件，测试单元和传送单元。测试室配置成接收物体。引导构件沿着测试室中的第一方向布置。测试单元可移动地连接到引导构件以测试物体的电特性。转移单元布置在测试室中以将物体装载到一个测试单元中，并从其中一个测试单元卸载物体。测试单元可以被转移到用于修理的位置，而不会悬挂设备。该对象可以使用另一个测试单元进行测试，而另一个测试单元正在修复。

2. 发明授权

US07772828B2 Automatic test equipment capable of high speed test 有权
标题翻译：自动测试设备能够进行高速测试
公开(公告)号：US07772828B2
公开(公告)日：2010-08-10
申请号：US12072444
申请日：2008-02-26
申请人： Chul-woong Jang , Seung-ho Jang , Jae-il Lee , Young-jin Lee
发明人： Chul-woong Jang , Seung-ho Jang , Jae-il Lee , Young-jin Lee
IPC分类号： G01R15/18
CPC分类号： G01R31/31928 , G01R31/318516 , G01R31/31922 , G11C29/56 , G11C29/56012
摘要： Automatic test equipment is capable of performing a high-speed test of semiconductor devices, with a low cost and high efficiency. The automatic test equipment (ATE) comprises: an ATE body configured to electrically test semiconductor devices; a field programmable gate array (FPGA) controlling drivers and comparators on the ATE; an accelerator connected to an output terminal of the FPGA and that doubles an operating frequency of the FPGA; and a decelerator connected to an output terminal of the FPGA and that converts an operating frequency of data transferred from the semiconductor device to the operating frequency of the FPGA.
摘要翻译：自动测试设备能够以低成本和高效率对半导体器件进行高速测试。自动测试设备（ATE）包括：ATE主体，被配置为电测试半导体器件; 控制ATE上的驱动器和比较器的现场可编程门阵列（FPGA）; 连接到FPGA的输出端的加速器，使FPGA的工作频率加倍; 以及连接到FPGA的输出端子并将从半导体器件传送的数据的工作频率转换为FPGA的工作频率的减速器。

3. 发明授权

US08476908B2 Signal capture system and test apparatus including the same 有权
标题翻译：信号捕获系统和包括其的测试装置
公开(公告)号：US08476908B2
公开(公告)日：2013-07-02
申请号：US12840573
申请日：2010-07-21
申请人： Woon-sup Choi , Ho-sun Yoo , In-su Yang , Min-sung Kim , Jong-pill Park , In-ho Choi , Sung-yeol Kim , Jeong-gon Lee , Seung-jun Chee , Jae-il Lee , Chul-woong Jang
发明人： Woon-sup Choi , Ho-sun Yoo , In-su Yang , Min-sung Kim , Jong-pill Park , In-ho Choi , Sung-yeol Kim , Jeong-gon Lee , Seung-jun Chee , Jae-il Lee , Chul-woong Jang
IPC分类号： G01R31/02 , G01R31/00
CPC分类号： G11C29/56 , G11C2029/5606 , H05K1/0295 , H05K2201/10159 , H05K2201/10325 , H05K2203/162
摘要： A signal capture system for capturing a signal and storing the captured signal in a storage apparatus in real time, and a test apparatus including the signal capture system. The signal capture system includes a printed circuit board; a socket that is connected to the printed circuit board and on which a reference memory component is mounted; and an interposer that is mounted on the printed circuit board, is connected to the socket, an external apparatus, and a storage apparatus, receives first signals from the reference memory component and transmits the received first signals to the external apparatus and the storage apparatus, and receives second signals from the external apparatus and transmits the received second signals to the reference memory component and the storage apparatus, wherein a shape of the socket is defined according to a type of the reference memory component.
摘要翻译：一种用于捕获信号并将捕获的信号实时存储在存储装置中的信号捕获系统，以及包括信号捕获系统的测试装置。信号捕获系统包括印刷电路板; 连接到印刷电路板并且其上安装有参考存储器部件的插座; 并且安装在印刷电路板上的插入件连接到插座，外部装置和存储装置，从参考存储器部件接收第一信号，并将接收的第一信号发送到外部设备和存储装置，并接收来自外部装置的第二信号，并将接收到的第二信号发送到参考存储器部件和存储装置，其中根据参考存储器部件的类型来定义插座的形状。

4. 发明授权

US07816937B2 Apparatus for testing a semiconductor package 失效
标题翻译：用于测试半导体封装的装置
公开(公告)号：US07816937B2
公开(公告)日：2010-10-19
申请号：US12167000
申请日：2008-07-02
申请人： Young-Ki Kwak , Chul-Woong Jang , Woon-Sup Choi , Jong-pil Park
发明人： Young-Ki Kwak , Chul-Woong Jang , Woon-Sup Choi , Jong-pil Park
IPC分类号： G01R31/02
CPC分类号： G01R31/2893
摘要： An apparatus for testing an object includes a test chamber, a guiding member, testing units and a transferring unit. The test chamber is configured to receive the object. The guiding member is arranged extending along a first direction in the test chamber. The testing units are movably connected to the guiding member to test electrical characteristics of the object. The transferring unit is arranged in the test chamber to load the object into one of the testing units and unload the object from one of the testing units. The testing units may be transferred to a position for repair without suspension of the apparatus. The object may be tested using another testing unit while the other testing unit is being repaired.
摘要翻译：用于测试物体的装置包括测试室，引导构件，测试单元和传送单元。测试室配置成接收物体。引导构件沿着测试室中的第一方向布置。测试单元可移动地连接到引导构件以测试物体的电特性。转移单元布置在测试室中以将物体装载到一个测试单元中，并从其中一个测试单元卸载物体。测试单元可以被转移到用于修理的位置，而不会悬挂设备。该对象可以使用另一个测试单元进行测试，而另一个测试单元正在修复。

5. 发明申请

US20070085551A1 Calibration jig and calibration apparatus having the same 审中-公开
标题翻译：校准夹具和校准装置具有相同的功能
公开(公告)号：US20070085551A1
公开(公告)日：2007-04-19
申请号：US11580049
申请日：2006-10-13
申请人： Seung-Ho Jang , Chul-Woong Jang , Se-Kyung Oh , Min-Seok Jang
发明人： Seung-Ho Jang , Chul-Woong Jang , Se-Kyung Oh , Min-Seok Jang
IPC分类号： G01R35/00
CPC分类号： G01R35/007 , G01R31/3191
摘要： A calibration jig for adjusting timing and an apparatus equipped with such a calibration jig, including calibration block, at least one calibration board attached to the calibration block to form a securing platform for at least one test component, and a plurality of calibration terminals integral to the calibration board to provide improved calibration accuracy and timing.
摘要翻译：一种用于调整定时的校准夹具和装备有这样的校准夹具的装置，包括校准块，附接到校准块的至少一个校准板，以形成用于至少一个测试部件的固定平台，以及多个校准终端，校准板提供更高的校准精度和时序。

6. 发明授权

US08103927B2 Field mounting-type test apparatus and method for testing memory component or module in actual PC environment 有权
标题翻译：现场安装式试验装置及在实际PC环境中测试存储器组件或模块的方法
公开(公告)号：US08103927B2
公开(公告)日：2012-01-24
申请号：US12320919
申请日：2009-02-09
申请人： In-ho Choi , Woon-sup Choi , Sung-yeol Kim , Young-ki Kwak , Jae-il Lee , Chul-woong Jang , Ho-sun Yoo , In-su Yang , Seung-ho Jang
发明人： In-ho Choi , Woon-sup Choi , Sung-yeol Kim , Young-ki Kwak , Jae-il Lee , Chul-woong Jang , Ho-sun Yoo , In-su Yang , Seung-ho Jang
IPC分类号： G01R31/28
CPC分类号： G11C29/56 , G06F11/263
摘要： A field mounting-type test apparatus and method for enhancing competitiveness of a product by simulating various test conditions including a mounting environment for improving quality reliability of a memory device and by minimizing overall loss due to change in a mounting environment thus reducing testing time and cost. The field mounting-type test apparatus includes a mass storage device configured to store logic data simulating a mounting environment of a device under test (DUT) and a tester main frame configured to test the DUT using the logic data.
摘要翻译：通过模拟包括用于提高存储装置的质量可靠性的安装环境的各种测试条件以及由于安装环境的变化而使整体损失最小化的现场安装型试验装置和方法，从而减少测试时间和成本。现场安装型测试装置包括大容量存储装置，其被配置为存储模拟被测器件（DUT）的安装环境的逻辑数据和被配置为使用逻辑数据测试DUT的测试器主框架。

7. 发明申请

US20110109318A1 SIGNAL CAPTURE SYSTEM AND TEST APPARATUS INCLUDING THE SAME 有权
标题翻译：信号捕获系统和测试装置，包括它们
公开(公告)号：US20110109318A1
公开(公告)日：2011-05-12
申请号：US12840573
申请日：2010-07-21
申请人： Woon-sup Choi , Ho-sun Yoo , In-su Yang , Min-sung Kim , Jong-pill Park , In-ho Choi , Sung-yeol Kim , Jeong-gon Lee , Seung-jun Chee , Jae-il Lee , Chul-woong Jang
发明人： Woon-sup Choi , Ho-sun Yoo , In-su Yang , Min-sung Kim , Jong-pill Park , In-ho Choi , Sung-yeol Kim , Jeong-gon Lee , Seung-jun Chee , Jae-il Lee , Chul-woong Jang
IPC分类号： G01R31/02 , H05K1/18
CPC分类号： G11C29/56 , G11C2029/5606 , H05K1/0295 , H05K2201/10159 , H05K2201/10325 , H05K2203/162
摘要： A signal capture system for capturing a signal and storing the captured signal in a storage apparatus in real time, and a test apparatus including the signal capture system. The signal capture system includes a printed circuit board; a socket that is connected to the printed circuit board and on which a reference memory component is mounted; and an interposer that is mounted on the printed circuit board, is connected to the socket, an external apparatus, and a storage apparatus, receives first signals from the reference memory component and transmits the received first signals to the external apparatus and the storage apparatus, and receives second signals from the external apparatus and transmits the received second signals to the reference memory component and the storage apparatus, wherein a shape of the socket is defined according to a type of the reference memory component.
摘要翻译：一种用于捕获信号并将捕获的信号实时存储在存储装置中的信号捕获系统，以及包括信号捕获系统的测试装置。信号捕获系统包括印刷电路板; 连接到印刷电路板并且其上安装有参考存储器部件的插座; 并且安装在印刷电路板上的插入件连接到插座，外部装置和存储装置，从参考存储器部件接收第一信号，并将接收的第一信号发送到外部设备和存储装置，并接收来自外部装置的第二信号，并将接收到的第二信号发送到参考存储器部件和存储装置，其中根据参考存储器部件的类型来定义插座的形状。

8. 发明申请

US20090300442A1 Field mounting-type test apparatus and method for testing memory component or module in actual PC environment 有权
标题翻译：现场安装式试验装置及在实际PC环境中测试存储器组件或模块的方法
公开(公告)号：US20090300442A1
公开(公告)日：2009-12-03
申请号：US12320919
申请日：2009-02-09
申请人： In-ho Choi , Woon-sup Choi , Sung-yeol Kim , Young-ki Kwak , Jae-il Lee , Chul-woong Jang , Ho-sun Yoo , In-su Yang , Seung-ho Jang
发明人： In-ho Choi , Woon-sup Choi , Sung-yeol Kim , Young-ki Kwak , Jae-il Lee , Chul-woong Jang , Ho-sun Yoo , In-su Yang , Seung-ho Jang
IPC分类号： G11C29/04 , G06F11/22 , G01R31/3177 , G06F11/25
CPC分类号： G11C29/56 , G06F11/263
摘要： Provided are a field mounting-type test apparatus and method, which can enhance competitiveness of a product by simulating various test conditions including a mounting environment so as to improve quality reliability of a memory device and by minimizing overall loss due to change in a mounting environment so as to reduce testing time and cost. In accordance with example embodiments, the field mounting-type test apparatus may include a mass storage device configured to store logic data simulating a mounting environment of a device under test (DUT) and a tester main frame configured to test the DUT by using the logic data.
摘要翻译：提供了一种现场安装型测试装置和方法，其可以通过模拟包括安装环境在内的各种测试条件来提高产品的竞争力，从而提高存储器件的质量可靠性，并且通过最小化由于安装环境的变化引起的整体损耗以减少测试时间和成本。根据示例性实施例，现场安装型测试设备可以包括大容量存储设备，其被配置为存储模拟被测器件（DUT）的安装环境的逻辑数据和被配置为通过使用逻辑测试DUT的测试器主框架数据。

9. 发明申请

US20070101219A1 Semiconductor testing apparatus and method of calibrating the same 审中-公开
标题翻译：半导体测试装置及其校准方法
公开(公告)号：US20070101219A1
公开(公告)日：2007-05-03
申请号：US11580048
申请日：2006-10-13
申请人： Seung-Ho Jang , Chul-Woong Jang , Min-Seok Jang , Se-Kyung Oh , Hyun-Seop Shim , Jae-Il Lee
发明人： Seung-Ho Jang , Chul-Woong Jang , Min-Seok Jang , Se-Kyung Oh , Hyun-Seop Shim , Jae-Il Lee
IPC分类号： G01R31/28
CPC分类号： G01R31/3191 , G01R31/31922
摘要： A calibration method and a semiconductor testing apparatus, including N drivers, N being a natural number no less than two, at least one transmission path coupled to at least one of the N drivers, at least one calibration board coupled to the at least one transmission path, N comparators, and N delay paths, such that each delay path of the N delay paths has a skew value and is coupled between the calibration board and one of the N comparators.
摘要翻译：一种校准方法和半导体测试装置，包括N个驱动器，N是不少于两个的自然数，耦合到N个驱动器中的至少一个的至少一个传输路径，耦合到至少一个传输的至少一个校准板路径，N个比较器和N个延迟路径，使得N个延迟路径的每个延迟路径具有偏斜值并耦合在校准板和N个比较器中的一个之间。

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