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1. 发明授权

US08098779B2 Interference detection and mitigation 有权
公开(公告)号：US08098779B2
公开(公告)日：2012-01-17
申请号：US12330813
申请日：2008-12-09
申请人： Christos Komninakis , Daniel F. Filipovic
发明人： Christos Komninakis , Daniel F. Filipovic
IPC分类号： H03D1/04
CPC分类号： H04B1/10 , H04B1/109 , H04B1/525
摘要： Techniques for detecting and mitigating interference are described. A device (e.g., a cellular phone) senses interference levels and digitally reconstructs the expected interference in the received signal. The device may correlate the reconstructed interference with the received signal and determine interference in the received signal based on correlation results. The device may adjust the operation of one or more circuit blocks (e.g., a mixer, an LNA, etc.) in a receiver based on the detected interference in the received signal. Alternatively or additionally, the device may condition the digital interference to obtain conditioned reconstructed interference matching the interference in the received signal and may then subtract the conditioned interference from the received signal.

2. 发明授权

US07974807B2 Adaptive calibration for digital phase-locked loops 有权
标题翻译：数字锁相环的自适应校准
公开(公告)号：US07974807B2
公开(公告)日：2011-07-05
申请号：US12233400
申请日：2008-09-18
申请人： Jifeng Geng , Daniel F. Filipovic , Christos Komninakis
发明人： Jifeng Geng , Daniel F. Filipovic , Christos Komninakis
IPC分类号： G06F19/00
CPC分类号： H03L7/091 , H03L2207/50
摘要： Techniques for adaptively calibrating a TDC output signal in a digital phase-locked loop (DPLL). In an exemplary embodiment, a calibration factor multiplied to the TDC output signal is adaptively adjusted to minimize a magnitude function of a phase comparator output signal of the DPLL. In an exemplary embodiment, the calibration factor may be adjusted using an exemplary embodiment of the least-mean squares (LMS) algorithm. Further techniques for simplifying the adaptive algorithm for hardware implementation are described.
摘要翻译：用于在数字锁相环（DPLL）中自适应校准TDC输出信号的技术。在示例性实施例中，自适应地调整与TDC输出信号相乘的校准因子以最小化DPLL的相位比较器输出信号的幅度函数。在示例性实施例中，可以使用最小均方（LMS）算法的示例性实施例来调整校准因子。描述了用于简化用于硬件实现的自适应算法的进一步的技术。

3. 发明授权

US08254855B2 Frequency spur detection and suppression 有权
标题翻译：频率刺激检测和抑制
公开(公告)号：US08254855B2
公开(公告)日：2012-08-28
申请号：US12116539
申请日：2008-05-07
申请人： Daniel Fred Filipovic , Helena Deirdre O'Shea , Christos Komninakis , Jifeng Geng
发明人： Daniel Fred Filipovic , Helena Deirdre O'Shea , Christos Komninakis , Jifeng Geng
IPC分类号： H04B1/04 , H04B1/10
CPC分类号： H04B1/1036 , H04B1/7107
摘要： Techniques for identifying and suppressing frequency spurs in a signal are disclosed. In an embodiment, an incoming signal is rotated by a frequency related to a spur frequency, and an estimate of the content of the rotated signal is derived. The estimate may be subtracted from the rotated incoming signal, and the result de-rotated by the spur frequency. In an embodiment, the incoming signal may be rotated such that the spur is centered at DC. In an alternative embodiment, the estimate may be de-rotated before being subtracted from the original incoming signal. Techniques for addressing multiple spurs using serial and parallel architectures are disclosed. Further disclosed are techniques for searching for the presence of spurs in an incoming signal, and tracking spur frequencies over time.
摘要翻译：公开了用于识别和抑制信号中的频率杂散的技术。在一个实施例中，输入信号被旋转与杂波频率相关的频率，并且导出旋转信号的内容的估计。可以从旋转的输入信号中减去估计值，并且结果由杂散频率去旋转。在一个实施例中，输入信号可以旋转，使得支线以DC为中心。在替代实施例中，估计可以在从原始输入信号中减去之前被去转动。公开了使用串行和并行架构寻址多个杂散的技术。进一步公开的是用于在输入信号中搜索马刺的存在的技术，以及随时间跟踪刺激频率。

4. 发明授权

US08132041B2 Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals 有权
标题翻译：用于产生或利用一个或多个经周期吞咽的时钟信号的方法和装置
公开(公告)号：US08132041B2
公开(公告)日：2012-03-06
申请号：US12053433
申请日：2008-03-21
申请人： Christos Komninakis , Ming-Chieh Kuo
发明人： Christos Komninakis , Ming-Chieh Kuo
IPC分类号： G06F1/00 , G06F1/04 , G06F1/12 , G06F5/06 , G06F11/00 , H04L7/00 , H04L25/40
CPC分类号： H03L7/00
摘要： An electronic device is provided for generating or utilizing one or more cycle-swallowed clock signals derived based on one or more first clock signals. The device includes a module configured to receive a first clock signal having a first frequency. The module is configured to generate a second clock signal having a second frequency and configured to swallow one or more clock cycles of the first clock signal in generating the second clock signal. The first clock signal has even cycles, and the second clock signal has uneven cycles. The first frequency is greater than the second frequency. The module may include a cycle-swallowing counter. A method and a computer-readable medium are also provided.
摘要翻译：提供一种电子设备，用于产生或利用一个或多个基于一个或多个第一时钟信号导出的周期吞咽时钟信号。该设备包括被配置为接收具有第一频率的第一时钟信号的模块。该模块被配置为产生具有第二频率的第二时钟信号，并且被配置为在生成第二时钟信号时吞咽第一时钟信号的一个或多个时钟周期。第一个时钟信号具有偶数周期，第二个时钟信号具有不均匀的周期。第一个频率大于第二个频率。模块可以包括循环吞咽计数器。还提供了一种方法和计算机可读介质。

5. 发明申请

US20070184782A1 Baseband transmitter self-jamming and intermodulation cancellation device 有权
标题翻译：基带发射机自动干扰和互调消除装置
公开(公告)号：US20070184782A1
公开(公告)日：2007-08-09
申请号：US11346888
申请日：2006-02-03
申请人： Gurkanwal Sahota , Christos Komninakis
发明人： Gurkanwal Sahota , Christos Komninakis
IPC分类号： H04B1/00
CPC分类号： H04B1/525 , H04B1/10
摘要： Some embodiments provide a method, system, and apparatus for interference cancellation at the baseband of a receiver. A wireless communication device, having a transmitter and receiver, is provided with an adaptive circuit that cancels interference caused by transmit signals (or other signals) leaked or bled onto the receiver at baseband to facilitate detection of a received signal of interest. Some implementations provide for a circuit that approximately reconstructs the second and third order components caused by the nonlinear response of the down-conversion chain of a receiver. This reconstructed signal is then subtracted from the composite received signal to obtain a received signal of interest.
摘要翻译：一些实施例提供了用于接收机基带处的干扰消除的方法，系统和装置。具有发射机和接收机的无线通信设备设置有自适应电路，该自适应电路消除由基带泄露或流出到接收机上的发射信号（或其他信号）引起的干扰，以便于检测到所接收到的感兴趣的信号。一些实施方案提供了近似重建由接收机的下变换链的非线性响应引起的第二和第三阶分量的电路。然后从复合接收信号中减去该重建的信号，以获得感兴趣的接收信号。

6. 发明申请

US20120230176A1 RECEIVE BAND NOISE CANCELLATION METHOD AND APPARATUS 审中-公开
标题翻译：接收带噪声消除方法和装置
公开(公告)号：US20120230176A1
公开(公告)日：2012-09-13
申请号：US13413902
申请日：2012-03-07
申请人： Christos Komninakis , Joseph Patrick Burke , Daniel Fred Filipovic
发明人： Christos Komninakis , Joseph Patrick Burke , Daniel Fred Filipovic
IPC分类号： H04B15/00
CPC分类号： H04B1/525 , H04L5/0007 , H04L25/0204 , H04L25/0224
摘要： A method and apparatus for eliminating receive band noise in a communication system is provided. The method comprises sensing a transmit signal at a receive frequency, wherein the signal sensed is a bleed over signal from a transmit signal. The sensed bleed over signal is then digitized using a secondary receiver. This secondary receiver utilizes a separate path from the primary receive path. The next step in the method is to estimate the linear distortion, delay, attenuation in the sensed bleed over signal. Next, compensation for the linear distortion, delay, and attenuation are performed on the sensed bleed over signal. The sensed, digitized, and compensated bleed over signal is then cancelled from the primary receive path.
摘要翻译：提供一种用于消除通信系统中的接收频带噪声的方法和装置。该方法包括以接收频率感测发射信号，其中感测到的信号是来自发射信号的泄漏信号。然后使用辅助接收器对感测到的渗出信号进行数字化。该次级接收机利用与主接收路径分离的路径。该方法的下一步是估计感测的渗血信号中的线性失真，延迟，衰减。接下来，对感测到的渗出信号执行对线性失真，延迟和衰减的补偿。感测的，数字化的和经补偿的渗流信号然后从主接收路径被取消。

7. 发明授权

US08260229B2 I-Q mismatch compensation 失效
标题翻译： I-Q不匹配补偿
公开(公告)号：US08260229B2
公开(公告)日：2012-09-04
申请号：US12468995
申请日：2009-05-20
申请人： Mariam Motamed , Daniel F. Filipovic , Christos Komninakis , Chun-Hao Hsu , Chengjin Zhang
发明人： Mariam Motamed , Daniel F. Filipovic , Christos Komninakis , Chun-Hao Hsu , Chengjin Zhang
IPC分类号： H04B17/02
CPC分类号： H03D3/009
摘要： Techniques for compensating for I-Q mismatch in a communications receiver. In an exemplary embodiment, incoming I and Q samples are adjusted by multiplying with certain compensation coefficients to generate mismatch-compensated I and Q samples. The compensation coefficients may themselves be calculated and iteratively refined from the mismatch-compensated I and Q samples. Further techniques for partitioning the adjustment and estimation functions among computational hardware are disclosed. In an exemplary embodiment, estimation may be restricted to only those segments of the incoming I and Q samples that fulfill certain conditions, e.g., segments of the incoming I and Q samples known to be statistically uncorrelated and/or to have equal average energy.
摘要翻译：用于补偿通信接收机中的I-Q不匹配的技术。在示例性实施例中，通过与某些补偿系数相乘来调整输入I和Q样本，以产生失配补偿的I和Q样本。补偿系数本身可以从不匹配补偿的I和Q样本中计算和迭代地改进。公开了用于在计算硬件之间划分调整和估计功能的其它技术。在示例性实施例中，估计可以仅限于满足某些条件的输入I和Q样本的那些段，例如已知在统计学上不相关和/或具有相等平均能量的输入I和Q样本的段。

8. 发明申请

US20100066421A1 ADAPTIVE CALIBRATION FOR DIGITAL PHASE-LOCKED LOOPS 有权
标题翻译：数字相位锁的自适应校准
公开(公告)号：US20100066421A1
公开(公告)日：2010-03-18
申请号：US12233400
申请日：2008-09-18
申请人： Jifeng Geng , Daniel F. Filipovic , Christos Komninakis
发明人： Jifeng Geng , Daniel F. Filipovic , Christos Komninakis
IPC分类号： H03L7/06 , H03D3/24
CPC分类号： H03L7/091 , H03L2207/50
摘要： Techniques for adaptively calibrating a TDC output signal in a digital phase-locked loop (DPLL). In an exemplary embodiment, a calibration factor multiplied to the TDC output signal is adaptively adjusted to minimize a magnitude function of a phase comparator output signal of the DPLL. In an exemplary embodiment, the calibration factor may be adjusted using an exemplary embodiment of the least-mean squares (LMS) algorithm. Further techniques for simplifying the adaptive algorithm for hardware implementation are described.
摘要翻译：用于在数字锁相环（DPLL）中自适应校准TDC输出信号的技术。在示例性实施例中，自适应地调整与TDC输出信号相乘的校准因子以最小化DPLL的相位比较器输出信号的幅度函数。在示例性实施例中，可以使用最小均方（LMS）算法的示例性实施例来调整校准因子。描述了用于简化用于硬件实现的自适应算法的进一步的技术。

9. 发明申请

US20090086863A1 INTERFERENCE DETECTION AND MITIGATION 有权
标题翻译：干扰检测和缓解
公开(公告)号：US20090086863A1
公开(公告)日：2009-04-02
申请号：US12330798
申请日：2008-12-09
申请人： Christos Komninakis , Daniel F. Filipovic
发明人： Christos Komninakis , Daniel F. Filipovic
IPC分类号： H03D1/04
CPC分类号： H04B1/10 , H04B1/109 , H04B1/525
摘要： Techniques for detecting and mitigating interference are described. A device (e.g., a cellular phone) senses interference levels and digitally reconstructs the expected interference in the received signal. The device may correlate the reconstructed interference with the received signal and determine interference in the received signal based on correlation results. The device may adjust the operation of one or more circuit blocks (e.g., a mixer, an LNA, etc.) in a receiver based on the detected interference in the received signal. Alternatively or additionally, the device may condition the digital interference to obtain conditioned reconstructed interference matching the interference in the received signal and may then subtract the conditioned interference from the received signal.
摘要翻译：描述了用于检测和减轻干扰的技术。设备（例如，蜂窝电话）感测干扰电平并且数字地重构接收信号中的预期干扰。该装置可以将重建的干扰与接收到的信号相关联，并且基于相关结果确定接收信号中的干扰。该装置可以基于接收信号中检测到的干扰来调整接收机中的一个或多个电路块（例如，混频器，LNA等）的操作。替代地或附加地，设备可以调节数字干扰以获得与接收信号中的干扰匹配的经调整的重构干扰，然后可以从接收到的信号中减去经调节的干扰。

10. 发明授权

US06979608B2 Method of manufacturing an on-chip inductor having improved quality factor 有权
标题翻译：制造具有改善品质因素的片上电感器的方法
公开(公告)号：US06979608B2
公开(公告)日：2005-12-27
申请号：US10673874
申请日：2003-09-29
申请人： Harry Contopanagos , Christos Komninakis , Sissy Kyriazidou
发明人： Harry Contopanagos , Christos Komninakis , Sissy Kyriazidou
IPC分类号： H04B1/40 , H01L21/8238 , H01L21/20 , H01L21/8234 , H01L21/8244
CPC分类号： H04B1/406
摘要： An on-chip inductor may be fabricated by creating at least one dielectric layer, creating at least one conductive winding on the at least one dielectric layer and creating: (1) a P-well layer having a major surface parallel to a major surface of the dielectric layer, (2) field oxide layer having a major surface parallel to a major surface of the dielectric layer, (3) P-well and field oxide layer, or (4) a poly-silicon layer having a major surface parallel to a major surface of the dielectric layer.
摘要翻译：可以通过产生至少一个介电层来制造片上电感器，在至少一个电介质层上产生至少一个导电绕组，并产生：（1）P阱层，其主表面平行于电介质层，（2）具有平行于电介质层的主表面的主表面的场氧化物层，（3）P阱和场氧化物层，或（4）主表面平行于电介质层的主表面。

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