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1. 发明授权

US08639240B2 Device manufacturing using the device's embedded wireless technology 失效
标题翻译：器件制造采用该器件的嵌入式无线技术
公开(公告)号：US08639240B2
公开(公告)日：2014-01-28
申请号：US13543464
申请日：2012-07-06
申请人： Christopher Mark Romine , Dennis Michael Feenaghty , Joseph Patrick Burke , Sanjay K Jha , Samir S Soliman
发明人： Christopher Mark Romine , Dennis Michael Feenaghty , Joseph Patrick Burke , Sanjay K Jha , Samir S Soliman
IPC分类号： H04W24/00
CPC分类号： H04W24/06 , G05B19/0426 , G05B2219/25062 , H04W24/00 , H04W88/02 , Y02P90/86
摘要： Embodiments describe manufacturing, programming, testing, and servicing of wireless computing devices utilizing their embedded wireless technology. An embodiment method ensures that the wireless computing devices are successfully programmed in the event a disruption to the manufacturing, programming, testing and servicing process flow occurs. The method includes retrieving a last known location of the wireless device before the disruption event and comparing the last known location with the location of the wireless of the wireless device after the disruption event. A wireless device may be returned to the last known location before the disruption event if there is a difference in locations. The programming at the last known location before the disruption event occurred may be successfully completed. Further embodiments include configuring the manufacturing, programming, testing, and servicing of wireless computing devices utilizing the embedded wireless technology in the device based on a reported location of the device within a facility.
摘要翻译：实施例描述了利用其嵌入式无线技术的无线计算设备的制造，编程，测试和服务。在实现制造，编程，测试和维护过程流程中断的情况下，实施例方法确保无线计算设备被成功编程。该方法包括在中断事件之前检索无线设备的最后一个已知位置，并且在中断事件之后将最后知道的位置与无线设备的无线位置进行比较。如果位置差异，则无线设备可能在中断事件之前返回到最后一个已知位置。在发生中断事件之前的最后一个已知位置的编程可能会成功完成。另外的实施例包括基于设备内的设备的报告位置，在设备中利用嵌入式无线技术配置无线计算设备的制造，编程，测试和服务。

2. 发明申请

US20130040555A1 ROBUST SPUR INDUCED TRANSMIT ECHO CANCELLATION FOR MULTI-CARRIER SYSTEMS SUPPORT IN AN RF INTEGRATED TRANSCEIVER 审中-公开
标题翻译： RF集成收发器中的多载波系统支持的强大的SPUR感应发射ECHO取消
公开(公告)号：US20130040555A1
公开(公告)日：2013-02-14
申请号：US13351110
申请日：2012-01-16
申请人： Roberto Rimini , Peter D. Heidmann , Rajeev Krishnamurthi , Joseph Patrick Burke
发明人： Roberto Rimini , Peter D. Heidmann , Rajeev Krishnamurthi , Joseph Patrick Burke
IPC分类号： H04W4/00 , H04K3/00
CPC分类号： H04B1/109 , H04B1/525
摘要： A method and apparatus for eliminating transmit echo spurs is provided. The method includes the steps of: estimating a distortion effect applied to a transmit signal by a duplexer stop band. Next, the contribution of a primary component of the spur is estimated. An image component of the spur is estimated after the primary contribution has been estimated. The transmit echo is then subtracted from the composite desired signal by digitally subtracting the distortion effect, the primary component of the spur, and the image component of the spur, producing the desired composite transmit signal without the transmit echo.
摘要翻译：提供了一种用于消除发射回波刺激的方法和装置。该方法包括以下步骤：通过双工器停止频带来估计应用于发送信号的失真效应。接下来，估计刺激的主要成分的贡献。在估计主要贡献之后，估计刺激的图像分量。然后通过数字地减去失真效应，支线的主要分量和支线的图像分量从复合期望信号中减去发送回波，产生没有发送回波的期望的复合发送信号。

3. 发明申请

US20120286874A1 POSITIVE FEEDBACK COMMON GATE LOW NOISE AMPLIFIER 有权
标题翻译：正反馈通用门低噪声放大器
公开(公告)号：US20120286874A1
公开(公告)日：2012-11-15
申请号：US13107737
申请日：2011-05-13
申请人： Namsoo Kim , Joseph Patrick Burke
发明人： Namsoo Kim , Joseph Patrick Burke
IPC分类号： H03F1/38
CPC分类号： H03F3/45179 , H03F1/223 , H03F1/26 , H03F1/38 , H03F1/42 , H03F1/565 , H03F3/193 , H03F2200/294 , H03F2200/36 , H03F2203/45306 , H03F2203/45311 , H03F2203/45318 , H03F2203/45386 , H03F2203/45394 , H03F2203/45511 , H03F2203/45634 , H03F2203/45638
摘要： A Positive Feedback Common Gate Low Noise Amplifier (PFCGLNA) has positive feedback transistors and input transistors that are of the same conductivity type. Making the positive feedback and input transistors of the same conductivity type reduces sensitivity to process variations. Noise generated by the positive feedback transistors is used to cancel noise generated by the input transistors. In one embodiment, the PFCGLNA: 1) is tunable to have a substantially constant input impedance for any frequency in a wideband frequency range from 680 MHz to 980 MHz, and 2) has a noise figure less than 2.2 dB over the entire wideband frequency range. The input impedance of the PFCGLNA can be tuned to match a source that drives the PFCGLNA by setting a multi-bit digital control value supplied to a digitally-programmable tank load of the LNA.
摘要翻译：正反馈公共门低噪声放大器（PFCGLNA）具有正反馈晶体管和具有相同导电类型的输入晶体管。使相同导电类型的正反馈和输入晶体管降低对工艺变化的敏感性。由正反馈晶体管产生的噪声用于消除由输入晶体管产生的噪声。在一个实施例中，PFCGLNA：1）可调谐以对于在680MHz至980MHz的宽带频率范围内的任何频率具有基本上恒定的输入阻抗，以及2）在整个宽带频率范围内具有小于2.2dB的噪声系数。 PFCGLNA的输入阻抗可以通过设置提供给LNA的数字可编程容量负载的多位数字控制值来调节驱动PFCGLNA的源。

4. 发明授权

US08059054B2 Compact antennas for ultra wide band applications 有权
标题翻译：用于超宽带应用的紧凑型天线
公开(公告)号：US08059054B2
公开(公告)日：2011-11-15
申请号：US11615802
申请日：2006-12-22
申请人： Alireza Hormoz Mohammadian , Joseph Patrick Burke , Samir S Soliman
发明人： Alireza Hormoz Mohammadian , Joseph Patrick Burke , Samir S Soliman
IPC分类号： H01Q9/28 , H01Q1/38
CPC分类号： H01Q1/38 , H01Q9/28
摘要： Compact antennas for ultra wide band applications are disclosed. The compact antenna may be an elliptic dipole antenna with a poise and counterpoise both having an elliptical shape. A substrate may be used to support the poise and counterpoise with the substrate having a closed three-dimensional shape.
摘要翻译：公开了用于超宽带应用的紧凑型天线。紧凑型天线可以是具有椭圆形状的平面和平衡的椭圆偶极子天线。可以使用衬底来支撑具有封闭三维形状的衬底的平衡和平衡。

5. 发明授权

US07994850B2 Discrete time multi-rate analog filter 有权
标题翻译：离散时间多速率模拟滤波器
公开(公告)号：US07994850B2
公开(公告)日：2011-08-09
申请号：US12146376
申请日：2008-06-25
申请人： Joseph Patrick Burke
发明人： Joseph Patrick Burke
IPC分类号： H03B1/00
CPC分类号： H03H15/023
摘要： A discrete time analog filter suitable for use in a receiver and other electronics devices is described herein. In one exemplary design, an apparatus may include a transconductance amplifier, a sampler, and a discrete time analog filter. The transconductance amplifier may amplify a voltage input signal and provide an analog signal. The sampler may sample the analog signal and provide analog samples at a sampling rate. The discrete time analog filter may filter the analog samples and provide filtered analog samples either at the sampling rate for a non-decimating filter or at an output rate that is lower than the sampling rate for a decimating filter. The discrete time analog filter may also filter the analog samples with either equal weights for a rectangular filter or at least two different weights for a weighted filter.
摘要翻译：本文描述了适用于接收机和其它电子设备的离散时间模拟滤波器。在一个示例性设计中，装置可以包括跨导放大器，采样器和离散时间模拟滤波器。跨导放大器可以放大电压输入信号并提供模拟信号。采样器可以对模拟信号进行采样，并以采样速率提供模拟采样。离散时间模拟滤波器可以对模拟样本进行滤波，并以非抽取滤波器的采样速率或低于抽取滤波器的采样率的输出速率提供滤波后的模拟采样。离散时间模拟滤波器还可以对于矩形滤波器或对于加权滤波器具有至少两个不同的权重，以相同的权重对模拟样本进行滤波。

6. 发明申请

US20110040818A1 DISCRETE TIME LOWPASS FILTER 有权
标题翻译：离散时间低通滤波器
公开(公告)号：US20110040818A1
公开(公告)日：2011-02-17
申请号：US12541834
申请日：2009-08-14
申请人： Russell John Fagg , Joseph Patrick Burke
发明人： Russell John Fagg , Joseph Patrick Burke
IPC分类号： G06F17/17
CPC分类号： H03H19/004 , H03H15/023 , H03H17/0657 , H03H17/0664
摘要： A discrete time (DT) lowpass filter having various advantages is described. In an exemplary design, the DT lowpass filter includes a decimating DT filter (which may include a passive DT FIR filter and/or a passive DT IIR filter) and an active DT filter. The decimating DT filter receives a first DT signal at a first sample rate, filters and decimates the first DT signal by a factor of N, and provides a second DT signal at a second sample rate lower than the first sample rate. N may be greater than one. The active DT filter filters the second DT signal and provides a third DT signal at the second sample rate. A sampler samples a continuous time signal and provides the first DT signal. The sampler may further double the voltage of the first DT signal relative to the voltage of the continuous time signal.
摘要翻译：描述了具有各种优点的离散时间（DT）低通滤波器。在示例性设计中，DT低通滤波器包括抽取DT滤波器（其可以包括无源DT FIR滤波器和/或无源DT IIR滤波器）和有源DT滤波器。抽取DT滤波器以第一采样速率接收第一DT信号，以N因子对第一DT信号进行滤波和抽取，并以低于第一采样率的第二采样速率提供第二DT信号。 N可能大于1。有源DT滤波器对第二DT信号进行滤波，并以第二采样率提供第三DT信号。采样器采样连续时间信号并提供第一个DT信号。采样器可以相对于连续时间信号的电压进一步使第一DT信号的电压加倍。

7. 发明申请

US20100103882A1 EARLY TERMINATION OF LOW DATA RATE TRAFFIC IN A WIRELESS NETWORK 有权
标题翻译：在无线网络中早期终止低数据速率交通
公开(公告)号：US20100103882A1
公开(公告)日：2010-04-29
申请号：US12683082
申请日：2010-01-06
申请人： Amol Rajkotia , Ranganathan Krishnan , Joseph Patrick Burke
发明人： Amol Rajkotia , Ranganathan Krishnan , Joseph Patrick Burke
IPC分类号： H04W40/00
CPC分类号： H04L1/1621 , H04L1/0001 , H04L1/0083
摘要： Systems and techniques are disclosed relating to wireless communications, and more specifically, to various systems and techniques for early termination of low rate traffic in a wireless network. A physical layer packet (PLP) grouping factor K configures the PLP into K groups and an ACK/NACK is received on each group.
摘要翻译：公开了与无线通信相关的系统和技术，更具体地，涉及用于在无线网络中提前终止低速业务的各种系统和技术。物理层分组（PLP）分组因子K将PLP配置为K个组，并且在每个组上接收到ACK / NACK。

8. 发明授权

US08604876B2 Current buffer 有权
标题翻译：当前缓冲区
公开(公告)号：US08604876B2
公开(公告)日：2013-12-10
申请号：US13107754
申请日：2011-05-13
申请人： Namsoo Kim , Joseph Patrick Burke
发明人： Namsoo Kim , Joseph Patrick Burke
IPC分类号： H03F3/45
CPC分类号： H03F3/45659 , H03F3/45179 , H03F2203/45306 , H03F2203/45521 , H03F2203/45612
摘要： A current filtering current buffer amplifier includes: a first port and a second input port configured to be coupled to and receive input current; a first output port and a second output port configured to be coupled to and provide current to a load; a buffer configured to transfer the received input current to the first and second output ports as an output current, the buffer having an input impedance and an output impedance where the output impedance is higher than the input impedance, the buffer including first and second amplifiers, the first amplifier being a common mode feedback amplifier; and a filter coupled to the first and second input ports and coupled to the first and second amplifiers, the filter having a complex impedance and being configured to notch filter the received input current.
摘要翻译：电流滤波电流缓冲放大器包括：第一端口和第二输入端口，被配置为耦合到并接收输入电流; 第一输出端口和第二输出端口，被配置为耦合到负载并且向负载提供电流; 缓冲器，被配置为将接收到的输入电流传送到第一和第二输出端口作为输出电流，该缓冲器具有输入阻抗和输出阻抗，其中输出阻抗高于输入阻抗，该缓冲器包括第一和第二放大器，第一放大器是共模反馈放大器; 以及耦合到所述第一和第二输入端口并耦合到所述第一和第二放大器的滤波器，所述滤波器具有复阻抗并被配置为陷波滤波所接收的输入电流。

9. 发明授权

US08385985B2 Method for reducing power consumption in a multi-mode device 有权
标题翻译：降低多模式设备功耗的方法
公开(公告)号：US08385985B2
公开(公告)日：2013-02-26
申请号：US10723664
申请日：2003-11-25
申请人： Joseph Patrick Burke , John M. Burke , Ganesh M. Pattabiraman , Amol Rajkotia
发明人： Joseph Patrick Burke , John M. Burke , Ganesh M. Pattabiraman , Amol Rajkotia
IPC分类号： H04M1/00
CPC分类号： G06F1/329 , G06F1/3203 , H04B1/7183 , H04B2201/7071 , H04W52/0216 , Y02D10/24 , Y02D70/1222 , Y02D70/1224 , Y02D70/144 , Y02D70/40
摘要： Method for reducing power consumption in a multimode device is disclosed. The multimode device includes a COMM1 component and a COMM2 component. In one aspect, a COMM1 component may be a UWB component and a COMM2 component may be a CDMA component. According to a disclosed embodiment, the time for a next scheduled COMM1 wakeup process to be performed by a COMM1 module is established. Thereafter, if the next COMM1 wakeup process is scheduled to be performed before the next COMM2 wakeup process, a COMM2 wakeup process is synchronized to be performed by a COMM2 module at the same time as the next COMM1 wakeup process. Following, when the time arrives for the COMM1 module to perform the next COMM1 wakeup process, the COMM2 module also performs the COMM2 wakeup process.
摘要翻译：公开了一种用于降低多模设备中的功耗的方法。多模设备包括一个COMM1组件和一个COMM2组件。在一个方面，COMM1分量可以是UWB分量，并且COMM2分量可以是CDMA分量。根据所公开的实施例，建立由COMM1模块执行的下一个调度的COMM1唤醒过程的时间。此后，如果下一个COMM1唤醒处理被调度为在下一个COMM 2唤醒处理之前被执行，则COMM2唤醒过程被同步以由COMM2模块在下一个COMM1唤醒过程的同时执行。以下，当COMM1模块执行下一个COMM1唤醒过程的时间到达时，COMM2模块也执行COMM2唤醒过程。

10. 发明申请

US20110069749A1 NONLINEAR EQUALIZER TO CORRECT FOR MEMORY EFFECTS OF A TRANSMITTER 审中-公开
标题翻译：非线性均衡器来校正发送器的记忆效应
公开(公告)号：US20110069749A1
公开(公告)日：2011-03-24
申请号：US12566479
申请日：2009-09-24
申请人： Aracely Forrester , Philip David Coan , Paul Draxler , Roberto Rimini , Bruce Judson , Joseph Patrick Burke
发明人： Aracely Forrester , Philip David Coan , Paul Draxler , Roberto Rimini , Bruce Judson , Joseph Patrick Burke
IPC分类号： H04L27/01
CPC分类号： H04L25/03038 , H04L25/0228 , H04L25/0242 , H04L27/366 , H04L2025/03477 , H04L2025/03617
摘要： Techniques for correcting for memory effects of a transmitter are described. In an exemplary design, a receiver obtains input samples including a desired signal transmitted by a transmitter having memory effects. The receiver performs nonlinear equalization on the input samples to obtain first equalized samples, performs linear equalization on the input samples to obtain second equalized samples, and determines output samples based on the first and second equalized samples. The nonlinear equalization corrects for the memory effects and nonlinearities of the transmitter and possibly nonlinearities and memory effects of the receiver. The receiver may jointly determine coefficients for both linear and nonlinear equalization based on an adaptive algorithm. The receiver processes (e.g., demodulates and decodes) the output samples to recover data sent in the desired signal by the transmitter.
摘要翻译：描述用于校正发射机的记忆效应的技术。在示例性设计中，接收机获得包括由具有记忆效应的发射机发送的期望信号的输入样本。接收机在输入样本上执行非线性均衡以获得第一均衡样本，对输入样本执行线性均衡以获得第二均衡样本，并且基于第一和第二均衡样本确定输出样本。非线性均衡校正了发射机的记忆效应和非线性以及接收机的可能的非线性和记忆效应。接收机可以基于自适应算法共同确定线性和非线性均衡的系数。接收机处理（例如，解调和解码）输出样本以恢复发射机在所需信号中发送的数据。

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