专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100302732A1 HEAT-DISSIPATING MECHANISM FOR USE WITH MEMORY MODULE 有权
标题翻译：使用记忆模块的散热机构
公开(公告)号：US20100302732A1
公开(公告)日：2010-12-02
申请号：US12851754
申请日：2010-08-06
申请人： Chia-Hsing Chou , Chih-Wei Tsai , Chia-Hung Lu
发明人： Chia-Hsing Chou , Chih-Wei Tsai , Chia-Hung Lu
IPC分类号： H05K7/20
CPC分类号： H01L23/467 , H01L23/40 , H01L2023/4087 , H01L2924/0002 , H01L2924/00
摘要： A heat-dissipating mechanism includes a first heat-dissipating device, a first positioning device, a second heat-dissipating device and a second positioning device. The first heat-dissipating device is contacted with a memory module. The first positioning device is disposed on the first heat-dissipating device and includes a protrusion. The second heat-dissipating device is connected with the first heat-dissipating device. The second positioning device has a positioning rail formed in the second heat-dissipating device and corresponding to the protrusion. The second heat-dissipating device is connected with the first heat-dissipating device when the protrusion of the first positioning device is embedded into the positioning rail second positioning device.
摘要翻译：散热机构包括第一散热装置，第一定位装置，第二散热装置和第二定位装置。第一散热装置与存储器模块接触。第一定位装置设置在第一散热装置上并且包括突起。第二散热装置与第一散热装置连接。第二定位装置具有形成在第二散热装置中并对应于突起的定位轨道。当第一定位装置的突起嵌入到定位轨道第二定位装置中时，第二散热装置与第一散热装置连接。

2. 发明申请

US20090106513A1 Method for copying data in non-volatile memory system 审中-公开
标题翻译：在非易失性存储器系统中复制数据的方法
公开(公告)号：US20090106513A1
公开(公告)日：2009-04-23
申请号：US11875952
申请日：2007-10-22
申请人： Chuang Cheng , Chih-Wei Tsai , Shih-Chieh Tai , Satoshi Sugawa , Wen-Lin Cheng
发明人： Chuang Cheng , Chih-Wei Tsai , Shih-Chieh Tai , Satoshi Sugawa , Wen-Lin Cheng
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F11/1068 , G06F2212/1032
摘要： A method for copying data in a non-volatile memory system is disclosed. The method includes calculating a number of errors of a first set of data from a source block of the non-volatile memory saved in the buffer of the controller, transmitting the first set of data saved in the buffer of the controller to a buffer of the non-volatile memory when the number of errors is lower than a threshold, and programming a destination block of the non-volatile memory with the first set of data saved in the buffer of the non-volatile memory when the number of errors is lower than the threshold.
摘要翻译：公开了一种在非易失性存储器系统中复制数据的方法。该方法包括从存储在控制器的缓冲器中的非易失性存储器的源块中计算第一组数据的错误数量，将保存在控制器的缓冲器中的第一组数据发送到控制器的缓冲器当错误数量低于阈值时，非易失性存储器，并且当错误数量低于非易失性存储器的数量时，利用保存在非易失性存储器的缓冲器中的第一组数据来编程非易失性存储器的目的地块门槛。

3. 发明申请

US20080264673A1 Differential signal layout printed circuit board 有权
标题翻译：差分信号布局印刷电路板
公开(公告)号：US20080264673A1
公开(公告)日：2008-10-30
申请号：US11790617
申请日：2007-04-26
申请人： Cheng-Jan Chi , Wen-Cheng Ko , Sheng-Ming Chang , Chih-Wei Tsai
发明人： Cheng-Jan Chi , Wen-Cheng Ko , Sheng-Ming Chang , Chih-Wei Tsai
IPC分类号： H05K1/00
CPC分类号： H05K1/0245 , G06F13/409 , H05K1/0219 , H05K2201/09236 , H05K2201/09672
摘要： A positive differential signal trace and a negative differential signal trace are formed on different layers of a printed circuit board. A first ground trace is formed on the layer on which the positive differential signal trace is formed, and a second ground trace is formed on the layer on which the negative differential signal trace is formed. An insulation layer is positioned between the two layers and has a predetermined thickness. A differential mode impedance and a common mode impedance of differential signals are dependent on the predetermined thickness of the insulation layer, width and thickness of each differential signal trace, and a space between each differential signal trace and the corresponding ground trace formed on the same layer.
摘要翻译：在印刷电路板的不同层上形成正差分信号迹线和负差分信号迹线。第一接地迹线形成在其上形成正差分信号迹线的层上，并且在形成有负差分信号迹线的层上形成第二接地迹线。绝缘层位于两层之间并具有预定的厚度。差分信号的差模阻抗和共模阻抗取决于绝缘层的预定厚度，每个差分信号迹线的宽度和厚度，以及每个差分信号迹线与形成在同一层上的对应接地迹线之间的间隔。

4. 发明授权

US07235989B2 Electrical test device having isolation slot 有权
标题翻译：具有隔离槽的电气测试装置
公开(公告)号：US07235989B2
公开(公告)日：2007-06-26
申请号：US11233035
申请日：2005-09-23
申请人： Pao-Nan Li , Chih-Wei Tsai
发明人： Pao-Nan Li , Chih-Wei Tsai
IPC分类号： G01R31/02
CPC分类号： G01R1/06772
摘要： An electrical test device including a substrate and a plurality of test pads. The test pads are disposed on a second surface of the substrate. Each test pad has a test hole, and first and second isolation slots. The first isolation slot is disposed on the periphery of the test hole, and defines a signal region for connecting a signal terminal of a test probe. The second isolation slot is disposed on the periphery of the first isolation slot, and a ground region is defined between the first and second isolation slots. The ground region is used for connecting a ground terminal of the test probe. The test pad can match with the test probe so that the test probe can connect to the test pad for providing signal to the test probe. The electrical test device can easily measure the real electrical characteristic of the signal from the substrate.
摘要翻译：一种电测试装置，包括基板和多个测试垫。测试垫设置在基板的第二表面上。每个测试垫具有测试孔，以及第一和第二隔离槽。第一隔离槽设置在测试孔的周边，并且限定用于连接测试探针的信号端子的信号区域。第二隔离槽设置在第一隔离槽的周边上，并且在第一和第二隔离槽之间限定接地区域。接地区域用于连接测试探头的接地端子。测试垫可以与测试探针匹配，以便测试探头可以连接到测试垫，以便向测试探针提供信号。电气测试装置可以容易地测量来自衬底的信号的实际电特性。

5. 发明申请

US20070126510A1 Audio process circuit structure and process method thereof 审中-公开
标题翻译：音频处理电路结构及其处理方法
公开(公告)号：US20070126510A1
公开(公告)日：2007-06-07
申请号：US11488821
申请日：2006-07-19
申请人： Chih-Wei Tsai
发明人： Chih-Wei Tsai
IPC分类号： H03F3/04
CPC分类号： H03F3/72 , H03F3/181
摘要： This invention discloses an audio process circuit structure and process method applying to a video/audio apparatus that at least comprises an audio signal detection unit, an OR gate logic circuit unit, an AND gate logic circuit unit and an audio amplifier process unit. The audio signal detection unit also comprises a coupling capacitor, a signal amplifier circuit, a DC level shift circuit, a charge circuit and a switch circuit. This audio signal detection unit transfers different amplitude and frequency of the signal to be a high or low DC logic level signal. The high DC logic level signal is an audio signal and the low DC logic level signal is a noise. When the noise is inputted to the audio signal detection unit and a mute control signal is outputted by the audio signal detection unit to disable the audio amplifier process unit so as to prohibit the noise to output.
摘要翻译：本发明公开了一种应用于至少包括音频信号检测单元，或门逻辑电路单元，与门逻辑电路单元和音频放大器处理单元的视频/音频设备的音频处理电路结构和处理方法。音频信号检测单元还包括耦合电容器，信号放大器电路，直流电平移位电路，充电电路和开关电路。该音频信号检测单元将信号的不同幅度和频率传送为高或低DC逻辑电平信号。高DC逻辑电平信号是音频信号，低直流逻辑电平信号是噪声。当噪声被输入到音频信号检测单元，并且由音频信号检测单元输出静音控制信号以禁用音频放大器处理单元以便禁止噪声输出。

6. 发明申请

US20060087333A1 Electrical test device having isolation slot 有权
标题翻译：具有隔离槽的电气测试装置
公开(公告)号：US20060087333A1
公开(公告)日：2006-04-27
申请号：US11233035
申请日：2005-09-23
申请人： Pao-Nan Li , Chih-Wei Tsai
发明人： Pao-Nan Li , Chih-Wei Tsai
IPC分类号： G01R31/02
CPC分类号： G01R1/06772
摘要： The invention relates to an electrical test device having isolation slot. The electrical test device comprises a substrate and a plurality of test pads. The test pads are disposed on a second surface of the substrate. Each test pads has a test hole, a first isolation slot and a second isolation slot. The first isolation slot is disposed on the periphery of the test hole, and defines a signal region for connecting a signal terminal of a test probe. The second isolation slot is disposed on the periphery of the first isolation slot, and a ground region is defined between the first isolation slot and the second isolation slot. The ground region is used for connecting a ground terminal of the test probe. The test pad of the invention can match with the test probe so that the test probe can connect to the test pad for providing signal to the test probe. Therefore, the electrical test device can be utilized to easily measure the real electrical characteristic of the signal from the substrate.
摘要翻译：本发明涉及具有隔离槽的电测试装置。电测试装置包括基板和多个测试垫。测试垫设置在基板的第二表面上。每个测试垫具有测试孔，第一隔离槽和第二隔离槽。第一隔离槽设置在测试孔的周边，并且限定用于连接测试探针的信号端子的信号区域。第二隔离槽设置在第一隔离槽的周边上，并且在第一隔离槽和第二隔离槽之间限定接地区域。接地区域用于连接测试探头的接地端子。本发明的测试垫可以与测试探针相匹配，使得测试探头可以连接到测试垫，以向测试探针提供信号。因此，电气测试装置可以用于容易地测量来自衬底的信号的实际电特性。

7. 发明授权

US08166228B2 Non-volatile memory system and method for reading and storing sub-data during partially overlapping periods 有权
标题翻译：用于在部分重叠期间读取和存储子数据的非易失性存储器系统和方法
公开(公告)号：US08166228B2
公开(公告)日：2012-04-24
申请号：US12120453
申请日：2008-05-14
申请人： Chuang Cheng , Satashi Sugawa , Chih-Wei Tsai , Wen-Lin Chang , Fu-Ja Shone
发明人： Chuang Cheng , Satashi Sugawa , Chih-Wei Tsai , Wen-Lin Chang , Fu-Ja Shone
IPC分类号： G06F12/00
CPC分类号： G06F13/4239 , G11C7/1042
摘要： A non-volatile memory system and a method for reading data therefrom are provided. The data comprises a first sub-data and a second sub-data. The non-volatile memory system comprises a first storage unit and a second storage unit, adapted for storing the two sub-data respectively. The first storage unit reads a first command from the controller, and stores the first sub-data temporarily as the first temporary sub-data according to the first command. The second storage unit reads a second command from the controller, and stores the second sub-data temporarily as the second temporary sub-data according to the second command. The first temporary sub-data is read from the first storage unit. Then, the first storage unit reads a third command from the controller. The second temporary sub-data is also read from the second storage unit while reading the third command. The time for reading data from the non-volatile memory system is reduced.
摘要翻译：提供一种非易失性存储器系统和从其读取数据的方法。数据包括第一子数据和第二子数据。非易失性存储器系统包括分别存储两个子数据的第一存储单元和第二存储单元。第一存储单元从控制器读取第一命令，并且根据第一命令临时存储第一子数据作为第一临时子数据。第二存储单元从控制器读取第二命令，并且根据第二命令临时存储第二子数据作为第二临时子数据。从第一存储单元读取第一临时子数据。然后，第一存储单元从控制器读取第三命令。在读取第三命令的同时，也从第二存储单元读取第二临时子数据。从非易失性存储器系统读取数据的时间减少了。

8. 发明授权

US07880094B2 Differential signal layout printed circuit board 有权
标题翻译：差分信号布局印刷电路板
公开(公告)号：US07880094B2
公开(公告)日：2011-02-01
申请号：US11790617
申请日：2007-04-26
申请人： Cheng-Jan Chi , Wen-Cheng Ko , Sheng-Ming Chang , Chih-Wei Tsai
发明人： Cheng-Jan Chi , Wen-Cheng Ko , Sheng-Ming Chang , Chih-Wei Tsai
IPC分类号： H01R12/04 , H05K1/11
CPC分类号： H05K1/0245 , G06F13/409 , H05K1/0219 , H05K2201/09236 , H05K2201/09672
摘要： A positive differential signal trace and a negative differential signal trace are formed on different layers of a printed circuit board. A first ground trace is formed on the layer on which the positive differential signal trace is formed, and a second ground trace is formed on the layer on which the negative differential signal trace is formed. An insulation layer is positioned between the two layers and has a predetermined thickness. A differential mode impedance and a common mode impedance of differential signals are dependent on the predetermined thickness of the insulation layer, width and thickness of each differential signal trace, and a space between each differential signal trace and the corresponding ground trace formed on the same layer.
摘要翻译：在印刷电路板的不同层上形成正差分信号迹线和负差分信号迹线。第一接地迹线形成在其上形成正差分信号迹线的层上，并且在形成有负差分信号迹线的层上形成第二接地迹线。绝缘层位于两层之间并具有预定的厚度。差分信号的差模阻抗和共模阻抗取决于绝缘层的预定厚度，每个差分信号迹线的宽度和厚度，以及每个差分信号迹线与形成在同一层上的对应接地迹线之间的间隔。

9. 发明授权

US07791881B2 Heat-dissipating mechanism for use with memory module 有权
标题翻译：与内存模块一起使用的散热机构
公开(公告)号：US07791881B2
公开(公告)日：2010-09-07
申请号：US12468636
申请日：2009-05-19
申请人： Chia-Hsing Chou , Chih-Wei Tsai , Chia-Hung Lu
发明人： Chia-Hsing Chou , Chih-Wei Tsai , Chia-Hung Lu
IPC分类号： H05K7/20
CPC分类号： H01L23/467 , H01L23/40 , H01L2023/4087 , H01L2924/0002 , H01L2924/00
摘要： A heat-dissipating mechanism includes a first heat-dissipating device, a first positioning device, a second heat-dissipating device and a second positioning device. The first heat-dissipating device is contacted with a memory module. The first positioning device is disposed on the first heat-dissipating device and includes a protrusion. The second heat-dissipating device is connected with the first heat-dissipating device. The second positioning device has a positioning rail formed in the second heat-dissipating device and corresponding to the protrusion. The second heat-dissipating device is connected with the first heat-dissipating device when the protrusion of the first positioning device is embedded into the positioning rail second positioning device.
摘要翻译：散热机构包括第一散热装置，第一定位装置，第二散热装置和第二定位装置。第一散热装置与存储器模块接触。第一定位装置设置在第一散热装置上并且包括突起。第二散热装置与第一散热装置连接。第二定位装置具有形成在第二散热装置中并对应于突起的定位轨道。当第一定位装置的突起嵌入到定位轨道第二定位装置中时，第二散热装置与第一散热装置连接。

10. 发明申请

US20070121961A1 POP noise processing circuit structure applying to panel display apparatus 审中-公开
标题翻译：适用于面板显示装置的POP噪声处理电路结构
公开(公告)号：US20070121961A1
公开(公告)日：2007-05-31
申请号：US11488759
申请日：2006-07-19
申请人： Chih-Wei Tsai
发明人： Chih-Wei Tsai
IPC分类号： H04B15/00
CPC分类号： H04R3/00
摘要： This invention discloses a POP noise processing circuit structure applying to an output apparatus. Therein, the output apparatus is a panel display apparatus. The POP noise processing circuit structure comprises at least one first processing unit, a second processing unit, an operational amplifier processing unit, and an audio POP noise processing unit. The first processing unit provides an audio signal to the operational amplifier processing unit, and the second processing unit provides a system signal to the audio POP noise processing unit that provides a mute signal to the operational amplifier processing unit. When the output apparatus is in a shutdown mode or a mute mode, the audio signal includes a high voltage pulse, and utilizes the circuit characteristic of the audio POP noise processing unit to eliminate the POP noise caused from the high voltage pulse.
摘要翻译：本发明公开了一种适用于输出装置的POP噪声处理电路结构。其中，输出装置是面板显示装置。 POP噪声处理电路结构包括至少一个第一处理单元，第二处理单元，运算放大器处理单元和音频POP噪声处理单元。第一处理单元向运算放大器处理单元提供音频信号，第二处理单元向音频POP噪声处理单元提供系统信号，该单元向运算放大器处理单元提供静音信号。当输出装置处于关闭模式或静音模式时，音频信号包括高电压脉冲，并且利用音频POP噪声处理单元的电路特性来消除由高电压脉冲引起的POP噪声。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式