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1. 发明申请

US20100200431A1 WAFER TEST METHOD AND WAFER TEST APPARATUS 失效
标题翻译： WAFER测试方法和WAFER测试设备
公开(公告)号：US20100200431A1
公开(公告)日：2010-08-12
申请号：US12704206
申请日：2010-02-11
申请人： Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
发明人： Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
IPC分类号： G01N27/26
CPC分类号： H01L22/14
摘要： The inventive concept provides a wafer test method and a wafer test apparatus. The wafer test method can recognize the amount of residuals generated in a sidewall of the metal-containing layer pattern and the extent of corrosion of a sidewall of the metal-containing layer pattern using the measured electric resistance by supplying an electrolyte so that the electrolyte is in contact with a portion of the metal-containing layer pattern in a predetermined chip region and measuring an electric resistance between a first electrode which is electrically in contact with the other portion of the metal-containing layer pattern and a second electrode which is in contact with the electrolyte in the predetermined region. Thus, a wafer test method and a wafer test apparatus can be embodied by an in-line method without dividing a wafer into each chip.
摘要翻译：本发明的概念提供了晶片测试方法和晶片测试装置。晶片测试方法可以通过提供电解质来确定含金属层图案的侧壁中产生的残留量以及含金属层图案的侧壁的腐蚀程度，使得电解质为与预定芯片区域中的含金属层图案的一部分接触，并且测量与含金属层图案的另一部分电接触的第一电极和接触的第二电极之间的电阻电解液在预定区域内。因此，可以通过在线方式来实现晶片测试方法和晶片测试装置，而不将晶片分成每个芯片。

2. 发明申请

US20090065032A1 Apparatus and method for removing photoresist from a substrate 审中-公开
标题翻译：从基板去除光致抗蚀剂的设备和方法
公开(公告)号：US20090065032A1
公开(公告)日：2009-03-12
申请号：US12230293
申请日：2008-08-27
申请人： Donggyun Han , Woosung Han , Changki Hong , Sangjun Choi , Hyungho Ko , Hyosan Lee
发明人： Donggyun Han , Woosung Han , Changki Hong , Sangjun Choi , Hyungho Ko , Hyosan Lee
IPC分类号： B32B38/10
CPC分类号： H01L21/31138 , H01L21/02043 , Y10S438/906
摘要： An apparatus and method for removing photoresist from a substrate, which includes treating the photoresist with a first reactant to cause swelling, cracking or delamination of the photoresist, treating the photoresist with a second reactant to chemically alter the photoresist, and subsequently removing the chemically altered photoresist with a third reactant. In one example, the first reactant is supercritical carbon dioxide (SCCO2), the second reactant is ozone vapor, and the third reactant is deionized water.
摘要翻译：一种用于从基底去除光致抗蚀剂的装置和方法，其包括用第一反应物处理光致抗蚀剂以引起光致抗蚀剂的溶胀，破裂或分层，用第二反应物处理光致抗蚀剂以化学改变光致抗蚀剂，随后除去化学改变的具有第三反应物的光致抗蚀剂。在一个实例中，第一反应物是超临界二氧化碳（SCCO 2），第二反应物是臭氧蒸气，第三反应物是去离子水。

3. 发明授权

US07431855B2 Apparatus and method for removing photoresist from a substrate 有权
标题翻译：从基板去除光致抗蚀剂的设备和方法
公开(公告)号：US07431855B2
公开(公告)日：2008-10-07
申请号：US10712775
申请日：2003-11-14
申请人： Donggyun Han , Woosung Han , Changki Hong , Sangjun Choi , Hyungho Ko , Hyosan Lee
发明人： Donggyun Han , Woosung Han , Changki Hong , Sangjun Choi , Hyungho Ko , Hyosan Lee
IPC分类号： H01L21/3105
CPC分类号： H01L21/31138 , H01L21/02043 , Y10S438/906
摘要： An apparatus and method for removing photoresist from a substrate, which includes treating the photoresist with a first reactant to cause swelling, cracking or delamination of the photoresist, treating the photoresist with a second reactant to chemically alter the photoresist, and subsequently removing the chemically altered photoresist with a third reactant. In one example, the first reactant is supercritical carbon dioxide (SCCO2), the second reactant is ozone vapor, and the third reactant is deionized water.
摘要翻译：一种用于从基底去除光致抗蚀剂的装置和方法，其包括用第一反应物处理光致抗蚀剂以引起光致抗蚀剂的溶胀，破裂或分层，用第二反应物处理光致抗蚀剂以化学改变光致抗蚀剂，随后除去化学改变的具有第三反应物的光致抗蚀剂。在一个实例中，第一反应物是超临界二氧化碳（SCCO 2 H 2），第二反应物是臭氧蒸气，第三反应物是去离子水。

4. 发明授权

US08228089B2 Wafer test method and wafer test apparatus 失效
标题翻译：晶圆试验方法和晶圆试验装置
公开(公告)号：US08228089B2
公开(公告)日：2012-07-24
申请号：US12704206
申请日：2010-02-11
申请人： Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
发明人： Youngok Kim , Jeongnam Han , Changki Hong , Boun Yoon , Kuntack Lee , Young-Hoo Kim
IPC分类号： G01R31/26 , G01R31/08 , H01L21/66
CPC分类号： H01L22/14
摘要： The inventive concept provides a wafer test method and a wafer test apparatus. The wafer test method can recognize the amount of residuals generated in a sidewall of the metal-containing layer pattern and the extent of corrosion of a sidewall of the metal-containing layer pattern using the measured electric resistance by supplying an electrolyte so that the electrolyte is in contact with a portion of the metal-containing layer pattern in a predetermined chip region and measuring an electric resistance between a first electrode which is electrically in contact with the other portion of the metal-containing layer pattern and a second electrode which is in contact with the electrolyte in the predetermined region. Thus, a wafer test method and a wafer test apparatus can be embodied by an in-line method without dividing a wafer into each chip.
摘要翻译：本发明的概念提供了晶片测试方法和晶片测试装置。晶片测试方法可以通过提供电解质来确定含金属层图案的侧壁中产生的残留量以及含金属层图案的侧壁的腐蚀程度，使得电解质为与预定芯片区域中的含金属层图案的一部分接触，并且测量与含金属层图案的另一部分电接触的第一电极和接触的第二电极之间的电阻电解液在预定区域内。因此，可以通过在线方式来实现晶片测试方法和晶片测试装置，而不将晶片分成每个芯片。

5. 发明申请

US20110266606A1 METHOD OF MANUFACTURING NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY DEVICE MANUFACTURED BY THE METHOD 有权
标题翻译：制造非易失性存储器件的方法和由该方法制造的非易失性存储器件
公开(公告)号：US20110266606A1
公开(公告)日：2011-11-03
申请号：US13179842
申请日：2011-07-11
申请人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
发明人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
IPC分类号： H01L29/78
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.
摘要翻译：一种制造具有三维存储器件的非易失性存储器件的方法包括在半导体衬底上交替堆叠具有不同蚀刻选择性的多个第一和第二材料层; 形成贯穿所述多个第一和第二材料层的开口; 去除由开口暴露的第一材料层，以形成从开口垂直于半导体衬底的方向延伸的延伸部分; 沿着开口和延伸部分的表面保形地形成电荷存储层; 并且去除形成在第二材料层的侧壁上的电荷存储层，以在延伸部分中局部形成电荷存储层图案。

6. 发明申请

US20100120214A1 Method of manufacturing nonvolatile memory device and nonvolatile memory device manufactured by the method 有权
标题翻译：通过该方法制造非易失性存储器件和非易失性存储器件的制造方法
公开(公告)号：US20100120214A1
公开(公告)日：2010-05-13
申请号：US12590614
申请日：2009-11-10
申请人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
发明人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.
摘要翻译：一种制造具有三维存储器件的非易失性存储器件的方法包括在半导体衬底上交替堆叠具有不同蚀刻选择性的多个第一和第二材料层; 形成贯穿所述多个第一和第二材料层的开口; 去除由开口暴露的第一材料层，以形成从开口垂直于半导体衬底的方向延伸的延伸部分; 沿着开口和延伸部分的表面保形地形成电荷存储层; 并且去除形成在第二材料层的侧壁上的电荷存储层，以在延伸部分中局部形成电荷存储层图案。

7. 发明授权

US07994011B2 Method of manufacturing nonvolatile memory device and nonvolatile memory device manufactured by the method 有权
标题翻译：通过该方法制造非易失性存储器件和非易失性存储器件的制造方法
公开(公告)号：US07994011B2
公开(公告)日：2011-08-09
申请号：US12590614
申请日：2009-11-10
申请人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
发明人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
IPC分类号： H01L21/336 , H01L29/66
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.
摘要翻译：一种制造具有三维存储器件的非易失性存储器件的方法包括在半导体衬底上交替堆叠具有不同蚀刻选择性的多个第一和第二材料层; 形成贯穿所述多个第一和第二材料层的开口; 去除由开口暴露的第一材料层，以形成从开口垂直于半导体衬底的方向延伸的延伸部分; 沿着开口和延伸部分的表面保形地形成电荷存储层; 并且去除形成在第二材料层的侧壁上的电荷存储层，以在延伸部分中局部形成电荷存储层图案。

8. 发明授权

US08404548B2 Method of manufacturing nonvolatile memory device and nonvolatile memory device manufactured by the method 有权
标题翻译：通过该方法制造非易失性存储器件和非易失性存储器件的制造方法
公开(公告)号：US08404548B2
公开(公告)日：2013-03-26
申请号：US13179842
申请日：2011-07-11
申请人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
发明人： Imsoo Park , Young-Hoo Kim , Changki Hong , Jaedong Lee , Daehong Eom , Sung-Jun Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.
摘要翻译：一种制造具有三维存储器件的非易失性存储器件的方法包括在半导体衬底上交替堆叠具有不同蚀刻选择性的多个第一和第二材料层; 形成贯穿所述多个第一和第二材料层的开口; 去除由开口暴露的第一材料层，以形成从开口垂直于半导体衬底的方向延伸的延伸部分; 沿着开口和延伸部分的表面保形地形成电荷存储层; 并且去除形成在第二材料层的侧壁上的电荷存储层，以在延伸部分中局部形成电荷存储层图案。

9. 发明授权

US5652187A Method for fabricating doped interlayer-dielectric film of semiconductor device using a plasma treatment 失效
标题翻译：使用等离子体处理制造半导体器件的掺杂层间绝缘膜的方法
公开(公告)号：US5652187A
公开(公告)日：1997-07-29
申请号：US190619
申请日：1994-02-01
申请人： Changgyu Kim , Changki Hong , Uin Chung , Yongchul Ahn
发明人： Changgyu Kim , Changki Hong , Uin Chung , Yongchul Ahn
IPC分类号： H01L21/3105 , H01L21/316 , H01L21/768 , H01L21/31
CPC分类号： H01L21/02129 , H01L21/02271 , H01L21/0234 , H01L21/02343 , H01L21/3105 , H01L21/31625 , H01L21/76826 , H01L21/76834 , Y10S438/906
摘要： The surface of a borophosphosilicate glass (BPSG) dielectric film undergoes a surface treatment, such as by plasma treatment with N.sub.2 O, N.sub.2 +NH.sub.3, N.sub.2, O.sub.2 or O.sub.3. Erosion caused by H.sub.2 SO.sub.4 boiling or by humidity absorption from the atmosphere is thereby reduced so that reflow processing at temperatures ideally below 850.degree. C. is possible and an interlayer dielectric film of excellent planarity is thus formed.
摘要翻译：硼磷硅酸盐玻璃（BPSG）介电薄膜的表面进行表面处理，例如用N 2 O，N 2 + NH 3，N 2，O 2或O 3等离子体处理。由H2SO4沸腾或由大气吸收湿气引起的侵蚀由此降低，从而在理想的低于850℃的温度下进行回流处理是可能的，从而形成了具有优异平面性的层间电介质膜。

10. 发明授权

US5405489A Method for fabricating an interlayer-dielectric film of a semiconductor device by using a plasma treatment prior to reflow 失效
标题翻译：在回流之前使用等离子体处理制造半导体器件的层间绝缘膜的方法
公开(公告)号：US5405489A
公开(公告)日：1995-04-11
申请号：US969582
申请日：1992-10-30
申请人： Changgyu Kim , Changki Hong , Uin Chung , Yongchul Ahn
发明人： Changgyu Kim , Changki Hong , Uin Chung , Yongchul Ahn
IPC分类号： H01L21/3105 , H01L21/316 , H01L21/768 , H01L21/00 , B44C1/22 , C03C15/00 , H01L21/02
CPC分类号： H01L21/02129 , H01L21/02271 , H01L21/0234 , H01L21/02343 , H01L21/3105 , H01L21/31625 , H01L21/76826 , H01L21/76834
摘要： The surface of a borophosphosilicate glass (BPSG) dielectric film is changed through a surface treatment, such as by plasma etching with N.sub.2 O, O.sub.3 or O.sub.2. Erosion caused by H.sub.2 SO.sub.4 boiling or by humidity absorption from the atmosphere is thereby reduced so that reflow processing at temperatures below 850.degree. C. is possible and an interlayer dielectric film of excellent planarity is thus formed.
摘要翻译：通过表面处理，例如通过用N 2 O，O 3或O 2进行等离子体蚀刻来改变硼磷硅酸盐玻璃（BPSG）电介质膜的表面。由于H2SO4沸腾或大气吸湿引起的侵蚀因此降低，从而可以在低于850℃的温度下进行回流处理，从而形成具有优异平面性的层间电介质膜。

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