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1. 发明授权

US06331478B1 Methods for manufacturing semiconductor devices having chamfered metal silicide layers 有权
标题翻译：具有倒角金属硅化物层的半导体器件的制造方法
公开(公告)号：US06331478B1
公开(公告)日：2001-12-18
申请号：US09685456
申请日：2000-10-09
申请人： Keum-joo Lee , In-seak Hwang , Yong-sun Ko , Chang-Iyoung Song
发明人： Keum-joo Lee , In-seak Hwang , Yong-sun Ko , Chang-Iyoung Song
IPC分类号： H01L214763
CPC分类号： H01L29/42376 , H01L21/28061 , H01L21/28114 , H01L21/32134 , H01L21/32139 , H01L21/76897 , H01L27/10873
摘要： Methods for manufacturing a semiconductor device, in which a chamfered metal silicide layer is formed by a 2-stage continuous wet etching process using different etchants, thereby resulting in a sufficient insulation margin between a lower conductive layer including the metal silicide layer and the contact plug self-aligned with the lower conductive layer are disclosed. In the manufacture of a semiconductor device, a mask pattern is formed on a metal silicide layer to expose a portion of the metal silicide layer. The exposed portion of the metal silicide layer is isotropically etched in a first etchant to form a metal silicide layer with a shallow groove, and defects due to the silicon remaining on the surface of the metal silicide layer with the shallow groove are removed using a second etchant, to form a metal silicide layer with a smooth surface. Microelectronic structures produced by methods of the present invention are also disclosed.
摘要翻译：制造半导体器件的方法，其中通过使用不同蚀刻剂的2阶段连续湿蚀刻工艺形成倒角金属硅化物层，从而在包括金属硅化物层的下导电层和接触插塞之间形成足够的绝缘边缘公开了与下导电层自对准。在半导体器件的制造中，在金属硅化物层上形成掩模图案以暴露金属硅化物层的一部分。金属硅化物层的暴露部分在第一蚀刻剂中被各向同性地蚀刻以形成具有浅槽的金属硅化物层，并且由于在具有浅槽的金属硅化物层的表面上残留的硅的缺陷被使用第二蚀刻剂，以形成具有光滑表面的金属硅化物层。还公开了通过本发明的方法生产的微电子结构。

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