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1. 发明授权

US08995651B1 Multiple algorithm cryptography system 有权
标题翻译：多重加密系统
公开(公告)号：US08995651B1
公开(公告)日：2015-03-31
申请号：US13156893
申请日：2011-06-09
申请人： Sean Lee , Chang Shu , Fei Sun
发明人： Sean Lee , Chang Shu , Fei Sun
IPC分类号： H04L9/00 , G06F7/72 , H04L9/30
CPC分类号： G06F7/728 , G06F7/72 , G06F7/725 , H04L9/302 , H04L9/3066 , H04L2209/12
摘要： A system includes an interface module, an addressing module, and a multiplier module. The interface module is configured to (i) receive operands and configuration data for a Rivest-Shamir-Adleman (RSA) operation or an Elliptic Curve Cryptography (ECC) operation, and (ii) control access to a random access memory (RAM). The addressing module is configured to allocate memory space within the RAM for storage of the operands. The multiplier module includes a Montgomery multiplier configured to perform Montgomery multiplication operation for both the RSA operation and the ECC operation.
摘要翻译：系统包括接口模块，寻址模块和乘法器模块。接口模块被配置为（i）接收用于Rivest-Shamir-Adleman（RSA）操作或椭圆曲线加密（ECC）操作的操作数和配置数据，以及（ii）控制对随机存取存储器（RAM）的访问。寻址模块被配置为在RAM内分配存储空间以存储操作数。乘法器模块包括配置为对RSA操作和ECC操作进行蒙哥马利乘法运算的蒙哥马利乘数。

2. 发明授权

US08358779B1 Prime field elliptic curve cryptography processor 有权
标题翻译：主场椭圆曲线加密处理器
公开(公告)号：US08358779B1
公开(公告)日：2013-01-22
申请号：US12713297
申请日：2010-02-26
申请人： Fei Sun , Chang Shu
发明人： Fei Sun , Chang Shu
IPC分类号： G06F21/00
CPC分类号： G06F21/72 , G06F7/725 , H04L9/0861 , H04L9/28 , H04L9/3066 , H04L2209/12
摘要： Prime field elliptic curve cryptography processors are provided, having corresponding methods and computer-readable media. The processors comprise a prime field circuit comprising a first memory configured to store data, and an arithmetic logic unit (ALU) circuit configured to perform prime field operations upon the data; and a curve operation processor comprising a second memory configured to store instructions, and a controller configured to execute the instructions; wherein the instructions include instructions for performing curve operations upon the data, wherein the curve operations require performing the prime field operations upon the data; and wherein the instructions for performing the curve operations cause the ALU circuit to perform the prime field operations.
摘要翻译：提供了主场椭圆曲线加密处理器，具有相应的方法和计算机可读介质。所述处理器包括：主场电路，包括被配置为存储数据的第一存储器;以及被配置为对所述数据进行主场操作的算术逻辑单元（ALU）电路; 以及曲线运算处理器，包括被配置为存储指令的第二存储器和被配置为执行所述指令的控制器; 其中所述指令包括用于对所述数据执行曲线操作的指令，其中所述曲线操作要求对所述数据执行所述主场操作; 并且其中用于执行曲线操作的指令使得ALU电路执行主场操作。

3. 发明授权

US07934177B2 Method and system for a pattern layout split 有权
标题翻译：图案布局拆分的方法和系统
公开(公告)号：US07934177B2
公开(公告)日：2011-04-26
申请号：US11671866
申请日：2007-02-06
申请人： Jaw-Jung Shin , King-Chang Shu , Tsai-Sheng Gau , Burn Jeng Lin
发明人： Jaw-Jung Shin , King-Chang Shu , Tsai-Sheng Gau , Burn Jeng Lin
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G03F1/36 , G03F1/70 , G03F7/70466
摘要： A method for splitting a pattern layout including providing the pattern layout having features, checking the pattern layout to determine the features that require splitting, coloring the features that require splitting with a first and second color, resolving coloring conflicts by decomposing the feature with the coloring conflict and coloring the decomposed feature with the first and second color, and generating a first mask with features of the first color and a second mask with features of the second color.
摘要翻译：一种用于分割图案布局的方法，包括提供具有特征的图案布局，检查图案布局以确定需要分割的特征，着色需要用第一和第二颜色分割的特征，通过用着色分解特征来解决着色冲突冲突和着色具有第一和第二颜色的分解特征，以及生成具有第一颜色特征的第一掩模和具有第二颜色特征的第二掩模。

4. 发明申请

US20080189672A1 Method and System For a Pattern Layout Split 有权
标题翻译：图案布局拆分的方法和系统
公开(公告)号：US20080189672A1
公开(公告)日：2008-08-07
申请号：US11671866
申请日：2007-02-06
申请人： Jaw-Jung Shin , King-Chang Shu , Tsai-Sheng Gau , Burn Jeng Lin
发明人： Jaw-Jung Shin , King-Chang Shu , Tsai-Sheng Gau , Burn Jeng Lin
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G03F1/36 , G03F1/70 , G03F7/70466
摘要： A method for splitting a pattern layout including providing the pattern layout having features, checking the pattern layout to determine the features that require splitting, coloring the features that require splitting with a first and second color, resolving coloring conflicts by decomposing the feature with the coloring conflict and coloring the decomposed feature with the first and second color, and generating a first mask with features of the first color and a second mask with features of the second color.
摘要翻译：一种用于分割图案布局的方法，包括提供具有特征的图案布局，检查图案布局以确定需要分割的特征，着色需要用第一和第二颜色分割的特征，通过用着色分解特征来解决着色冲突冲突和着色具有第一和第二颜色的分解特征，以及生成具有第一颜色特征的第一掩模和具有第二颜色特征的第二掩模。

5. 发明授权

US5893731A Method for fabricating low cost integrated resistor capacitor combinations 失效
标题翻译：制造低成本集成电阻电容器组合的方法
公开(公告)号：US5893731A
公开(公告)日：1999-04-13
申请号：US862796
申请日：1997-05-23
申请人： Chang-Shu Lee , Tsung-Yao Chu
发明人： Chang-Shu Lee , Tsung-Yao Chu
IPC分类号： H01L21/02 , H01L27/06 , H01L21/8234
CPC分类号： H01L28/20 , H01L27/0688 , H01L28/40
摘要： A low cost method for forming an integrated resistor capacitor combination using only three masks and three mask exposure steps is described. A layer of resistor material is formed on a substrate and patterned forming a resistor and a first capacitor plate. A photoresist mask is then formed covering the resistor and a contact region of the first capacitor plate. The substrate is then immersed in an anodization solution and that part of the first capacitor plate not covered by the photoresist mask is anodized forming a capacitor dielectric. The photoresist mask is then stripped. A layer of conductor material is then formed and patterned to form contacts to the resistor, a contact to the first capacitor plate, and a second capacitor plate.
摘要翻译：描述了仅使用三个掩模和三个掩模曝光步骤形成集成电阻器电容器组合的低成本方法。在基板上形成电阻材料层，并形成电阻器和第一电容器板。然后形成覆盖电阻器和第一电容器板的接触区域的光致抗蚀剂掩模。然后将衬底浸入阳极氧化溶液中，并且未被光致抗蚀剂掩模覆盖的部分第一电容器板被阳极氧化形成电容器电介质。然后剥离光致抗蚀剂掩模。然后形成导体材料层并构图以形成与电阻器的接触，与第一电容器板的接触以及第二电容器板。

6. 外观设计

USD336739S Double-blade windshield wiper 失效
公开(公告)号：USD336739S
公开(公告)日：1993-06-22
申请号：US669455
申请日：1991-03-13
申请人： Shu-Chen Wu , Chang Shu-Yun
设计人： Shu-Chen Wu , Chang Shu-Yun

7. 发明授权

US08527570B1 Low cost and high speed architecture of montgomery multiplier 失效
标题翻译： montgomery乘法器的低成本和高速架构
公开(公告)号：US08527570B1
公开(公告)日：2013-09-03
申请号：US12855340
申请日：2010-08-12
申请人： Chang Shu , Heng Tang , Sean Lee
发明人： Chang Shu , Heng Tang , Sean Lee
IPC分类号： G06F7/38
CPC分类号： G06F7/728
摘要： A system to perform Montgomery multiplication includes a first multiplier array configured to multiply w bits of an operand X by W bits of an operand Y, where w and W are integers and w is less than W. A second multiplier array is configured to multiply w bits of an operand Q by W bits of a modulo M. An adder array is configured to add outputs of the first and second multiplier arrays to generate a sum. A partial sum array is configured to store a left portion of the sum. A memory is configured to store a right portion of the sum. Q computation logic includes a lookup table and a half-multiplier that compute W bits of the operand Q sequentially in 2 · W w cycles or W w cycles. The W bits of the operand Q are stored in the fourth buffer for use by subsequent W×W operations.
摘要翻译：执行蒙哥马利乘法的系统包括：第一乘法器阵列，被配置为将操作数X的W位乘以操作数Y的W位，其中w和W是整数，并且w小于W.第二乘法器阵列被配置为将w 操作数Q的位由模M的W位构成。加法器阵列被配置为添加第一和第二乘法器阵列的输出以产生和。部分和数组被配置为存储和的左部分。存储器被配置为存储总和的右部分。 Q计算逻辑包括查找表和半乘法器，其以2WW周期或Ww周期顺序地计算操作数Q的W位。操作数Q的W位存储在第四缓冲器中，以供随后的W×W操作使用。

8. 发明申请

US20090024426A1 Method and Apparatus for Dynamic Evolution in Business Performance Management 失效
标题翻译：业务绩效管理中动态演进的方法与设备
公开(公告)号：US20090024426A1
公开(公告)日：2009-01-22
申请号：US11779320
申请日：2007-07-18
申请人： Hung-Yang Chang , Hui Lei , Chang Shu , Liangzhao Zeng
发明人： Hung-Yang Chang , Hui Lei , Chang Shu , Liangzhao Zeng
IPC分类号： G06F9/44
CPC分类号： G06Q10/00 , G06F8/72 , G06Q10/063 , G06Q10/0637
摘要： A policy-driven approach to Business Performance Management (BPM) evolution is to capture the mechanism of BPM solution evolutions. These policies are executed by the runtime infrastructure which transforms and interprets evolution policies and allows fine granularity controls on solution evolution. At transformation time, the relationship among the event processing progress and the runtime state is derived based on the observation model. Such relationship information allows verification of freshness of migrating data and parallelization of runtime state validation and event processing. Consistent and efficient evolution of BPM solutions transit while event processing is operational.
摘要翻译：业务绩效管理（BPM）演变的策略驱动方法是捕捉BPM解决方案演进的机制。这些策略由运行时基础架构执行，转换和解释进化策略，并允许对解决方案演进进行细粒度控制。在转换时，根据观察模型推导事件处理进度与运行时状态之间的关系。这种关系信息允许验证迁移数据的新鲜度和运行时状态验证和事件处理的并行化。在事件处理运行时，BPM解决方案的一致和高效演进。

9. 发明申请

US20070203680A1 Method and System for Identifying Lens Aberration Sensitive Patterns in an Integrated Circuit Chip 失效
标题翻译：用于识别集成电路芯片中的透镜畸变敏感图案的方法和系统
公开(公告)号：US20070203680A1
公开(公告)日：2007-08-30
申请号：US11421618
申请日：2006-06-01
申请人： Jaw-Jung Shin , King-Chang Shu , Jan-Wen You , Tsai-Sheng Gau
发明人： Jaw-Jung Shin , King-Chang Shu , Jan-Wen You , Tsai-Sheng Gau
IPC分类号： G06G7/48
CPC分类号： G03F7/70433 , G03F7/705 , G03F7/706
摘要： Disclosed is a method and a system for identifying lens aberration sensitive patterns in an integrated circuit chip. A first simulation of a layout is performed to simulate a contour without lens aberration. A second simulation is performed of the layout to simulate a contour with lens aberration. A difference of critical dimension is determined between the contours with and without lens aberration, and at least one lens aberration sensitive pattern is selected from a plurality of layouts based on the difference in critical dimension.
摘要翻译：公开了用于识别集成电路芯片中的透镜像差敏感图案的方法和系统。执行布局的第一模拟以模拟没有透镜像差的轮廓。执行布局以模拟具有透镜像差的轮廓的第二模拟。在具有和不具有透镜像差的轮廓之间确定临界尺寸的差异，并且基于临界尺寸的差异从多个布局中选择至少一个透镜像差敏感图案。

10. 发明授权

US06973636B2 Method of defining forbidden pitches for a lithography exposure tool 失效
标题翻译：定义光刻曝光工具的禁止间距的方法
公开(公告)号：US06973636B2
公开(公告)日：2005-12-06
申请号：US10688500
申请日：2003-10-17
申请人： Jaw-Jung Shin , Chun-Kuang Chen , Tsai-Sheng Gau , Burn-Jeng Lin , Li-Chun Tien , Mi-Chang Chang , Yu-Jun Chou , Jan-Wen You , King-Chang Shu , Li-Jui Chen
发明人： Jaw-Jung Shin , Chun-Kuang Chen , Tsai-Sheng Gau , Burn-Jeng Lin , Li-Chun Tien , Mi-Chang Chang , Yu-Jun Chou , Jan-Wen You , King-Chang Shu , Li-Jui Chen
IPC分类号： G03F1/14 , G03F7/20 , G06F17/50
CPC分类号： G03F7/70641 , G03F1/44 , G03F7/70425 , G03F7/70433 , G03F7/705
摘要： A method of identifying and defining forbidden pitches or forbidden pitch ranges for a lithographic exposure tool under a given set of exposure conditions is provided. In the method, a computer simulation is performed, and its results are compared to frequently used pitches to see if such frequently used pitches may yield depth-of-focus (DOF) values greater than the focus budget for the exposure tool. If so, a verification test is performed by using a test mask and actually exposing a surface with the same pattern pitches simulated. From this, actual DOF values are obtained and compared to the focus budget of the exposure tool. Any pitches having a DOF value greater than the focus budget are designated as forbidden pitches. This forbidden pitch information may be integrated into a design rule to restrict the use of such forbidden pitches under the given exposure conditions where they are likely to arise.
摘要翻译：提供了一种在给定的曝光条件下识别和限定光刻曝光工具的禁止间距或禁止间距范围的方法。在该方法中，执行计算机模拟，并将其结果与经常使用的间距进行比较，以查看这种经常使用的间距是否可以产生比曝光工具的焦点预算大的焦点深度（DOF）值。如果是这样，则通过使用测试掩模执行验证测试，并且实际上暴露出模拟相同模式间距的表面。从此，获得实际的DOF值，并与曝光工具的焦点预算进行比较。 DOF值大于焦点预算的任何间距都被指定为禁止间距。该禁止音调信息可以被集成到设计规则中，以限制在可能出现的给定曝光条件下使用这种禁止间距。

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