专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090271578A1 Reducing Memory Fetch Latency Using Next Fetch Hint 审中-公开
标题翻译：使用下一个提取提示减少内存提取延迟
公开(公告)号：US20090271578A1
公开(公告)日：2009-10-29
申请号：US12108019
申请日：2008-04-23
申请人： Wayne M. Barrett , Brian T. Vanderpool
发明人： Wayne M. Barrett , Brian T. Vanderpool
IPC分类号： G06F12/00
CPC分类号： G06F12/0215 , G06F12/0862 , G06F2212/6028
摘要： In one aspect, a processor is provided. The processor may include logic, coupled to the processor, and to issue a currently issued memory fetch over a processor bus. The currently issued memory fetch may include a next fetch hint that may include information about a next memory fetch.
摘要翻译：在一个方面，提供一种处理器。处理器可以包括耦合到处理器的逻辑，并且通过处理器总线发布当前发布的存储器提取。当前发行的存储器提取可以包括可以包括关于下一个存储器提取的信息的下一个提取提示。

2. 发明申请

US20090268736A1 Early header CRC in data response packets with variable gap count 审中-公开
标题翻译：数据响应报文中的早期报头CRC可变间隙计数
公开(公告)号：US20090268736A1
公开(公告)日：2009-10-29
申请号：US12108637
申请日：2008-04-24
申请人： Brian D. Allison , Wayne M. Barrett , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool
发明人： Brian D. Allison , Wayne M. Barrett , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool
IPC分类号： H04L12/56
CPC分类号： H04L1/0061 , H04L1/0072 , H04L2001/0094
摘要： A method is provided for processing commands issued by a processor over a bus. The method includes the steps of (1) transmitting the command to a remote node to obtain access to data required to complete the command; (2) receiving from the remote node a response packet including a header and a header CRC; (3) validating the response packet based on the header CRC; and (4) before receiving the data required to complete the command, arranging to return the data to the processor over the bus.
摘要翻译：提供了一种处理由总线发出的命令的方法。该方法包括以下步骤：（1）将命令发送到远程节点以获得对完成命令所需的数据的访问; （2）从远程节点接收包括报头和报头CRC的响应分组; （3）基于报头CRC验证响应分组; 和（4）在接收完成命令所需的数据之前，安排通过总线将数据返回到处理器。

3. 发明申请

US20090268727A1 Early header CRC in data response packets with variable gap count 审中-公开
标题翻译：数据响应报文中的早期报头CRC可变间隙计数
公开(公告)号：US20090268727A1
公开(公告)日：2009-10-29
申请号：US12108735
申请日：2008-04-24
申请人： Brian D. Allison , Wayne M. Barrett , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool
发明人： Brian D. Allison , Wayne M. Barrett , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool
IPC分类号： H04L12/56
CPC分类号： H04L69/22 , H04L69/324
摘要： A method is provided for processing a command issued by a processor over a bus. The method includes (1) transmitting the command to a remote node to obtain access to data required to complete the command; (2) receiving from the remote node a response packet including a header and a variable gap; and (3) before receiving the data required to complete the command, arranging to return the data to the processor over the bus.
摘要翻译：提供了一种用于处理由总线发出的处理器的命令的方法。该方法包括（1）将命令发送到远程节点以获得完成命令所需的数据; （2）从远程节点接收包括报头和可变间隙的响应分组; 和（3）在接收完成命令所需的数据之前，安排通过总线将数据返回到处理器。

4. 发明申请

US20130242985A1 MULTICAST BANDWIDTH MULTIPLICATION FOR A UNIFIED DISTRIBUTED SWITCH 有权
公开(公告)号：US20130242985A1
公开(公告)日：2013-09-19
申请号：US13420180
申请日：2012-03-14
申请人： Claude Basso , Todd A. Greenfield , Philip R. Hillier, III , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool , Bruce M. Walk
发明人： Claude Basso , Todd A. Greenfield , Philip R. Hillier, III , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool , Bruce M. Walk
IPC分类号： H04L12/56
CPC分类号： H04L45/16 , H04L49/201 , H04L49/351 , H04L49/70
摘要： The distributed switch may include a plurality of chips (i.e., sub-switches) on a switch module. These sub-switches may receive from a computing device connected to a Tx/Rx port a multicast data frame (e.g., an Ethernet frame) that designates a plurality of different destinations. Instead of simply using one egress connection interface to forward the copies of the data frame to each of the destinations sequentially, the sub-switch may use a plurality of a connection interfaces to transfer copies of the multicast data frame simultaneously. The port that receives the multicast data frame can borrow the connection interfaces (and associated hardware such as buffers) assigned to these other ports to transmit copies of the multicast data frame simultaneously.

5. 发明申请

US20090271532A1 Early header CRC in data response packets with variable gap count 审中-公开
标题翻译：数据响应报文中的早期报头CRC可变间隙计数
公开(公告)号：US20090271532A1
公开(公告)日：2009-10-29
申请号：US12108744
申请日：2008-04-24
申请人： Brian D. Allison , Wayne M. Barrett , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool
发明人： Brian D. Allison , Wayne M. Barrett , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool
IPC分类号： G06F13/14
CPC分类号： G06F11/1004
摘要： A method is provided for processing a command issued by a processor over a bus. The method includes (1) transmitting the command to a remote node to obtain access to data required to complete the command; (2) receiving from the remote node a response packet including a header and a header CRC; (3) validating the response packet including the header and the header CRC; (4) loading a timer to run until data required to complete the command is received or the timer expires; and (5) before receiving the data required to complete the command, arranging to return the data to the processor over the bus.
摘要翻译：提供了一种用于处理由总线发出的处理器的命令的方法。该方法包括（1）将命令发送到远程节点以获得完成命令所需的数据; （2）从远程节点接收包括报头和报头CRC的响应分组; （3）验证包括报头和报头CRC的响应报文; （4）加载定时器运行，直到接收完成命令所需的数据或定时器到期; 和（5）在接收完成命令所需的数据之前，安排通过总线将数据返回给处理器。

6. 发明授权

US07519510B2 Derivative performance counter mechanism 失效
标题翻译：衍生性能计数器机制
公开(公告)号：US07519510B2
公开(公告)日：2009-04-14
申请号：US10992444
申请日：2004-11-18
申请人： Brian Lee Koehler , Brian T. Vanderpool
发明人： Brian Lee Koehler , Brian T. Vanderpool
IPC分类号： G06F11/30 , G06F15/00 , G21C17/00
CPC分类号： G06F11/3409 , G06F11/3466 , G06F2201/81 , G06F2201/88 , G06F2201/885
摘要： A circuit and method for using hardware to calculate a first derivative of the number of performance events that occur in a microprocessor during a predetermined period of time. This first derivative indicates a frequency of such performance events, which can be used as either a predictor of future problems or needs, or may be used to invoke a corrective action.
摘要翻译：一种用于使用硬件来计算在预定时间段内在微处理器中发生的性能事件数量的一阶导数的电路和方法。这种一阶导数表示这种性能事件的频率，可以用作未来问题或需求的预测器，或者可以用于调用纠正措施。

7. 发明申请

US20080307169A1 Method, Apparatus, System and Program Product Supporting Improved Access Latency for a Sectored Directory 审中-公开
标题翻译：方法，设备，系统和程序产品支持改进的部署目录的访问延迟
公开(公告)号：US20080307169A1
公开(公告)日：2008-12-11
申请号：US11758851
申请日：2007-06-06
申请人： Duane Arlyn Averill , Jonathon C. Skarphol , Brian T. Vanderpool
发明人： Duane Arlyn Averill , Jonathon C. Skarphol , Brian T. Vanderpool
IPC分类号： G06F12/08
CPC分类号： G06F12/0817 , G06F2212/1016
摘要： A data processing system includes a coherence directory having a prefetch sector cache and a memory directory array containing a plurality of sectored entries. According to one method, in response to receiving a first directory lookup request specifying a first target address, an entry associated with the target address is accessed in the memory directory array. In response to the access, the coherence directory returns, as a result of the first directory lookup request, contents of a first sector that is identified by the target address as a requested sector. The coherence directory also caches contents of a second sector of the multiple sectors that is a non-requested sector for the first directory lookup request in a prefetch sector cache. In response to receiving a subsequent second directory lookup request specifying a second target address that identifies the second sector as a requested sector, the coherence directory accesses the contents of the second sector in the sector prefetch cache and returns the contents of the second sector as a result of the second directory lookup request.
摘要翻译：数据处理系统包括具有预取扇区高速缓存的同步目录和包含多个扇区条目的存储器目录阵列。根据一种方法，响应于接收到指定第一目标地址的第一目录查找请求，在存储器目录数组中访问与目标地址相关联的条目。响应于访问，相干目录作为第一目录查找请求的结果返回由目标地址识别为请求扇区的第一扇区的内容。相干目录还将作为第一目录查找请求的非请求扇区的多个扇区的第二扇区的内容缓存在预取扇区高速缓存中。响应于接收指定识别第二扇区作为所请求扇区的第二目标地址的后续第二目录查找请求，所述相干目录访问扇区预取高速缓存中的第二扇区的内容，并将第二扇区的内容返回为第二个目录查询请求的结果。

8. 发明申请

US20080215818A1 STRUCTURE FOR SILENT INVALID STATE TRANSITION HANDLING IN AN SMP ENVIRONMENT 有权
标题翻译： SMP环境中静态无效状态过渡处理的结构
公开(公告)号：US20080215818A1
公开(公告)日：2008-09-04
申请号：US12105970
申请日：2008-04-18
申请人： Marcus L. Kornegay , Ngan N. Pham , Brian T. Vanderpool
发明人： Marcus L. Kornegay , Ngan N. Pham , Brian T. Vanderpool
IPC分类号： G06F12/08
CPC分类号： G06F12/0817 , G06F12/0808
摘要： A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design can be provided. The design structure includes a symmetric multiprocessing (SMP) system. The system includes a plurality of nodes. Each of the nodes includes a node controller and a plurality of processors cross-coupled to one another. The system also includes at least one cache directory coupled to each node controller, and, invalid state transition logic coupled to each node controller. The invalid state transition logic includes program code enabled to identify an invalid state transition for a cache line in a local node, to evict a corresponding cache directory entry for the cache line, and to forward an invalid state transition notification to a node controller for a home node for the cache line in order for the home node to evict a corresponding cache directory entry for the cache line.
摘要翻译：可以提供体现在用于设计，制造和/或测试设计的机器可读存储介质中的设计结构。设计结构包括对称多处理（SMP）系统。该系统包括多个节点。每个节点包括节点控制器和彼此交叉耦合的多个处理器。该系统还包括耦合到每个节点控制器的至少一个缓存目录，以及耦合到每个节点控制器的无效状态转换逻辑。无效状态转移逻辑包括能够识别本地节点中的高速缓存行的无效状态转换的程序代码，以驱逐高速缓存行的相应高速缓存目录条目，并将无效状态转换通知转发给节点控制器为了使家庭节点驱逐高速缓存行的相应高速缓存目录条目，缓存行的主节点。

9. 发明授权

US5781773A Method for transforming and storing data for search and display and a searching system utilized therewith 失效
标题翻译：用于搜索和显示的数据的变换和存储方法以及与其一起使用的搜索系统
公开(公告)号：US5781773A
公开(公告)日：1998-07-14
申请号：US916868
申请日：1997-08-22
申请人： Thomas R. Vanderpool , Craig K. Lenz , TJ Parro , John D. Threlfall , Brian T. Vanderpool
发明人： Thomas R. Vanderpool , Craig K. Lenz , TJ Parro , John D. Threlfall , Brian T. Vanderpool
IPC分类号： G06F17/30
CPC分类号： G06F17/3028 , G06F17/30017 , Y10S707/915 , Y10S707/917 , Y10S707/99943
摘要： A method of transforming and storing data for search and display by a computer system includes formatting and aligning data records of a plurality of objects to a common table mapped format. The formatted and aligned data records are merged and a database is generated therefrom. The database is stored on an optical disc and includes index tables corresponding to searchable data fields. Image data for the objects is compressed and a main compressed image and an image of lesser resolution are randomly stored to a plurality of storage subdirectories on an optical disc. A program for searching and further processing the stored data is also stored on the optical disc with the database and the storage subdirectories. The program for search and display of the data uses an index bar interface for searching the indexed tables. The objects may include real estate properties.
摘要翻译：一种通过计算机系统进行搜索和显示的数据变换和存储的方法包括将多个对象的数据记录格式化和对准为公共表映射格式。格式化和对齐的数据记录被合并，并从中生成数据库。数据库存储在光盘上，并包括与可搜索数据字段对应的索引表。压缩对象的图像数据，将主压缩图像和较低分辨率的图像随机存储到光盘上的多个存储子目录中。用于搜索和进一步处理所存储的数据的程序也与数据库和存储子目录一起存储在光盘上。用于搜索和显示数据的程序使用索引条接口来搜索索引表。物品可能包括不动产属性。

10. 发明授权

US08897301B2 Multicast bandwidth multiplication for a unified distributed switch 有权
标题翻译：统一分布式交换机的组播带宽乘法
公开(公告)号：US08897301B2
公开(公告)日：2014-11-25
申请号：US13420180
申请日：2012-03-14
申请人： Claude Basso , Todd A. Greenfield , Philip R. Hillier, III , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool , Bruce M. Walk
发明人： Claude Basso , Todd A. Greenfield , Philip R. Hillier, III , Mark L. Rudquist , Kenneth M. Valk , Brian T. Vanderpool , Bruce M. Walk
IPC分类号： H04L12/28 , H04L12/50 , H04L12/54 , H04J3/24 , H04J3/26 , G06F15/167
CPC分类号： H04L45/16 , H04L49/201 , H04L49/351 , H04L49/70
摘要： The distributed switch may include a plurality of chips (i.e., sub-switches) on a switch module. These sub-switches may receive from a computing device connected to a Tx/Rx port a multicast data frame (e.g., an Ethernet frame) that designates a plurality of different destinations. Instead of simply using one egress connection interface to forward the copies of the data frame to each of the destinations sequentially, the sub-switch may use a plurality of a connection interfaces to transfer copies of the multicast data frame simultaneously. The port that receives the multicast data frame can borrow the connection interfaces (and associated hardware such as buffers) assigned to these other ports to transmit copies of the multicast data frame simultaneously.
摘要翻译：分布式交换机可以包括交换机模块上的多个芯片（即子交换机）。这些子交换机可以从连接到Tx / Rx端口的计算设备接收指定多个不同目的地的多播数据帧（例如，以太网帧）。代替简单地使用一个出口连接接口将数据帧的副本顺序地转发到每个目的地，子交换机可以使用多个连接接口来同时传送多播数据帧的副本。接收组播数据帧的端口可以借用分配给这些其他端口的连接接口（以及相关的硬件，如缓冲区），同时传输组播数据帧的副本。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式