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1. 发明授权

US4745448A Semiconductor devices having compensated buffer layers 失效
标题翻译：具有补偿缓冲层的半导体器件
公开(公告)号：US4745448A
公开(公告)日：1988-05-17
申请号：US813306
申请日：1985-12-24
申请人： H. Barteld Van Rees , Barry J. Liles
发明人： H. Barteld Van Rees , Barry J. Liles
IPC分类号： H01L29/10 , H01L29/207 , H01L29/80 , H01L29/167 , H01L29/227
CPC分类号： H01L29/1075 , H01L29/207
摘要： A field effect transistor includes a substrate of gallium arsenide having a resistivity of at least about 10.sup.7 ohm/cm and a first buffer layer of gallium arsenide disposed over the substrate having a deep level acceptor dopant incorporated into the buffer layer to compensate for donor dopants incorporated into the buffer layer. The concentration of the donor dopants and the acceptor dopant are controlled to provide the buffer layer with a predetermined resistivity characteristic of about 10.sup.7 -10.sup.8 ohm/cm. The concentration of the deep acceptor dopant is substantially constant at about 10.sup.16 acceptors/cc throughout the first buffer layer. The buffer layer preferably has a thickness of at least 2 microns and preferably between 5 and 30 microns. A second buffer layer is disposed over the first buffer layer having a monotonically declining concentration of chromium dopant from about 10.sup.16 to less than about 10.sup.14 acceptors/cc. An active layer and contact layer of suitably n-type doped gallium arsenide are consecutively disposed over at least portions of the second buffer layer.
摘要翻译：场效应晶体管包括具有至少约107欧姆/厘米电阻率的砷化镓衬底和布置在衬底上的第一缓冲层砷化镓，其具有并入缓冲层中的深层受主掺杂剂，以补偿掺入的施主掺杂剂进入缓冲层。控制施主掺杂剂和受主掺杂剂的浓度，以使缓冲层具有约107-108欧姆/厘米3的预定电阻率特性。深受体掺杂剂的浓度基本上恒定在整个第一缓冲层中约1016个受体/ cc。缓冲层优选具有至少2微米，优选5至30微米的厚度。第二缓冲层设置在第一缓冲层上，其具有从约1016到小于约1014个受体/ cc的单调下降的铬掺杂剂浓度。适当地n型掺杂砷化镓的有源层和接触层连续设置在第二缓冲层的至少部分上。

2. 发明申请

US20080239629A1 METHOD AND STRUCTURE FOR REDUCING CRACKS IN A DIELECTRIC LAYER IN CONTACT WITH METAL 有权
标题翻译：用于减少与金属接触的电介质层中的裂纹的方法和结构
公开(公告)号：US20080239629A1
公开(公告)日：2008-10-02
申请号：US11693365
申请日：2007-03-29
申请人： Barry J. Liles , Colin S. Whelan
发明人： Barry J. Liles , Colin S. Whelan
IPC分类号： H01L29/00 , H01G9/00 , H01L21/44
CPC分类号： H01L28/65 , H01L23/5223 , H01L28/75 , H01L2924/0002 , Y10S257/906 , H01L2924/00
摘要： A method and structure for reducing cracks in a dielectric in contact with a metal structure. The metal structure comprises a first metal layer; a second metal layer disposed on, and in contact with the first metal layer, the second metal layer being stiffer than the first metal layer; a third metal layer disposed on, and in contact with the second metal layer, the second metal layer being stiffer than the third metal layer. An additional metal is included wherein the dielectric layer is disposed between the metal structure and the additional metal.
摘要翻译：一种用于减少与金属结构接触的电介质中的裂纹的方法和结构。金属结构包括第一金属层; 设置在第一金属层上并与第一金属层接触的第二金属层，第二金属层比第一金属层更硬; 设置在第二金属层上并与第二金属层接触的第三金属层的第二金属层比第三金属层更硬。包括另外的金属，其中介电层设置在金属结构和附加金属之间。

3. 发明授权

US4688062A Semiconductor structure and method of manufacture 失效
标题翻译：半导体结构及制造方法
公开(公告)号：US4688062A
公开(公告)日：1987-08-18
申请号：US833677
申请日：1986-02-25
申请人： Barry J. Liles
发明人： Barry J. Liles
IPC分类号： H01L29/10 , H01L29/207 , H01L29/812 , H01L29/80 , H01L27/02 , H01L29/12 , H01L29/36
CPC分类号： H01L29/207 , H01L29/1075 , H01L29/812
摘要： A field effect transistor includes a semi-insulating substrate having a doped compensated buffer layer. Such compensated buffer layer is doped with a species which provides deep level acceptors to compensate for background donor doping of the buffer layer and to thus provide the semi-insulating buffer layer. The compensated buffer layer is used to isolate subsequent layers from crystal defects in the substrate. A thin shielding layer having a dopant concentration of 10.sup.14 -3.times.10.sup.15 atoms/cm.sup.3 and a dopant conductivity opposite to that of the dopant used to compensate the buffer layer is disposed over the buffer layer. An active layer is then disposed over the shielding layer and areas in the active layer are provided for source, drain, and gate electrodes. By providing the doped shielding layer, a small amount of conduction is provided in the shielding layer which prevents the build-up of charge in the buffer layer caused by ionization of the deep-level acceptor. The shielding layer also prevents the out-diffusion of the dopant species of the buffer layer into the active layer of the device.
摘要翻译：场效应晶体管包括具有掺杂补偿缓冲层的半绝缘衬底。这种补偿缓冲层掺杂有提供深电平受体以补偿缓冲层的背景施主掺杂并由此提供半绝缘缓冲层的物质。补偿缓冲层用于将后续层与衬底中的晶体缺陷隔离。具有掺杂剂浓度为1014-3×1015原子/ cm3的薄屏蔽层和与用于补偿缓冲层的掺杂剂相反的掺杂剂导电性设置在缓冲层上。然后将有源层设置在屏蔽层上方，并且为源极，漏极和栅电极提供有源层中的区域。通过提供掺杂的屏蔽层，在屏蔽层中提供少量的导电，防止由深层受体的电离引起的缓冲层中的电荷的积聚。屏蔽层还防止缓冲层的掺杂物种类向装置的有源层的扩散。

4. 发明授权

US5646450A Semiconductor structures and method of manufacturing 失效
标题翻译：半导体结构及制造方法
公开(公告)号：US5646450A
公开(公告)日：1997-07-08
申请号：US594511
申请日：1996-01-31
申请人： Barry J. Liles , Mark S. Durschlag , James G. Oakes
发明人： Barry J. Liles , Mark S. Durschlag , James G. Oakes
IPC分类号： H01L23/482 , H01L23/66 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/4821 , H01L23/66 , H01L2924/0002
摘要： A semiconductor structure is described having a first electrode and a second electrode disposed on a surface of the structure and a bridging conductor connected between the first electrode and the second electrode. The bridging conductor includes a plurality of layers of different metals wherein the plurality of layers of different metals includes a layer of refractory metal adjacent a layer of electrically conductive metal. In a preferred embodiment, the refractory metal is titanium and the electrically conductive metal is gold. With such an arrangement, a semiconductor structure is provided which is effective in preventing restructuring due to mechanical stresses induced in the metal by dissimilar thermal expansion coefficients when electrical pulsing cycles the temperature of the semiconductor structure.
摘要翻译：描述了半导体结构，其具有设置在该结构的表面上的第一电极和第二电极以及连接在第一电极和第二电极之间的桥接导体。桥接导体包括多个不同金属的层，其中不同金属的多个层包括与导电金属层相邻的难熔金属层。在优选的实施方案中，难熔金属是钛，导电金属是金。通过这样的布置，提供半导体结构，其有效地防止了当电脉冲循环半导体结构的温度时，通过不同的热膨胀系数在金属中引起的机械应力来防止重构。

5. 发明授权

US07863665B2 Method and structure for reducing cracks in a dielectric layer in contact with metal 有权
标题翻译：用于减少与金属接触的电介质层中的裂纹的方法和结构
公开(公告)号：US07863665B2
公开(公告)日：2011-01-04
申请号：US11693365
申请日：2007-03-29
申请人： Barry J. Liles , Colin S. Whelan
发明人： Barry J. Liles , Colin S. Whelan
IPC分类号： H01L27/108 , H01L29/94
CPC分类号： H01L28/65 , H01L23/5223 , H01L28/75 , H01L2924/0002 , Y10S257/906 , H01L2924/00
摘要： A method and structure for reducing cracks in a dielectric in contact with a metal structure. The metal structure comprises a first metal layer; a second metal layer disposed on, and in contact with the first metal layer, the second metal layer being stiffer than the first metal layer; a third metal layer disposed on, and in contact with the second metal layer, the second metal layer being stiffer than the third metal layer. An additional metal is included wherein the dielectric layer is disposed between the metal structure and the additional metal.
摘要翻译：一种用于减少与金属结构接触的电介质中的裂纹的方法和结构。金属结构包括第一金属层; 设置在第一金属层上并与第一金属层接触的第二金属层，第二金属层比第一金属层更硬; 设置在第二金属层上并与第二金属层接触的第三金属层的第二金属层比第三金属层更硬。包括另外的金属，其中介电层设置在金属结构和附加金属之间。

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