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1. 发明授权

US08431981B2 Semiconductor memory device having vertical transistor and buried bit line and method for fabricating the same 有权
标题翻译：具有垂直晶体管和埋入位线的半导体存储器件及其制造方法
公开(公告)号：US08431981B2
公开(公告)日：2013-04-30
申请号：US13077116
申请日：2011-03-31
申请人： Baek Mann Kim , Jun Ki Kim , Yong Seok Eun , Kyong Bong Rouh
发明人： Baek Mann Kim , Jun Ki Kim , Yong Seok Eun , Kyong Bong Rouh
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/10876 , H01L21/2257 , H01L27/10888 , H01L29/456 , H01L29/66666 , H01L29/7827
摘要： A semiconductor memory device includes an active region protruding upward from a substrate, wherein the active region is arranged next to a trench on the substrate, a first impurity region formed at an upper portion of the active region, a second impurity region formed at a lower portion of the active region, a gate dielectric layer formed along a side of the active region between the first impurity region and the second impurity region, a gate electrode layer formed on the gate dielectric layer, a buried bit line formed at a lower portion of the trench, and a polysilicon layer formed over the buried bit line, wherein the polysilicon layer electrically connects the buried bit line with the second impurity region.
摘要翻译：半导体存储器件包括从衬底向上突出的有源区，其中有源区布置在衬底上的沟槽旁边，形成在有源区的上部的第一杂质区，形成在下部的第二杂质区有源区的一部分，沿着第一杂质区和第二杂质区之间的有源区的一侧形成的栅介质层，形成在栅介质层上的栅电极层，形成在栅电介质层的下部的掩埋位线所述沟槽和形成在所述掩埋位线上的多晶硅层，其中所述多晶硅层将所述掩埋位线与所述第二杂质区电连接。

2. 发明授权

US08426269B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08426269B2
公开(公告)日：2013-04-23
申请号：US13289096
申请日：2011-11-04
申请人： Baek-Mann Kim
发明人： Baek-Mann Kim
IPC分类号： H01L21/8242
CPC分类号： H01L21/28525 , H01L21/76877 , H01L27/10855 , H01L27/10876 , H01L27/10888 , H01L29/66621
摘要： A method for fabricating a semiconductor device includes forming junction area for a bit line contact (BLC) and a junction area for a storage node contact (SNC) by performing ion implantation in a substrate having a buried gate; forming a first insulation pattern having an opening to expose the junction areas; forming a buffer layer to fill the openings; forming a second insulation pattern over the first insulation pattern after filling the openings, wherein the second insulation pattern has openings to expose the buffer layer in an area of the buffer layer that lies over the junction area for the SNC; and forming an SNC to fill the opening of the second insulation patterns.
摘要翻译：一种制造半导体器件的方法包括通过在具有掩埋栅极的衬底中进行离子注入形成用于位线接触（BLC）的接合区域和用于存储节点接触（SNC）的接合区域; 形成具有开口以暴露接合区域的第一绝缘图案; 形成缓冲层以填充开口; 在填充所述开口之后，在所述第一绝缘图案上形成第二绝缘图案，其中所述第二绝缘图案具有用于在所述缓冲层的位于所述SNC的接合区域之上的区域中暴露所述缓冲层的开口; 并形成SNC以填充第二绝缘图案的开口。

3. 发明授权

US08159069B2 Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same 失效
标题翻译：由于金属扩散而不生产高电阻化合物的半导体器件的金属线及其形成方法
公开(公告)号：US08159069B2
公开(公告)日：2012-04-17
申请号：US12940521
申请日：2010-11-05
申请人： Baek Mann Kim , Seung Jin Yeom , Dong Ha Jung , Jeong Tae Kim
发明人： Baek Mann Kim , Seung Jin Yeom , Dong Ha Jung , Jeong Tae Kim
IPC分类号： H01L23/48
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76856
摘要： A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNx layer, a W—N—B ternary layer, and a Ti—N—B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.
摘要翻译：金属线包括形成在半导体衬底上的下金属线。在具有下金属线的半导体衬底上形成绝缘层，并且在绝缘层中限定暴露下金属线的至少一部分的金属线形成区域。在绝缘层的金属线形成区域的表面上形成扩散阻挡层，其包括WNx层，W-N-B三元层和Ti-N-B三元层。在扩散阻挡层上形成润湿层，由Ti层或TiN层之一构成。在润湿层上形成上金属线以填充绝缘层的金属线形成区域。

4. 发明授权

US08053895B2 Metal line of semiconductor device having a multilayer molybdenum diffusion barrier and method for forming the same 失效
标题翻译：具有多层钼扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US08053895B2
公开(公告)日：2011-11-08
申请号：US12486454
申请日：2009-06-17
申请人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Nam Yeal Lee
发明人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Nam Yeal Lee
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76856 , H01L21/76846 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer has a metal line forming region. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer. The diffusion barrier includes a multi-layered structure that includes an MoB2 layer, an MoxByNz layer and an Mo layer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
摘要翻译：半导体器件的金属线包括形成在半导体衬底上的绝缘层。绝缘层具有金属线形成区域。在绝缘层的金属线形成区域的表面上形成扩散阻挡层。扩散阻挡层包括包含MoB 2层，MoxByNz层和Mo层的多层结构。在扩散阻挡层上形成金属层以填充绝缘层的金属线形成区域。

5. 发明申请

US20110233781A1 METAL LINE OF SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER WITH AN AMORPHOUS TaBN LAYER AND METHOD FOR FORMING THE SAME 有权
标题翻译：具有无定形TaBN层的扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US20110233781A1
公开(公告)日：2011-09-29
申请号：US13152665
申请日：2011-06-03
申请人： Dong Ha JUNG , Seung Jin YEOM , Baek Mann KIM , Young Jin LEE , Jeong Tae KIM
发明人： Dong Ha JUNG , Seung Jin YEOM , Baek Mann KIM , Young Jin LEE , Jeong Tae KIM
IPC分类号： H01L23/48
CPC分类号： H01L23/53238 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.
摘要翻译：半导体器件中的金属线包括形成在半导体衬底上的绝缘层。在绝缘层中形成金属线形成区域。形成金属线以填充绝缘层的金属线形成区域。并且在金属线和绝缘层之间形成包括非晶态TaBN层的扩散阻挡层。无定形TaBN层防止铜成分扩散到半导体衬底中，从而改善器件的特性和可靠性。

6. 发明授权

US07977793B2 Metal line of semiconductor device having a diffusion barrier with an amorphous TaBN layer and method for forming the same 有权
标题翻译：具有无定形TaBN层的扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US07977793B2
公开(公告)日：2011-07-12
申请号：US11939666
申请日：2007-11-14
申请人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
发明人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53238 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.
摘要翻译：半导体器件中的金属线包括形成在半导体衬底上的绝缘层。在绝缘层中形成金属线形成区域。形成金属线以填充绝缘层的金属线形成区域。并且在金属线和绝缘层之间形成包括非晶态TaBN层的扩散阻挡层。无定形TaBN层防止铜成分扩散到半导体衬底中，从而改善器件的特性和可靠性。

7. 发明申请

US20110053370A1 METAL LINE OF SEMICONDUCTOR DEVICE WITHOUT PRODUCTION OF HIGH RESISTANCE COMPOUND DUE TO METAL DIFFUSION AND METHOD FOR FORMING THE SAME 失效
标题翻译：金属扩散不产生高电阻化合物的半导体器件的金属线及其形成方法
公开(公告)号：US20110053370A1
公开(公告)日：2011-03-03
申请号：US12940521
申请日：2010-11-05
申请人： Baek Mann KIM , Seung Jin YEOM , Dong Ha JUNG , Jeong Tae KIM
发明人： Baek Mann KIM , Seung Jin YEOM , Dong Ha JUNG , Jeong Tae KIM
IPC分类号： H01L21/283
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76856
摘要： A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNx layer, a W-N-B ternary layer, and a Ti-N-B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.
摘要翻译：金属线包括形成在半导体衬底上的下金属线。在具有下金属线的半导体衬底上形成绝缘层，并且在绝缘层中限定暴露下金属线的至少一部分的金属线形成区域。在绝缘层的金属线形成区域的表面上形成扩散阻挡层，其包括WNx层，W-N-B三元层和Ti-N-B三元层。在扩散阻挡层上形成润湿层，由Ti层或TiN层之一构成。在润湿层上形成上金属线以填充绝缘层的金属线形成区域。

8. 发明授权

US07875979B2 Metal line of semiconductor device having a diffusion barrier including CRxBy and method for forming the same 失效
标题翻译：具有包含CRxBy的扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US07875979B2
公开(公告)日：2011-01-25
申请号：US12619147
申请日：2009-11-16
申请人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
发明人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
IPC分类号： H01L29/40
CPC分类号： H01L21/76843 , H01L21/28556 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrxBy layer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrxBy layer.
摘要翻译：描述了具有包括CrxBy的扩散阻挡层的半导体器件的金属线及其形成方法。半导体器件的金属线包括形成在半导体衬底上的绝缘层。绝缘层形成有金属线形成区域。随后在金属线形成区域和绝缘层的表面上形成包括Cr x B y层的扩散阻挡层。最后形成金属线以填充包含CrxBy层的扩散阻挡层上的绝缘层的金属线形成区域。

9. 发明申请

US20100059890A1 METAL LINE OF SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER INCLUDING CRxBy AND METHOD FOR FORMING THE SAME 失效
标题翻译：具有包含CRxBy的扩张障碍物的半导体器件的金属线及其形成方法
公开(公告)号：US20100059890A1
公开(公告)日：2010-03-11
申请号：US12619147
申请日：2009-11-16
申请人： Dong Ha JUNG , Seung Jin YEOM , Baek Mann KIM , Young Jin LEE , Jeong Tae KIM
发明人： Dong Ha JUNG , Seung Jin YEOM , Baek Mann KIM , Young Jin LEE , Jeong Tae KIM
IPC分类号： H01L23/48
CPC分类号： H01L21/76843 , H01L21/28556 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrxBy layer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrxBy layer.
摘要翻译：描述了具有包括CrxBy的扩散阻挡层的半导体器件的金属线及其形成方法。半导体器件的金属线包括形成在半导体衬底上的绝缘层。绝缘层形成有金属线形成区域。随后在金属线形成区域和绝缘层的表面上形成包括Cr x B y层的扩散阻挡层。最后形成金属线以填充包含CrxBy层的扩散阻挡层上的绝缘层的金属线形成区域。

10. 发明申请

US20100052169A1 METAL LINE OF SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER AND METHOD FOR FORMING THE SAME 失效
标题翻译：具有扩散障碍物的半导体器件的金属线及其形成方法
公开(公告)号：US20100052169A1
公开(公告)日：2010-03-04
申请号：US12486124
申请日：2009-06-17
申请人： Nam Yeal LEE , Seung Jin YEOM , Baek Mann KIM , Dong Ha JUNG , Joon Seok OH
发明人： Nam Yeal LEE , Seung Jin YEOM , Baek Mann KIM , Dong Ha JUNG , Joon Seok OH
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L21/76846 , H01L21/76855 , H01L21/76856 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An insulation layer is formed on a semiconductor substrate so as to define a metal line forming region. A diffusion barrier having a multi-layered structure of an Mox1Si1-x1 layer, an Mox2Siy2Nz2 layer, and an Moy3N1-y3 layer is formed on a surface of the metal line forming region. A metal layer is formed on the diffusion barrier so as to fill the metal line forming region of the insulation layer.
摘要翻译：在半导体基板上形成绝缘层，以限定金属线形成区域。在金属线形成区域的表面上形成具有Mox1Si1-x1层，Mox2Siy2Nz2层和Moy3N1-y3层的多层结构的扩散阻挡层。在扩散阻挡层上形成金属层，以填充绝缘层的金属线形成区域。

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