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1. 发明申请

US20120232988A1 METHOD AND SYSTEM FOR GENERATING DYNAMIC ADS WITHIN A VIDEO GAME OF A PORTABLE COMPUTING DEVICE 审中-公开
标题翻译：在便携式计算设备的视频游戏中产生动态ADS的方法和系统
公开(公告)号：US20120232988A1
公开(公告)日：2012-09-13
申请号：US13181389
申请日：2011-07-12
申请人： Ruiduo Yang , Mark H. Feldman , Donald W. Gillies , Rajat Gupta , Aleksandra L. Krstic , Kun Zhang , Anubha Jayaswal , Peter Andic
发明人： Ruiduo Yang , Mark H. Feldman , Donald W. Gillies , Rajat Gupta , Aleksandra L. Krstic , Kun Zhang , Anubha Jayaswal , Peter Andic
IPC分类号： G06Q30/00
CPC分类号： G06Q30/0241 , G06Q30/02 , H04N13/366
摘要： A method and system for generating and tracking dynamic advertisements within a program, such as a video game, running on a portable computing device (PCD) are described. The method and system include receiving a call from the program for a texture and reviewing an identifier associated with the texture. A graphics driver determines if the identifier associated with the texture matches an identifier in a texture database. The graphics driver then selects a dynamic advertisement from a texture database if the identifier associated with the texture matches the identifier in the texture database. The graphics driver issues commands to the graphics processor so that dynamic advertisement is presented on a screen display. The graphics driver then determines if a video object produced by the program blocks a portion of the dynamic advertisement present on the screen display.
摘要翻译：描述了在便携式计算设备（PCD）上运行的诸如视频游戏的程序内生成和跟踪动态广告的方法和系统。该方法和系统包括从程序接收关于纹理的调用并且查看与纹理相关联的标识符。图形驱动程序确定与纹理相关联的标识符是否与纹理数据库中的标识符匹配。然后，如果与纹理相关联的标识符与纹理数据库中的标识符匹配，则图形驱动程序从纹理数据库中选择动态广告。图形驱动程序向图形处理器发出命令，使得在屏幕显示上呈现动态广告。然后，图形驱动程序确定由程序产生的视频对象是否阻挡存在于屏幕显示上的动态广告的一部分。

2. 发明授权

US09804995B2 Computational resource pipelining in general purpose graphics processing unit 有权
公开(公告)号：US09804995B2
公开(公告)日：2017-10-31
申请号：US13007333
申请日：2011-01-14
申请人： Alexei V. Bourd , Andrew Gruber , Aleksandra L. Krstic , Robert J. Simpson , Colin Sharp , Chun Yu
发明人： Alexei V. Bourd , Andrew Gruber , Aleksandra L. Krstic , Robert J. Simpson , Colin Sharp , Chun Yu
IPC分类号： G06F15/00 , G06F15/76 , G06F15/173
CPC分类号： G06F15/17325
摘要： This disclosure describes techniques for extending the architecture of a general purpose graphics processing unit (GPGPU) with parallel processing units to allow efficient processing of pipeline-based applications. The techniques include configuring local memory buffers connected to parallel processing units operating as stages of a processing pipeline to hold data for transfer between the parallel processing units. The local memory buffers allow on-chip, low-power, direct data transfer between the parallel processing units. The local memory buffers may include hardware-based data flow control mechanisms to enable transfer of data between the parallel processing units. In this way, data may be passed directly from one parallel processing unit to the next parallel processing unit in the processing pipeline via the local memory buffers, in effect transforming the parallel processing units into a series of pipeline stages.

3. 发明申请

US20120185671A1 COMPUTATIONAL RESOURCE PIPELINING IN GENERAL PURPOSE GRAPHICS PROCESSING UNIT 有权
标题翻译：一般用途图形处理单元的计算资源管理
公开(公告)号：US20120185671A1
公开(公告)日：2012-07-19
申请号：US13007333
申请日：2011-01-14
申请人： Alexei V. Bourd , Andrew Gruber , Aleksandra L. Krstic , Robert J. Simpson , Colin Sharp , Chun Yu
发明人： Alexei V. Bourd , Andrew Gruber , Aleksandra L. Krstic , Robert J. Simpson , Colin Sharp , Chun Yu
IPC分类号： G06F9/38
CPC分类号： G06F15/17325
摘要： This disclosure describes techniques for extending the architecture of a general purpose graphics processing unit (GPGPU) with parallel processing units to allow efficient processing of pipeline-based applications. The techniques include configuring local memory buffers connected to parallel processing units operating as stages of a processing pipeline to hold data for transfer between the parallel processing units. The local memory buffers allow on-chip, low-power, direct data transfer between the parallel processing units. The local memory buffers may include hardware-based data flow control mechanisms to enable transfer of data between the parallel processing units. In this way, data may be passed directly from one parallel processing unit to the next parallel processing unit in the processing pipeline via the local memory buffers, in effect transforming the parallel processing units into a series of pipeline stages.
摘要翻译：本公开描述了用于利用并行处理单元来扩展通用图形处理单元（GPGPU）的架构以允许基于流水线的应用的有效处理的技术。这些技术包括配置连接到作为处理流水线的阶段的并行处理单元的本地存储器缓冲器，以保持用于在并行处理单元之间传送的数据。本地存储缓冲器允许并行处理单元之间的片上，低功耗，直接数据传输。本地存储器缓冲器可以包括基于硬件的数据流控制机制，以使得能够在并行处理单元之间传送数据。以这种方式，数据可以经由本地存储器缓冲器直接从一个并行处理单元传递到处理流水线中的下一个并行处理单元，实际上将并行处理单元转换成一系列流水线级。

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