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1. 发明授权

US08643254B2 Piezoelectric device with a package including a convex part 失效
标题翻译：具有包括凸部的封装的压电器件
公开(公告)号：US08643254B2
公开(公告)日：2014-02-04
申请号：US12958642
申请日：2010-12-02
申请人： Katsuo Ishikawa , Akitoshi Hara
发明人： Katsuo Ishikawa , Akitoshi Hara
IPC分类号： H03H9/215 , H03H9/19 , H03H9/10
CPC分类号： H03H9/1035 , G01C19/5607 , H01L41/053 , H01L41/107 , H03B5/32 , H03H9/1021 , H03H9/19 , H03H9/21
摘要： A piezoelectric device includes: a piezoelectric vibrating reed; and a package, wherein the piezoelectric vibrating reed has a vibrating part and first and second supporting arms extending from a base end part, the package has a base, a lid, a cavity defined by the base and the lid, a convex part projecting from the base or the lid into the cavity, a length of the first supporting arm is shorter than a length of the second supporting arm, and the convex part is provided in a range ahead of a leading end of the first vibrating arm in an extension direction of the first supporting arm and at least partially overlapping with the second supporting arm in a length direction of the piezoelectric vibrating reed so as not to overlap with the piezoelectric vibrating reed in a plan view.
摘要翻译：压电装置包括：压电振动片; 以及包装体，其中，所述压电振动片具有振动部，从所述基端部延伸的所述第一支撑臂和所述第二支撑臂，所述封装具有基部，盖，由所述基部和所述盖限定的空腔，所述基座或所述盖进入所述空腔，所述第一支撑臂的长度比所述第二支撑臂的长度短，并且所述凸部设置在所述第一振动臂的前端的延伸方向前方的范围内并且在压电振动片的长度方向上至少部分地与第二支撑臂重叠，以便在俯视图中不与压电振动片重叠。

2. 发明授权

US08248813B2 Electronic device, electronic module, and methods for manufacturing the same 有权
标题翻译：电子装置，电子模块及其制造方法
公开(公告)号：US08248813B2
公开(公告)日：2012-08-21
申请号：US13051279
申请日：2011-03-18
申请人： Atsushi Ono , Yoshihiro Kobayashi , Shojiro Kitamura , Masayuki Matsunaga , Akitoshi Hara
发明人： Atsushi Ono , Yoshihiro Kobayashi , Shojiro Kitamura , Masayuki Matsunaga , Akitoshi Hara
IPC分类号： H05K1/18
CPC分类号： B81B7/007 , B81B7/0074 , B81B2201/025 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2924/15156 , H01L2924/15313 , H01L2924/16195 , Y10T29/49155 , H01L2924/00014
摘要： An electronic device includes: an outline configuration including a first surface, a second surface facing opposite from the first surface, and a mounting surface coupled to the first and second surfaces; a first substrate including a first electrode; a second substrate including a second electrode; a resin disposed between the first and second substrates; and an electric element sealed with the resin and having an outline configuration of a polyhedron, the electric element being disposed such that a broadest surface of the polyhedron faces one of the first substrate and the second substrate. The first surface is one surface of the first substrate, the one surface being opposite from another surface of the first substrate on a side adjacent to the resin. The second surface is one surface of the second substrate, the one surface being opposite from another surface of the second substrate on a side adjacent to the resin. The mounting surface includes: an exposed surface of the resin between the first and second substrates, and side surfaces of the first and second substrates adjacent to the exposed surface. The first electrode is disposed at an end of the first surface adjacent to the mounting surface and electrically coupled to the electric element. The second electrode is disposed at an end of the second surface adjacent to the mounting surface.
摘要翻译：电子设备包括：轮廓配置，其包括第一表面，与第一表面相对的第二表面和联接到第一和第二表面的安装表面; 第一基板，包括第一电极; 第二基板，包括第二电极; 设置在所述第一和第二基板之间的树脂; 以及用所述树脂密封并具有多面体轮廓构造的电气元件，所述电气元件设置成使得所述多面体的最宽表面面向所述第一基板和所述第二基板之一。所述第一表面是所述第一基板的一个表面，所述一个表面在与所述树脂相邻的一侧与所述第一基板的另一个表面相对。所述第二表面是所述第二基板的一个表面，所述一个表面在与所述树脂相邻的一侧与所述第二基板的另一表面相对。安装表面包括：树脂在第一和第二基板之间的暴露表面以及与暴露表面相邻的第一和第二基板的侧表面。第一电极设置在与安装表面相邻的第一表面的端部处并且电耦合到电气元件。第二电极设置在邻近安装表面的第二表面的端部。

3. 发明授权

US07859172B2 Piezoelectric resonator, manufacturing method thereof and lid for piezoelectric resonator 失效
标题翻译：压电谐振器及其压电谐振器的制造方法和盖子
公开(公告)号：US07859172B2
公开(公告)日：2010-12-28
申请号：US12141187
申请日：2008-06-18
申请人： Katsuo Ishikawa , Akitoshi Hara , Yukihiro Tonegawa
发明人： Katsuo Ishikawa , Akitoshi Hara , Yukihiro Tonegawa
IPC分类号： H01L41/08 , H01L41/053
CPC分类号： H03H9/21 , H03H9/1021 , H03H9/215 , Y10T29/42
摘要： A piezoelectric resonator includes a piezoelectric resonator element having a resonating arm and a metal film that is formed on the resonating arm; a package including a bottom part on which the piezoelectric resonator element is fixed and a frame wall that surrounds the bottom part, and having an opening above the bottom part; and a lid including a frame in which a through hole is provided and an optically transparent part that has an upper face and a lower face of the frame and is disposed at the through hole, the through hole penetrating a front face and a back face, the lower face of the optically transparent part being disposed so as to oppose the metal film, and the lid closing the opening of the package such that the lid overlaps with the bottom part and the frame wall, the through hole having a curved inner wall face whose curved face is coupled with at least one of the front face and the back face at least one opening edge of the front face and the back face and a vertical inner wall face that is provided vertical to the front face and the back face and in a part of a thickness direction of the frame, and the optically transparent part being provided so as to contact closely with at least a part of the vertical inner wall face and at least a part of the curved inner wall face.
摘要翻译：压电谐振器包括具有谐振臂和形成在谐振臂上的金属膜的压电谐振元件; 包括固定有压电谐振元件的底部和围绕底部的框架壁，并且在底部上方具有开口的封装; 以及盖，其包括设置有通孔的框架和具有框架的上表面和下表面并设置在通孔的光学透明部分，所述通孔穿透前表面和后表面，光学透明部分的下表面被设置为与金属膜相对，并且盖关闭包装的开口，使得盖子与底部部分和框架壁重叠，该通孔具有弯曲的内壁面其曲面与前表面和后表面中的至少一个前表面和后表面的至少一个开口边缘和垂直于前表面和后表面设置的垂直内壁面相连接，框架的厚度方向的一部分，并且光学透明部分设置成与垂直内壁面的至少一部分和弯曲的内壁面的至少一部分紧密接触。

4. 发明申请

US20090095510A1 ELECTRONIC DEVICE, ELECTRONIC MODULE, AND METHODS FOR MANUFACTURING THE SAME 有权
标题翻译：电子设备，电子模块及其制造方法
公开(公告)号：US20090095510A1
公开(公告)日：2009-04-16
申请号：US12248395
申请日：2008-10-09
申请人： Atsushi ONO , Yoshihiro KOBAYASHI , Shojiro KITAMURA , Masayuki MATSUNAGA , Akitoshi HARA
发明人： Atsushi ONO , Yoshihiro KOBAYASHI , Shojiro KITAMURA , Masayuki MATSUNAGA , Akitoshi HARA
IPC分类号： H05K1/00 , H05K3/10
CPC分类号： B81B7/007 , B81B7/0074 , B81B2201/025 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2924/15156 , H01L2924/15313 , H01L2924/16195 , Y10T29/49155 , H01L2924/00014
摘要： An electronic device includes: an outline configuration including a first surface, a second surface facing opposite from the first surface, and a mounting surface coupled to the first and second surfaces; a first substrate including a first electrode; a second substrate including a second electrode; a resin disposed between the first and second substrates; and an electric element sealed with the resin and having an outline configuration of a polyhedron, the electric element being disposed such that a broadest surface of the polyhedron faces one of the first substrate and the second substrate. The first surface is one surface of the first substrate, the one surface being opposite from another surface of the first substrate on a side adjacent to the resin. The second surface is one surface of the second substrate, the one surface being opposite from another surface of the second substrate on a side adjacent to the resin. The mounting surface includes: an exposed surface of the resin between the first and second substrates, and side surfaces of the first and second substrates adjacent to the exposed surface. The first electrode is disposed at an end of the first surface adjacent to the mounting surface and electrically coupled to the electric element. The second electrode is disposed at an end of the second surface adjacent to the mounting surface and electrically coupled to the electric element.
摘要翻译：电子设备包括：轮廓配置，其包括第一表面，与第一表面相对的第二表面和联接到第一和第二表面的安装表面; 第一基板，包括第一电极; 第二基板，包括第二电极; 设置在所述第一和第二基板之间的树脂; 以及用所述树脂密封并具有多面体轮廓构造的电气元件，所述电气元件设置成使得所述多面体的最宽表面面向所述第一基板和所述第二基板之一。所述第一表面是所述第一基板的一个表面，所述一个表面在与所述树脂相邻的一侧与所述第一基板的另一个表面相对。所述第二表面是所述第二基板的一个表面，所述一个表面在与所述树脂相邻的一侧与所述第二基板的另一表面相对。安装表面包括：树脂在第一和第二基板之间的暴露表面以及与暴露表面相邻的第一和第二基板的侧表面。第一电极设置在与安装表面相邻的第一表面的端部处并且电耦合到电气元件。第二电极设置在与安装表面相邻的第二表面的端部处并且电耦合到电气元件。

5. 外观设计

USD580592S1 Piezoelectric device 有权
公开(公告)号：USD580592S1
公开(公告)日：2008-11-11
申请号：US29292405
申请日：2007-10-11
申请人： Akitoshi Hara , Katsuo Ishikawa , Yukihiro Tonegawa
设计人： Akitoshi Hara , Katsuo Ishikawa , Yukihiro Tonegawa

6. 发明授权

US5077237A Method of encapsulating a semiconductor element using a resin mold having upper and lower mold half resin inflow openings 失效
标题翻译：使用具有上模和下模具半透明树脂流动开口的树脂模具封装半导体元件的方法
公开(公告)号：US5077237A
公开(公告)日：1991-12-31
申请号：US583813
申请日：1990-09-17
申请人： Akitoshi Hara
发明人： Akitoshi Hara
IPC分类号： B29C45/14 , H01L21/56
CPC分类号： H01L21/565 , B29C45/14655 , B29C2045/14942 , H01L2224/45144 , H01L2224/48091 , H01L2924/01079 , H01L2924/01322
摘要： A semiconductor sealing mold for sealing a semiconductor element within a thermosetting resin is provided with resin inflow openings formed in oppositely and substantially symmetrically opposed relation to the active surface and back surface of a lead frame connected semiconductor element. As a result, the application of the molding process and method of encapsulation of the semiconductor element can be accomplished under conditions of uniformly applied pressure to opposite surfaces of the semiconductor element and extending outwardly in all radial directions from the center of the semiconductor element. Furthermore, since the bonding wires and lead frame leads are substantially aligned in the same radial directions from the center of the semiconductor element, damage does not occur to these wires or leads during the molding process.
摘要翻译：用于密封热固性树脂内的半导体元件的半导体密封模具设置有与引线框连接的半导体元件的有源表面和背表面相对且基本上对称相对的树脂流入开口。结果，可以在对半导体元件的相对表面施加均匀的压力并从半导体元件的中心沿所有径向方向向外延伸的条件下实现模制过程的应用和封装半导体元件的方法。此外，由于接合线和引线框架引线从半导体元件的中心大致对准在相同的径向方向上，因此在成型过程中这些线或引线不会发生损坏。

7. 发明申请

US20110162452A1 ELECTRONIC DEVICE, ELECTRONIC MODULE, AND METHODS FOR MANUFACTURING THE SAME 有权
标题翻译：电子设备，电子模块及其制造方法
公开(公告)号：US20110162452A1
公开(公告)日：2011-07-07
申请号：US13051279
申请日：2011-03-18
申请人： Atsushi ONO , Yoshihiro KOBAYASHI , Shojiro KITAMURA , Masayuki MATSUNAGA , Akitoshi HARA
发明人： Atsushi ONO , Yoshihiro KOBAYASHI , Shojiro KITAMURA , Masayuki MATSUNAGA , Akitoshi HARA
IPC分类号： H05K1/00 , G01P15/02
CPC分类号： B81B7/007 , B81B7/0074 , B81B2201/025 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2924/15156 , H01L2924/15313 , H01L2924/16195 , Y10T29/49155 , H01L2924/00014
摘要： An electronic device includes: an outline configuration including a first surface, a second surface facing opposite from the first surface, and a mounting surface coupled to the first and second surfaces; a first substrate including a first electrode; a second substrate including a second electrode; a resin disposed between the first and second substrates; and an electric element sealed with the resin and having an outline configuration of a polyhedron, the electric element being disposed such that a broadest surface of the polyhedron faces one of the first substrate and the second substrate. The first surface is one surface of the first substrate, the one surface being opposite from another surface of the first substrate on a side adjacent to the resin. The second surface is one surface of the second substrate, the one surface being opposite from another surface of the second substrate on a side adjacent to the resin. The mounting surface includes: an exposed surface of the resin between the first and second substrates, and side surfaces of the first and second substrates adjacent to the exposed surface. The first electrode is disposed at an end of the first surface adjacent to the mounting surface and electrically coupled to the electric element. The second electrode is disposed at an end of the second surface adjacent to the mounting surface.
摘要翻译：电子设备包括：轮廓配置，其包括第一表面，与第一表面相对的第二表面和联接到第一和第二表面的安装表面; 第一基板，包括第一电极; 第二基板，包括第二电极; 设置在所述第一和第二基板之间的树脂; 以及用所述树脂密封并具有多面体轮廓构造的电气元件，所述电气元件设置成使得所述多面体的最宽表面面向所述第一基板和所述第二基板之一。所述第一表面是所述第一基板的一个表面，所述一个表面在与所述树脂相邻的一侧与所述第一基板的另一个表面相对。所述第二表面是所述第二基板的一个表面，所述一个表面在与所述树脂相邻的一侧与所述第二基板的另一表面相对。安装表面包括：树脂在第一和第二基板之间的暴露表面以及与暴露表面相邻的第一和第二基板的侧表面。第一电极设置在与安装表面相邻的第一表面的端部处并且电耦合到电气元件。第二电极设置在邻近安装表面的第二表面的端部。

8. 发明授权

US07714484B2 Piezoelectric resonator and manufacturing method therefor 失效
标题翻译：压电谐振器及其制造方法
公开(公告)号：US07714484B2
公开(公告)日：2010-05-11
申请号：US12143966
申请日：2008-06-23
申请人： Akitoshi Hara , Katsuo Ishikawa , Yukihiro Tonegawa
发明人： Akitoshi Hara , Katsuo Ishikawa , Yukihiro Tonegawa
IPC分类号： H01L41/08
CPC分类号： H03H9/21 , H03H9/0595 , H03H9/1021 , Y10T29/42
摘要： A piezoelectric resonator includes a piezoelectric resonator element having a base portion and a resonating arm extending from the base portion, a package including a bottom to which the piezoelectric resonator element is fixed and a frame wall that surrounds the bottom and having an opening above the bottom, and a lid for closing the opening of the package. In this piezoelectric resonator, the lid includes a main body having a through-hole formed therein, a flange formed to surround a periphery of the main body and to be thinner than the main body, and an optically transparent member located in the through-hole. The flange has a joining portion with an upper end surface of the frame wall, and the main body projects in a direction from the flange to the bottom in a thickness direction. Also, the through-hole is at a position displaced in a first direction approaching a first end of the main body from a center of the main body. Also, the flange is joined with the frame wall such that a clearance between the first end and the joining portion of the flange nearest to the first end is larger than a clearance between a second end in a second direction opposite to the first direction of the main body and the joining portion of the flange nearest to the second end.
摘要翻译：压电谐振器包括压电谐振元件，其具有基部和从基部延伸的谐振臂，包括固定有压电谐振元件的底部的封装和围绕底部并且在底部上方具有开口的框架壁，以及用于封闭包装的开口的盖子。在该压电谐振器中，盖包括：主体，其中形成有通孔，形成为围绕主体的周边并且比主体更薄的凸缘，以及位于通孔中的光学透明构件。凸缘具有与框架壁的上端表面相连的接合部分，并且主体在厚度方向上从法兰到底部的方向突出。此外，通孔位于从主体的中心接近主体的第一端的第一方向位移。此外，凸缘与框架壁接合，使得最靠近第一端的凸缘的第一端和接合部之间的间隙大于在与第一端相反的第二方向上的第二端之间的间隙主体和最接近第二端的凸缘的接合部分。

9. 发明授权

US06900076B2 Methods for manufacturing semiconductor chips, methods for manufacturing semiconductor devices, semiconductor chips, semiconductor devices, connection substrates and electronic devices 有权
标题翻译：半导体芯片的制造方法，半导体装置的制造方法，半导体芯片，半导体装置，连接基板以及电子装置
公开(公告)号：US06900076B2
公开(公告)日：2005-05-31
申请号：US09776528
申请日：2001-02-04
申请人： Tadashi Komiyama , Akitoshi Hara , Eiichi Sato
发明人： Tadashi Komiyama , Akitoshi Hara , Eiichi Sato
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/60 , H01L21/768 , H01L23/48 , H01L25/065 , H01L25/07 , H01L25/18 , H01L21/48
CPC分类号： H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/10158 , H01L2924/00
摘要： Certain embodiments of the present invention relate to a method for manufacturing a semiconductor chip, a method for manufacturing a semiconductor device, a semiconductor chip, a semiconductor device, a connection substrate and an electronic apparatus, in which semiconductor chips stacked in layers are electrically connected to one another without using wires. In one embodiment, after an electrode 18 is formed on a surface 16 of a first semiconductor chip 12, a hole 26 is formed from an opposite surface 24 thereof until a tungsten layer 20 of the electrode 18 is exposed. A protrusion 30 is formed by etching on a surface 31 of a second semiconductor chip 14 and thereafter an abutting electrode 32 is formed on an apex section of the protrusion 30. The first semiconductor chip 12 and the second semiconductor chip 14 are stacked on top of the other such that the abutting electrode 32 contacts the electrode 18. As a result, the path between the electrodes becomes shorter and therefore signal delays are inhibited or prevented. Also, there are no restrictions on the area of semiconductor chips to be stacked. As a result, semiconductor chips having the same area can be stacked in layers, and thus the size of the semiconductor device 10 can be reduced.
摘要翻译：本发明的某些实施例涉及半导体芯片的制造方法，制造半导体器件的方法，半导体芯片，半导体器件，连接基板和电子设备，其中层叠的半导体芯片电连接彼此不用电线。在一个实施例中，在第一半导体芯片12的表面16上形成电极18之后，从其相对表面24形成孔26直到电极18的钨层20露出。通过蚀刻在第二半导体芯片14的表面31上形成突起30，然后在突起30的顶点上形成邻接电极32.第一半导体芯片12和第二半导体芯片14堆叠在另一个使得邻接电极32接触电极18.结果，电极之间的路径变短，因此抑制或防止信号延迟。此外，对于要堆叠的半导体芯片的面积没有限制。结果，可以层叠具有相同面积的半导体芯片，因此可以减小半导体器件10的尺寸。

10. 发明授权

US5498902A Semiconductor device and its manufacturing method 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US5498902A
公开(公告)日：1996-03-12
申请号：US296055
申请日：1994-08-24
申请人： Akitoshi Hara
发明人： Akitoshi Hara
IPC分类号： H01L25/18 , H01L21/56 , H01L23/31 , H01L23/433 , H01L23/495 , H01L25/10 , H01L25/11 , H01L23/02
CPC分类号： H01L23/4334 , H01L21/565 , H01L23/3107 , H01L23/49575 , H01L25/105 , H01L2224/48091 , H01L2224/48245 , H01L2224/48247 , H01L2224/49171 , H01L2225/1029 , H01L2225/1088 , H01L2225/1094 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01078 , H01L2924/01322 , H01L2924/12042 , H01L2924/1532 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/3511
摘要： In a semiconductor device is provided a semiconductor element 22 encapsulated in a package 26. The connection area 29 used to connect an external structure, such as a heat-dissipating plate 30 or another semiconductor device, is installed in either the die pad 23 used for mounting the semiconductor element or inner leads 24 that are electrically connected to the semiconductor element. The connection area is integrated with the external structure via linking holes 28 that have been formed in the package. By combining a packaged and completed semiconductor device with various types of external structures, it becomes possible to expand or enhance the function of the overall semiconductor device, or to lower its cost.
摘要翻译：在半导体器件中设置有封装在封装26中的半导体元件22.用于连接诸如散热板30或另一半导体器件的外部结构的连接区域29安装在用于安装电连接到半导体元件的半导体元件或内部引线24。连接区域通过已经形成在包装中的连接孔28与外部结构集成。通过将封装和完成的半导体器件与各种类型的外部结构组合，可以扩展或增强整个半导体器件的功能，或降低其成本。

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