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    • 81. 发明授权
    • Method and apparatus for directing constituents through a processing chamber
    • 用于引导成分通过处理室的方法和装置
    • US06586343B1
    • 2003-07-01
    • US09350817
    • 1999-07-09
    • Henry HoYing YuSteven A. Chen
    • Henry HoYing YuSteven A. Chen
    • H01L2131
    • H01L21/67017Y10S118/90
    • A method and apparatus for directing a process gas through a processing apparatus, such as a vapor deposition chamber. The apparatus comprises a pumping plate for a processing chamber having an annular body member wherein said body member has a first portion and a second defining a circumferential edge and a central opening. The first portion comprises a sidewall of the circumferential edge having a plurality of circumferentially spaced through holes and the second portion has comprises a lateral portion that protrudes from the circumferential edge, such that, in a processing chamber, the first portion defines a first gas flow region comprising the central opening and a second gas flow region comprising the lateral portion of the second portion.
    • 用于引导处理气体通过诸如气相沉积室的处理装置的方法和装置。 该装置包括用于处理室的泵板,其具有环形主体构件,其中所述本体构件具有第一部分,第二限定周向边缘和中心开口。 第一部分包括圆周边缘的侧壁,其具有多个周向间隔开的通孔,并且第二部分包括从周向边缘突出的侧部,使得在处理室中,第一部分限定第一气流 区域包括中央开口和包括第二部分的侧部的第二气流区域。
    • 82. 发明申请
    • Semiconductor manufacturing method, substrate processing method, and semiconductor manufacturing apparatus
    • 半导体制造方法,基板处理方法和半导体制造装置
    • US20020020344A1
    • 2002-02-21
    • US09819690
    • 2001-03-29
    • Satoshi Takano
    • B05C011/02
    • H01L21/67778H01L21/67017H01L21/67167H01L21/67745Y10S118/90Y10S414/135Y10S414/136Y10S414/137Y10S414/138Y10S414/139Y10S438/913
    • It is an object of the present invention to adjust the transfer environment of a substrate in order to prevent contamination of the substrate surface by impurities. A semiconductor manufacturing apparatus comprises a load-lock chamber 1 in which substrate exchange with the outside is performed, a wafer process chamber 2 in which the wafer is subjected to a predetermined processing, and a transfer chamber 3 in which the wafer is transferred between the load-lock chamber 1 and the wafer process chamber 2. In a semiconductor manufacturing method in which this semiconductor manufacturing apparatus is used to treat a substrate, an inert gas (N2) is supplied to and exhausted from the load-lock chamber 1, the transfer chamber 3, and the wafer process chamber 2 while the substrate is being transferred from the load-lock chamber 1 to the wafer process chamber 2 through the transfer chamber 3, and the substrate transfer is carried out with a predetermined pressure maintained.
    • 本发明的目的是调整基片的转印环境,以防止杂质污染基片表面。 半导体制造装置包括:与外部进行基板交换的负载锁定室1,经受了规定处理的晶片处理室2;以及转印室3, 负载锁定室1和晶片处理室2.在将半导体制造装置用于处理基板的半导体制造方法中,向负载锁定室1供给惰性气体(N 2)并从负载锁定室1排出, 传输室3和晶片处理室2,同时基板通过传送室3从加载锁定室1传送到晶片处理室2,并且以保持预定压力的方式进行基板传送。
    • 85. 发明授权
    • Method of forming doped shallow electrical junctions
    • 形成掺杂浅电结的方法
    • US5310711A
    • 1994-05-10
    • US101145
    • 1993-08-02
    • Clifford I. DrowleyJohn E. Turner
    • Clifford I. DrowleyJohn E. Turner
    • H01L21/00H01L21/223H01L21/22
    • H01L21/67103H01L21/223Y10S118/90Y10S148/017Y10S148/03Y10S148/144Y10T29/41
    • Very shallow electrical junctions may be formed in an oxide free surface of a semiconductor by introducing an inert or reducing gas into a vacuum processing chamber, heating the semiconductor to between 750.degree. C. and 1100.degree. C., introducing a dilute solution of a dopant gas into the chamber, and exposing the semiconductor to the gases for about 0.5 to about 100 minutes, preferably between 10 and 30 minutes. A relatively wide range of surface dopant concentrations may be achieved thereby with dopant concentration controlled independent of junction depth. Non-oxide free semiconductor surfaces may be made oxide free by first heating the semiconductor surface in the presence of the reducing gas. This technique provides uniform surface dopant concentrations and is suitable for the formation of junctions in deep trenches and other features having high aspect ratios.
    • 可以通过将惰性或还原气体引入真空处理室中将半导体加热到750℃至1100℃之间,在半导体的无氧化物表面形成非常浅的电连接点,引入稀释剂 气体进入室,并将半导体暴露于气体约0.5至约100分钟,优选10至30分钟。 可以实现相对宽范围的表面掺杂剂浓度,从而独立于结深度控制掺杂剂浓度。 通过在还原气体的存在下首先加热半导体表面,可以使非氧化物半导体表面无氧化。 该技术提供均匀的表面掺杂剂浓度,并且适用于在深沟槽中形成结以及具有高纵横比的其它特征。
    • 88. 发明授权
    • Multiple chamber deposition and isolation system and method
    • 多室沉积和隔离系统及方法
    • US4438723A
    • 1984-03-27
    • US306146
    • 1981-09-28
    • Vincent D. CannellaMasatsugu IzuStephen J. Hudgens
    • Vincent D. CannellaMasatsugu IzuStephen J. Hudgens
    • H01L31/04C23C16/54H01L21/00H01L21/205C23C13/10C23C13/12
    • C23C16/54C23C16/545Y10S118/90
    • The formation of a body of material on a substrate having at least two layers of different composition is made possible by the improved system and method of the present invention with minimized cross contamination between the respective deposition environments in which the layers are deposited. The disclosure relates more specifically to the use of the system and method for the deposition of multi-layered amorphous silicon alloys to form photovoltaic devices. As a preferred embodiment of the invention, first, second, and third glow discharge deposition chambers are provided for depositing respective first, second, and third amorphous silicon alloy layers on a substrate. The second layer is substantially intrinsic in conductivity and differs in composition from the first and third layers which are of opposite conductivity type by the absence of at least one element. The second chamber is provided with starting materials including at least one gas from which the deposited layers are derived and the first and third chambers are provided with respective dopants to render the first and third layers opposite in conductivity. Contamination of the second chamber by the dopants in the first and third chambers is prevented by the establishment of unidirectional flow of the at least one gas from the second chamber to the first and third chambers.
    • 通过本发明的改进的系统和方法,在具有至少两层不同组成的基底上形成材料体是通过在各层沉积环境之间的交叉污染最小化而实现的。 本公开更具体地涉及用于沉积多层非晶硅合金以形成光伏器件的系统和方法的使用。 作为本发明的优选实施例,提供了第一,第二和第三辉光放电沉积室,用于在衬底上沉积相应的第一,第二和第三非晶硅合金层。 第二层在电导率上基本上是固有的,并且组成与第一和第三层不同,第一和第三层是由不存在至少一种元素而具有相反导电类型的。 第二腔室设置有起始材料,其包括至少一种气体,从其中导出沉积层,并且第一和第三腔室设置有各自的掺杂剂,以使第一和第三层导电性相反。 通过建立从第二室到第一和第三室的至少一种气体的单向流动来防止第一室和第三室中的掺杂剂对第二室的污染。