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81. 发明授权

US07642662B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07642662B2
公开(公告)日：2010-01-05
申请号：US11951816
申请日：2007-12-06
申请人： Takahiro Kasuga
发明人： Takahiro Kasuga
IPC分类号： H01L23/544
CPC分类号： H01L23/544 , H01L2221/68313 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/16 , H01L2924/15311 , H05K1/0269 , H05K1/111 , H05K3/303 , H05K2201/09381 , H05K2201/094 , H05K2201/10734 , H05K2203/166 , Y02P70/613
摘要： A semiconductor device includes: solder balls provided on an upper package; and pads provided on a lower package and directly connected to the solder balls, wherein at least one of the pads serves as a fiducial mark. Further, a shape of at least one of the pads is different from that of other pads and an area of at least one of the pads is substantially equal to that of the other pads.
摘要翻译：半导体器件包括：设置在上封装上的焊球; 以及设置在下封装上并直接连接到焊球的焊盘，其中至少一个焊盘用作基准标记。此外，至少一个焊盘的形状不同于其它焊盘的形状，并且至少一个焊盘的面积基本上等于其它焊盘的面积。

82. 发明申请

US20090186451A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20090186451A1
公开(公告)日：2009-07-23
申请号：US12408062
申请日：2009-03-20
申请人： Kazuo TESHIROGI , Yuzo SHIMOBEPPU , Kazuhiro YOSHIMOTO , Yoshiaki SHINJO
发明人： Kazuo TESHIROGI , Yuzo SHIMOBEPPU , Kazuhiro YOSHIMOTO , Yoshiaki SHINJO
IPC分类号： H01L21/60
CPC分类号： H01L21/6835 , H01L21/561 , H01L21/563 , H01L21/6836 , H01L24/29 , H01L24/81 , H01L24/83 , H01L24/97 , H01L2221/68313 , H01L2221/68318 , H01L2221/68322 , H01L2221/68327 , H01L2221/68354 , H01L2221/68386 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/75743 , H01L2224/81001 , H01L2224/81203 , H01L2224/81801 , H01L2224/83192 , H01L2224/97 , H01L2924/00011 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01084 , H01L2924/014 , H01L2924/15311 , H01L2924/181 , H01L2224/81 , H01L2924/00014 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/3512 , H01L2924/00012
摘要： A manufacturing method of a semiconductor device includes providing an adhesive on a supporting board, the supporting board being where a semiconductor element is to be mounted; providing a member configured to block flow of the adhesive on a first main surface of the semiconductor element, the semiconductor element having a second main surface where an outside connection terminal is provided; mounting the semiconductor element on a part of the supporting board where the adhesive is provided by pressing the semiconductor element via the member.
摘要翻译：半导体器件的制造方法包括在支撑板上设置粘合剂，所述支撑板是要安装半导体元件的位置; 提供构造成阻挡所述粘合剂在所述半导体元件的第一主表面上的流动的构件，所述半导体元件具有设置有外部连接端子的第二主表面; 通过经由构件挤压半导体元件，将半导体元件安装在支撑板的设置有粘合剂的部分上。

83. 发明申请

US20090071868A1 Carrier Tape Segment Including Mechanical Interlocking Features Thereon 审中-公开
标题翻译：载带部分包括机械联锁功能
公开(公告)号：US20090071868A1
公开(公告)日：2009-03-19
申请号：US11856370
申请日：2007-09-17
申请人： Andrew N. Contes
发明人： Andrew N. Contes
IPC分类号： B65D85/00
CPC分类号： H01L21/6835 , H01L2221/68313 , H01L2924/14 , H05K1/0393 , H05K3/0097 , H05K2201/10598 , H05K2203/1545
摘要： A carrier tape segment to carry a microelectronic component thereon. The carrier tape segment includes a tape segment body having a head portion and a tail portion, and a component carrying portion between the head portion and the tail portion. The head portion includes a first mechanical interlocking feature thereon. The tail portion includes a second mechanical interlocking feature thereon. The first mechanical interlocking feature is configured to mechanically interlock with a mechanical interlocking feature belonging to a separate carrier tape segment and shaped similarly to the second mechanical interlocking feature, and the second mechanical interlocking feature is configured to mechanically interlock with a mechanical interlocking feature belonging to a separate carrier tape segment and shaped similarly to the first mechanical interlocking feature. The carrier tape segment is thereby configured to be linked to other carrier tape segments to form a carrier tape chain therewith.
摘要翻译：携带微带电子部件的载带部分。载体带段包括具有头部和尾部的带段主体，以及在头部和尾部之间的部件承载部分。头部包括其上的第一机械互锁特征。尾部包括其上的第二机械互锁特征。第一机械互锁特征被配置为与属于单独的载带段的机械互锁特征机械互锁并且类似于第二机械互锁特征成形，并且第二机械互锁特征被配置为与属于单独的载带段，其形状类似于第一机械互锁特征。因此，载带部分被构造成与其它载带段连接以形成载体带链。

84. 发明授权

US07459341B2 Method of manufacturing an electronic device 失效
标题翻译：制造电子装置的方法
公开(公告)号：US07459341B2
公开(公告)日：2008-12-02
申请号：US11411884
申请日：2006-04-27
申请人： Mitsuo Usami
发明人： Mitsuo Usami
IPC分类号： H01L21/00
CPC分类号： H01L21/6835 , G06K19/07718 , G06K19/07745 , G06K19/07747 , H01L21/67132 , H01L21/6836 , H01L23/49855 , H01L23/5388 , H01L23/552 , H01L23/645 , H01L24/27 , H01L24/29 , H01L24/81 , H01L24/83 , H01L24/97 , H01L2221/68313 , H01L2221/68327 , H01L2221/6835 , H01L2224/274 , H01L2224/2919 , H01L2224/81136 , H01L2224/81801 , H01L2224/83136 , H01L2224/83192 , H01L2224/8385 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H01Q1/2208 , H01Q1/38 , H01Q9/40 , H01Q9/42 , Y10T29/49121 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/3512
摘要： The existing IC cards have a disadvantage of difficulty of mass production because an IC chip is supplied on a substrate one at a time. The present invention provides a method of manufacturing by placing a positioning jig having a plurality of openings each of which has a size fit with a semiconductor device, providing a plurality of semiconductor devices on said jig to house the devices into the openings, and fixing on a substrate then cutting the substrate to provide independent electronic devices. When the semiconductor device is in a form of chip, a support member attached to the chip will facilitate the handling of chips.
摘要翻译：由于IC芯片一次一个地供给在基板上，所以现有的IC卡具有难以批量生产的缺点。本发明提供一种通过放置具有多个开口的定位夹具的制造方法，每个开口具有与半导体器件配合的尺寸，在所述夹具上设置多个半导体器件以将器件容纳在开口中，并固定在衬底然后切割衬底以提供独立的电子器件。当半导体器件为芯片形式时，附着于芯片的支撑部件将有利于芯片的处理。

85. 发明授权

US07458472B2 Re-usable carrier structure 失效
标题翻译：可重复使用的运营商结构
公开(公告)号：US07458472B2
公开(公告)日：2008-12-02
申请号：US11217832
申请日：2005-09-01
申请人： Kevin Kwong-Tai Chung
发明人： Kevin Kwong-Tai Chung
IPC分类号： A47F7/00
CPC分类号： H01L21/6836 , B32B7/12 , H01L2221/68313 , H01L2221/68327 , Y10T428/1307 , Y10T428/14 , Y10T428/239
摘要： A re-usable carrier structure comprises a carrier frame and a removable stretchable carrier base supported thereby. A tacky adhesive layer is disposed on the carrier base, and semiconductor chips or other article(s) carried adhere to the adhesive layer. When it is desired to remove the article(s), an ejector displaces and stretches the carrier base. After the article(s) have been removed, the carrier base may be removed from the carrier frame which can be re-used to hold and transport article(s) after receiving a new carrier base.
摘要翻译：可重复使用的载体结构包括载体框架和由其支撑的可移除的可拉伸载体基底。在载体基底上设置粘性粘合剂层，并且将半导体芯片或其它物品附着在粘合剂层上。当需要去除物品时，喷射器移动并延伸载体基座。在物品被移除之后，载体基座可以从载体框架上移除，载体框架可以在接收到新的载体基底之后重新用于保持和运输物品。

86. 发明授权

US07237606B2 Wafer supporter 失效
标题翻译：晶圆支架
公开(公告)号：US07237606B2
公开(公告)日：2007-07-03
申请号：US10480460
申请日：2002-06-12
申请人： Mitsuhiro Yuasa , Keiichi Enjoji , Koji Homma
发明人： Mitsuhiro Yuasa , Keiichi Enjoji , Koji Homma
IPC分类号： F28F7/20 , F28D15/00
CPC分类号： H01L21/68757 , C23C16/4581 , C30B25/12 , C30B31/14 , H01L21/67103 , H01L21/67294 , H01L21/6835 , H01L2221/68313
摘要： A wafer supporting unit (10) includes a base (12) and a thermally conductive member (14). The base is formed by nickel material. The thermally conductive member is formed in the shape of a lamina, includes silicone rubber (16) serving as the main material, and Ag fine powder (18) is blended with the silicone rubber. The Ag fine powder is blended with high density in part of the thermally conductive member, and a plurality of pillar-shaped regions (20) is formed with one end facing the bottom, and with the other end facing the top. The wafer supporting unit does not produce curvature in a wafer, and provides efficient cooling of the wafer, and does not cause heat degradation in a thermally conductive member prepared on the rear side of the wafer during processing.
摘要翻译：晶片支撑单元（10）包括基座（12）和导热构件（14）。基体由镍材料形成。导热构件形成为薄片形状，包括用作主要材料的硅橡胶（16），和Ag细粉末（18）与硅橡胶共混。在导热部件的一部分中，Ag细粉末以高密度混合，并且形成多个柱状区域（20），其一端面向底部，另一端面向顶部。晶片支撑单元在晶片中不产生曲率，并且提供晶片的有效冷却，并且不会在加工期间在晶片的后侧准备的导热部件中导致热劣化。

87. 发明授权

US07228622B2 Electronic device carrier and manufacture tape 有权
标题翻译：电子设备载体和制造胶带
公开(公告)号：US07228622B2
公开(公告)日：2007-06-12
申请号：US10916746
申请日：2004-08-11
申请人： Jeffrey Watson
发明人： Jeffrey Watson
IPC分类号： H01R11/00
CPC分类号： H01L21/6835 , H01L21/67132 , H01L21/673 , H01L2221/68313 , H05K13/0084 , Y10T29/49004 , Y10T29/49117 , Y10T29/49121 , Y10T29/49124 , Y10T29/49126 , Y10T29/4913 , Y10T29/49135 , Y10T29/49146 , Y10T29/5313 , Y10T29/53187
摘要： A method and machine-readable medium are described for a flexible tape constructed of a material suitable to convey electronic devices through an entire manufacturing process without removing the electronic packages from the tape. According to one embodiment, part receiving areas are located within the tape. Each part receiving area is suitable to hold an electronic device. A retention channel encompasses each part receiving area. The retention channel extends substantially an entire length along each edge of each part receiving area. The retention channel comprises an upper tab and a lower tab wherein the upper tab is flush with an upper surface of the flexible tape and extends into the part receiving area and the lower tab extends below a lower surface of the flexible tape and into the part receiving area.
摘要翻译：描述了一种用于由适合于通过整个制造过程传送电子设备的材料构成的柔性带的方法和机器可读介质，而不从磁带移除电子包装。根据一个实施例，部分接收区域位于带内。每个部分接收区域适合于容纳电子设备。保持通道包括每个部件接收区域。保持通道沿着每个部件接收区域的每个边缘基本上延伸整个长度。保持通道包括上突片和下突片，其中上突片与柔性带的上表面齐平并且延伸到部件接收区域中，并且下突片延伸到柔性带的下表面下方并进入部件接收部区。

88. 发明授权

US07108899B2 Chip tray with tacky surface 失效
标题翻译：具有粘性表面的芯片托盘
公开(公告)号：US07108899B2
公开(公告)日：2006-09-19
申请号：US10241805
申请日：2002-09-11
申请人： Charles W. Extrand , Ralph Henderer
发明人： Charles W. Extrand , Ralph Henderer
IPC分类号： B32B5/00 , B65D85/30 , B29D22/00 , H01L23/24
CPC分类号： H05K13/0084 , H01L21/673 , H01L2221/68313 , Y10S414/14 , Y10S414/141 , Y10T428/13 , Y10T428/1352
摘要： A tray for handling and retaining a plurality of components, wherein the tray has a rigid body portion and an elastomeric contact layer. The contact layer has a planar upper surface for contacting and retaining the components, and may be formed from a thermoplastic material having a surface energy between 20 dyne/cm and 100 dyne/cm, a hardness of between about Shore A15 and Shore D75, and a surface electrical resistivity of between about 1×104 ohms/square and 1×1012 ohms/square.
摘要翻译：一种用于处理和保持多个部件的托盘，其中所述托盘具有刚体部分和弹性体接触层。接触层具有用于接触和保持部件的平坦的上表面，并且可以由具有20达因/厘米至100达因/厘米之间的表面能，约肖氏A15和肖氏D75之间的硬度的热塑性材料形成，以及约1×10 4欧姆/平方英寸和1×10 12欧姆/平方的表面电阻率。

89. 发明申请

US20060189032A1 PROCESS FOR ASSEMBLING A DOUBLE-SIDED CIRCUIT COMPONENT 有权
标题翻译：组装双面电路组件的方法
公开(公告)号：US20060189032A1
公开(公告)日：2006-08-24
申请号：US10906518
申请日：2005-02-23
申请人： Ze Etta Murphy
发明人： Ze Etta Murphy
IPC分类号： H01L21/50 , H01L21/48 , H01L21/44
CPC分类号： H05K3/3405 , H01L21/6835 , H01L23/49531 , H01L23/49861 , H01L2221/68313 , H01L2924/0002 , H05K1/145 , H05K3/368 , H05K2201/1034 , H05K2201/10924 , H05K2203/0165 , H01L2924/00
摘要： A process for producing a circuit component having a double-sided circuit device between a pair of substrates. The process entails depositing a solder material on contact areas on surfaces of the substrates, placing a first of the substrates within a cavity in a receptacle, and then placing a lead member on the substrate so that the lead member is supported by the receptacle and a portion of the lead member is aligned with a portion of the contact area of the substrate. A fixture is then placed on the lead member and over the substrate so that the fixture is supported by the receptacle. After aligning the circuit device with the contact area of the remaining substrate, the substrate-device assembly is placed in an aperture in the fixture so that a surface of the device electrically contacts the contact area of the first substrate and the opposite surface of the device electrically contacts the contact area of the second substrate. The resulting fixtured assembly then undergoes reflow.
摘要翻译：一种用于制造在一对基板之间具有双面电路器件的电路部件的工艺。该过程需要将焊料材料沉积在基板的表面上的接触区域上，将第一基板放置在容器内的空腔内，然后将引线部件放置在基板上，使得引线部件由插座支撑，引线构件的一部分与衬底的接触区域的一部分对准。然后将夹具放置在引导构件上并在基板上方，使得固定装置由插座支撑。在将电路装置与剩余基板的接触区域对准之后，将基板装置组件放置在固定装置中的孔中，使得装置的表面与第一基板的接触区域和装置的相对表面电接触电接触第二基板的接触区域。所得到的夹具组件然后经受回流。

90. 发明授权

US07061108B2 Semiconductor device and a method for securing the device in a carrier tape 有权
标题翻译：半导体器件和用于将器件固定在载带上的方法
公开(公告)号：US07061108B2
公开(公告)日：2006-06-13
申请号：US10677435
申请日：2003-10-02
申请人： Lance C. Wright , Albert D. Escusa
发明人： Lance C. Wright , Albert D. Escusa
IPC分类号： H01L23/04 , H01L23/48 , H01L23/28
CPC分类号： H01L21/6835 , H01L2221/68309 , H01L2221/68313 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A method for packing a semiconductor device 301 in a carrier tape 406 without damage to the leads 302 includes an interlocking mechanism between the molded semiconductor device with indentations 305 formed into the package body, and the carrier tape having mating protrusions 407 slightly smaller than the indentations which cause the device to be held securely without significant movement after a cover tape 409 is adhered to the carrier tape. The features of correctly sized pockets and pedestals, the cover tape, and the interlocking device indentations and tape protrusions prevent damage to the device leads as a result of impact.
摘要翻译：用于将载体带406中的半导体器件301封装而不损坏引线302的方法包括在形成于封装主体中的凹陷305的模制半导体器件与具有比凹口稍小的配合突起407的载体带之间的互锁机构这导致在将胶带409粘附到载带上之后，装置被牢固地保持而没有显着的移动。正确尺寸的凹坑和基座，盖带和互锁装置凹槽和带突起的特征防止由于冲击而对装置引线造成损坏。

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