专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明申请

US20110207246A1 METHODS FOR REDUCING THE WIDTH OF THE UNBONDED REGION IN SOI STRUCTURES 有权
标题翻译：降低SOI结构中无限制区域宽度的方法
公开(公告)号：US20110207246A1
公开(公告)日：2011-08-25
申请号：US13021467
申请日：2011-02-04
申请人： John A. Pitney , Ichiro Yoshimura , Lu Fei
发明人： John A. Pitney , Ichiro Yoshimura , Lu Fei
IPC分类号： H01L21/66 , H01L21/762 , H01L21/306
CPC分类号： H01L21/76254 , H01L21/02024 , H01L21/02052
摘要： The disclosure relates to preparation of silicon on insulator structures with reduced unbonded regions and to methods for producing such wafers by minimizing the roll-off amount (ROA) of the handle and donor wafers. Methods for polishing wafers are also provided.
摘要翻译：本公开涉及具有减少的未结合区域的绝缘体上硅结构的制备以及通过使手柄和供体晶片的滚降量（ROA）最小化来制造这种晶片的方法。还提供了抛光晶片的方法。

82. 发明申请

US20110204471A1 SEMICONDUCTOR WAFERS WITH REDUCED ROLL-OFF AND BONDED AND UNBONDED SOI STRUCTURES PRODUCED FROM SAME 有权
标题翻译：具有降低的折叠和结合的半导体晶体管和从其生成的非结合SOI结构
公开(公告)号：US20110204471A1
公开(公告)日：2011-08-25
申请号：US13021443
申请日：2011-02-04
申请人： John A. Pitney , Ichiro Yoshimura , Lu Fei
发明人： John A. Pitney , Ichiro Yoshimura , Lu Fei
IPC分类号： H01L27/12 , H01L29/32
CPC分类号： H01L21/76254 , H01L21/02024 , H01L21/02052
摘要： The disclosure relates to preparation of silicon on insulator structures with reduced unbonded regions and to methods for producing such wafers by minimizing the roll-off amount (ROA) of the handle and donor wafers. Methods for polishing wafers are also provided.
摘要翻译：本公开涉及具有减少的未结合区域的绝缘体上硅结构的制备以及通过使手柄和供体晶片的滚降量（ROA）最小化来制造这种晶片的方法。还提供了抛光晶片的方法。

83. 发明申请

US20110183113A1 SILICON CARBIDE SINGLE CRYSTAL SUBSTRATE 审中-公开
标题翻译：硅碳化硅单晶基板
公开(公告)号：US20110183113A1
公开(公告)日：2011-07-28
申请号：US13121115
申请日：2009-09-28
申请人： Yasuyuki Sakaguchi
发明人： Yasuyuki Sakaguchi
IPC分类号： B32B3/00 , B82Y30/00
CPC分类号： H01L21/30625 , B24B37/04 , C30B29/36 , H01L21/02008 , H01L21/02024 , H01L21/02052 , H01L29/1608 , Y10T428/24372
摘要： There is provided a silicon carbide single crystal substrate having adhered particles that cause crystal defects removed therefrom and has high surface cleanliness,the silicon carbide single crystal substrate, wherein a density of first adhered particles attached onto one surface of the substrate and having a height of 100 nm or more is one particle/cm2 or less, and also a density of second adhered particles attached onto one surface of the substrate and having a height of less than 100 nm is 1,500 particles/cm2 or less.
摘要翻译：提供一种碳化硅单晶基板，其具有粘附的颗粒，其导致从其中去除的晶体缺陷并具有高的表面清洁度，该碳化硅单晶基板，其中附着在基板的一个表面上的第一附着颗粒的密度， 100nm以上是1个/ cm 2以下，并且附着在基板的一个表面上并且具有小于100nm的高度的第二附着粒子的密度为1,500个/ cm 2以下。

84. 发明申请

US20110133207A1 GROUP III NITRIDE SUBSTRATE, EPITAXIAL LAYER-PROVIDED SUBSTRATE, METHODS OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译： III族氮化物衬底，外延层基板，其制造方法和制造半导体器件的方法
公开(公告)号：US20110133207A1
公开(公告)日：2011-06-09
申请号：US13016497
申请日：2011-01-28
申请人： Keiji Ishibashi , Akihiro Hachigo , Masato Irikura , Seiji Nakahata
发明人： Keiji Ishibashi , Akihiro Hachigo , Masato Irikura , Seiji Nakahata
IPC分类号： H01L29/20
CPC分类号： C30B29/403 , C30B29/406 , C30B33/00 , H01L21/02024 , H01L33/16 , H01L33/32
摘要： A group III nitride substrate on which an epitaxially grown layer of good quality can be formed, and a method of manufacturing the same are obtained. A GaN substrate (1) is one of the following: a group III nitride substrate, wherein the number of atoms of an acid material per square centimeter of a surface (3) is not more than 2×1014, and the number of silicon atoms per square centimeter of the surface (3) is not more than 3×1013; a group III nitride substrate, wherein the number of silicon atoms per square centimeter of a surface (3) is not more than 3×1013, and a haze level of the surface (3) is not more than 5 ppm; and a group III nitride substrate, wherein the number of atoms of an acid material per square centimeter of a surface (3) is not more than 2×1014, and a haze level of the surface (3) is not more than 5 ppm.
摘要翻译：可以形成能够形成质量良好的外延生长层的III族氮化物衬底及其制造方法。 GaN衬底（1）是以下之一：III族氮化物衬底，其中每平方厘米表面（3）的酸性材料的原子数不大于2×1014，并且硅原子数每平方厘米的表面（3）不大于3×1013; III族氮化物衬底，其中每平方厘米表面（3）的硅原子数不大于3×1013，并且表面（3）的雾度不大于5ppm; 和III族氮化物衬底，其中每平方厘米表面（3）的酸性材料的原子数不大于2×1014，并且表面（3）的雾度水平不大于5ppm。

85. 发明申请

US20110104994A1 SEMICONDUCTOR WAFER RE-USE USING CHEMICAL MECHANICAL POLISHING 失效
标题翻译：使用化学机械抛光的半导体波导重新使用
公开(公告)号：US20110104994A1
公开(公告)日：2011-05-05
申请号：US12609768
申请日：2009-10-30
申请人： Jonas Bankaitis , Michael John Moore
发明人： Jonas Bankaitis , Michael John Moore
IPC分类号： B24B1/00 , B24B7/22 , B24B57/02
CPC分类号： H01L21/02024 , H01L21/02032 , H01L21/76254
摘要： Methods and apparatus for reducing damage of a semiconductor donor wafer include the steps of: (a) rotating a polishing pad, rotating the semiconductor donor wafer, applying a polishing slurry to the polishing pad, and pressing the semiconductor donor wafer and the polishing pad together; and (b) rotating the polishing pad and the semiconductor donor wafer, discontinuing the application of the polishing slurry, applying a rinsing fluid to the polishing pad, and, pressing the semiconductor donor wafer and the polishing pad together, wherein step (a) followed by step (b) is carried out in sequence at least two times, and at least one of the following are reduced in at least two successive intervals of step (a): (i) a pressure at which the semiconductor donor wafer and the polishing pad are pressed together, (ii) a mean particle size of an abrasive within the polishing slurry, and (iii) a concentration of the slurry in water and stabilizers.
摘要翻译：用于减少半导体施主晶片的损伤的方法和装置包括以下步骤：（a）旋转抛光垫，旋转半导体施主晶片，将抛光浆料施加到抛光垫，并将半导体施主晶片和抛光垫一起按压 ; 并且（b）旋转抛光垫和半导体施主晶片，停止施加抛光浆料，向抛光垫施加冲洗流体，以及将半导体施主晶片和抛光垫压在一起，其中步骤（a）遵循通过步骤（b）按顺序进行至少两次，并且在步骤（a）的至少两个连续间隔中减少以下中的至少一个：（i）半导体施主晶片和抛光的压力衬垫被压在一起，（ii）抛光浆料中磨料的平均粒度，和（iii）浆料在水中的浓度和稳定剂。

86. 发明申请

US20110062115A1 COMPOSITION AND METHOD FOR POLISHING BULK SILICON 有权
标题翻译：抛光硅胶的组合物和方法
公开(公告)号：US20110062115A1
公开(公告)日：2011-03-17
申请号：US12762180
申请日：2010-04-16
申请人： Brian REISS , Michael White , Lamon Jones , John Clark
发明人： Brian REISS , Michael White , Lamon Jones , John Clark
IPC分类号： B24B37/04
CPC分类号： B24B1/00 , B24B9/065 , B24B37/02 , C09G1/02 , H01L21/02021 , H01L21/02024
摘要： The invention provides a polishing composition comprising (a) silica, (b) one or more compounds that increase the removal rate of silicon, (c) one or more tetraalkylammonium salts, and (d) water, wherein the polishing composition has a pH of about 7 to about 11. The invention further provides a method of polishing a substrate with the polishing composition.
摘要翻译：本发明提供一种抛光组合物，其包含（a）二氧化硅，（b）一种或多种增加硅去除速率的化合物，（c）一种或多种四烷基铵盐和（d）水，其中抛光组合物的pH为约7至约11.本发明还提供了用抛光组合物抛光基材的方法。

87. 发明授权

US07902039B2 Method for manufacturing silicon wafer 有权
标题翻译：硅晶片制造方法
公开(公告)号：US07902039B2
公开(公告)日：2011-03-08
申请号：US11946643
申请日：2007-11-28
申请人： Shinichi Tomita , Masao Yoshimuta , Yasuyuki Hashimoto , Akira Nakashima
发明人： Shinichi Tomita , Masao Yoshimuta , Yasuyuki Hashimoto , Akira Nakashima
IPC分类号： H01L21/00
CPC分类号： H01L21/304 , H01L21/02024 , H01L21/2007 , H01L21/76256
摘要： A method for manufacturing a silicon wafer is characterized by performing one or both of grinding and polishing to a thin discoid silicon wafer to give bowl-shaped warpage that is concave at a central part to a wafer surface. One main surface of the thin discoid silicon wafer is adsorbed and held, and one or both of grinding and polishing are performed to the other main surface to fabricate a convex wafer whose thickness is increased from a wafer outer periphery toward a wafer center or fabricate a concave wafer whose thickness is reduced from the wafer outer periphery toward the wafer center. Then, the other main surface is adsorbed and held to protrude the center or the periphery of the one main surface side based on elastic deformation. One or both of grinding and polishing are carried out with respect to the one main surface to flatten the main surface, and adsorption and holding are released to give bowl-shaped warpage that is concave at the central part to the other main surface or the one main surface. By the method, an SOI wafer or an epitaxial silicon wafer having a high degree of flatness is obtained.
摘要翻译：硅晶片的制造方法的特征在于对薄盘状硅晶片进行研磨抛光中的一个或两个以给出在晶片表面的中心部分凹陷的碗形翘曲。吸附并保持薄盘形硅晶片的一个主表面，并且对另一个主表面进行研磨和抛光中的一个或两个以制造厚度从晶片外周朝向晶片中心增加的凸形晶片，或者制造其厚度从晶片外周朝向晶片中心减小的凹晶片。然后，基于弹性变形，另一个主表面被吸附并保持成一个主表面侧的中心或周边突出。研磨抛光中的一个或两个相对于一个主表面进行，以平坦化主表面，并且释放吸附和保持以产生碗形翘曲，其在中心部分处凹入另一个主表面或一个主表面。通过该方法，获得具有高度平坦度的SOI晶片或外延硅晶片。

88. 发明授权

US07901960B2 Group III nitride substrate, epitaxial layer-provided substrate, methods of manufacturing the same, and method of manufacturing semiconductor device 有权
标题翻译： III族氮化物衬底，提供外延层的衬底，其制造方法以及制造半导体器件的方法
公开(公告)号：US07901960B2
公开(公告)日：2011-03-08
申请号：US12445681
申请日：2007-10-09
申请人： Keiji Ishibashi , Akihiro Hachigo , Masato Irikura , Seiji Nakahata
发明人： Keiji Ishibashi , Akihiro Hachigo , Masato Irikura , Seiji Nakahata
IPC分类号： H01L21/00
CPC分类号： C30B29/403 , C30B29/406 , C30B33/00 , H01L21/02024 , H01L33/16 , H01L33/32
摘要： A group III nitride substrate on which an epitaxially grown layer of good quality can be formed, and a method of manufacturing the same are obtained. A GaN substrate is one of the following: a group III nitride substrate, wherein the number of atoms of an acid material per square centimeter of a surface is not more than 2×1014, and the number of silicon atoms per square centimeter of the surface is not more than 3×1013; a group III nitride substrate, wherein the number of silicon atoms per square centimeter of a surface is not more than 3×1013, and a haze level of the surface is not more than 5 ppm; and a group III nitride substrate, wherein the number of atoms of an acid, material per square centimeter of a surface is not more than 2×1014, and a haze level of the surface is not more than 5 ppm.
摘要翻译：可以形成能够形成质量良好的外延生长层的III族氮化物衬底及其制造方法。 GaN衬底是以下之一：III族氮化物衬底，其中每平方厘米表面的酸性材料的原子数不大于2×1014，并且每平方厘米表面的硅原子数不超过3×1013; III族氮化物衬底，其中每平方厘米表面的硅原子数不大于3×1013，并且表面的雾度不大于5ppm; 和III族氮化物衬底，其中酸的原子数，每平方厘米表面的材料不大于2×1014，并且表面的雾度不大于5ppm。

89. 发明申请

US20110021025A1 METHOD FOR PRODUCING LASER-MARKED SEMICONDUCTOR WAFER 审中-公开
标题翻译：用于生产激光标记半导体波长的方法
公开(公告)号：US20110021025A1
公开(公告)日：2011-01-27
申请号：US12841015
申请日：2010-07-21
申请人： Tomohiro Hashii , Kenji Aoki
发明人： Tomohiro Hashii , Kenji Aoki
IPC分类号： H01L21/302
CPC分类号： H01L21/02024 , H01L23/544 , H01L2223/54406 , H01L2223/54433 , H01L2223/54453 , H01L2223/54493 , H01L2924/0002 , H01L2924/00
摘要： A laser-marked semiconductor wafer having a good flatness in the vicinity of laser mark-printed sites is produced by a method comprising a slicing step; a planarization step; a laser mark printing step; a grinding step; an etching step; and a polishing step.
摘要翻译：通过包括切片步骤的方法产生激光标记印刷位置附近具有良好平坦度的激光标记半导体晶片; 平面化步骤; 激光打标步骤; 研磨步骤; 蚀刻步骤; 和抛光步骤。

90. 发明申请

US20110005143A1 POLISHING OIL SLURRY FOR POLISHING HARD CRYSTAL SUBSTRATE 审中-公开
标题翻译：用于抛光硬质基材的抛光油浆
公开(公告)号：US20110005143A1
公开(公告)日：2011-01-13
申请号：US12886810
申请日：2010-09-21
申请人： Kenji Aoki , Toru Yamazaki , Takehiro Watanabe , Naoyuki Hamada
发明人： Kenji Aoki , Toru Yamazaki , Takehiro Watanabe , Naoyuki Hamada
IPC分类号： C09K3/14 , C09G1/02
CPC分类号： H01L21/02024 , B24B37/044 , C09G1/02 , C09K3/1436 , C09K3/1472 , H01L29/1608
摘要： A hard crystal substrate such as a GaN substrate or a SiC substrate is polished by using polishing oil slurry having abrading particles of artificial diamond clusters dispersed in a dispersant. The artificial diamond clusters include approximately spherical agglomerate particles with average particle size D50 of 20 nm or more and 50 nm or less, having primary particles with particle diameters of 2 nm or more and 10 nm or less. A rough polishing process is carried out first such that an average surface roughness of 0.5 nm or more and 1 nm or less is obtained, followed by a finishing process such that the average surface roughness of said surface becomes 0.2 nm or less.
摘要翻译：通过使用分散在分散剂中的具有研磨人造金刚石颗粒的抛光油浆来研磨诸如GaN衬底或SiC衬底的硬质晶体衬底。人造金刚石团簇包括具有粒径为2nm以上且10nm以下的一次粒子的平均粒径D 50为20nm以上且50nm以下的近似球状的聚集体颗粒。首先进行粗抛光处理，使得得到0.5nm以上且1nm以下的平均表面粗糙度，然后进行表面的平均表面粗糙度为0.2nm以下的精加工。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式