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    • 81. 发明申请
    • Method of fabricating a low, dark-current germanium-on-silicon pin photo detector
    • 制造低,暗电流硅 - 硅引脚光电探测器的方法
    • US20070141744A1
    • 2007-06-21
    • US11312967
    • 2005-12-19
    • Jong-Jan LeeDouglas TweetJer-Shen MaaSheng Hsu
    • Jong-Jan LeeDouglas TweetJer-Shen MaaSheng Hsu
    • H01L21/00
    • H01L31/105H01L31/1808H01L31/1864Y02E10/50Y02P70/521Y10S438/933
    • A method of fabricating a low, dark-current germanium-on-silicon PIN photo detector includes preparing a P-type silicon wafer; implanting the P-type silicon wafer with boron ions; activating the boron ions to form a P+ region on the silicon wafer; forming a boron-doped germanium layer on the P+ silicon surface; depositing an intrinsic germanium layer on the born-doped germanium layer; cyclic annealing, including a relatively high temperature first anneal step and a relatively low temperature second anneal step; repeating the first and second anneal steps for about twenty cycles, thereby forcing crystal defects to the P+ germanium layer; implanting ions in the surface of germanium layer to form an N+ germanium surface layer and a PIN diode; activating the N+ germanium surface layer by thermal anneal; and completing device according to known techniques to form a low dark-current germanium-on-silicon PIN photodetector.
    • 制造低,暗电流锗硅PIN光检测器的方法包括制备P型硅晶片; 用硼离子注入P型硅晶片; 激活硼离子以在硅晶片上形成P +区; 在P +硅表面上形成硼掺杂锗层; 在天然掺杂锗层上沉积本征锗层; 循环退火,包括相对高温的第一退火步骤和相对低温的第二退火步骤; 重复第一和第二退火步骤约20个循环,由此迫使晶体缺陷到P +锗层; 在锗层表面注入离子以形成N +锗表面层和PIN二极管; 通过热退火激活N +锗表面层; 并根据已知技术完成器件以形成低暗电流锗硅PIN光电探测器。
    • 82. 发明申请
    • Floating body germanium phototransistor
    • 浮体锗光电晶体管
    • US20070001163A1
    • 2007-01-04
    • US11174035
    • 2005-07-01
    • Jong-Jan LeeSheng HsuJer-Shen MaaDouglas Tweet
    • Jong-Jan LeeSheng HsuJer-Shen MaaDouglas Tweet
    • H01L31/00
    • H01L31/1136H01L31/028H01L31/1808Y02E10/547
    • A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.
    • 提出了一种浮体锗(Ge)光电晶体管及其制造工艺。 该方法包括:提供硅(Si)衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延(LPE)工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质,栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge,并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括:形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge,将外延生长前沿从下面的Si衬底表面横向传播到Ge中。
    • 88. 发明申请
    • Real-time CMOS imager having stacked photodiodes fabricated on SOI wafer
    • 具有在SOI晶片上制造的堆叠光电二极管的实时CMOS成像器
    • US20070218578A1
    • 2007-09-20
    • US11384110
    • 2006-03-17
    • Jong-Jan LeeSheng HsuDouglas TweetJer-Shen Maa
    • Jong-Jan LeeSheng HsuDouglas TweetJer-Shen Maa
    • H01L21/00
    • H01L27/14647
    • A CMOS active pixel sensor includes a silicon-on-insulator substrate having a silicon substrate with an insulator layer formed thereon and a top silicon layer formed on the insulator layer. A stacked pixel sensor cell includes a bottom photodiode fabricated on the silicon substrate, for sensing light of a longest wavelength; a middle photodiode fabricated on the silicon substrate, for sensing light of a medium wavelength, which is stacked above the bottom photodiode; and a top photodiode fabricated on the top silicon layer, for sensing light of a shorter wavelength, which is stacked above the middle and bottom photodiodes. Pixel transistor sets are fabricated on the top silicon layer and are associated with each pixel sensor cell by electrical connections which extend between each of the photodiodes and respective pixel transistor(s). CMOS control circuitry is fabricated adjacent to an array of active pixel sensor cells and electrically connected thereto.
    • CMOS有源像素传感器包括具有在其上形成有绝缘体层的硅衬底和形成在绝缘体层上的顶部硅层的绝缘体上硅衬底。 层叠像素传感器单元包括:制造在硅衬底上的底部光电二极管,用于感测最长波长的光; 制造在硅衬底上的中间光电二极管,用于感测中等波长的光; 和制造在顶部硅层上的顶部光电二极管,用于感测较短波长的光,该光被层叠在中间和底部光电二极管的上方。 像素晶体管组被制造在顶部硅层上,并且通过在每个光电二极管和相应的像素晶体管之间延伸的电连接与每个像素传感器单元相关联。 CMOS控制电路与有源像素传感器单元的阵列相邻并且与其电连接。
    • 89. 发明申请
    • Silicon-on-insulator near infrared active pixel sensor array
    • 绝缘体上的近红外有源像素传感器阵列
    • US20070190681A1
    • 2007-08-16
    • US11352724
    • 2006-02-13
    • Jong-Jan LeeJer-Shen MaaDouglas TweetSheng Hsu
    • Jong-Jan LeeJer-Shen MaaDouglas TweetSheng Hsu
    • H01L21/00
    • H01L27/14649H01L27/14609H01L27/14689
    • A method is provided for forming a near infrared (NIR) active pixel sensor array on a silicon-on-insulator (SOI) substrate. The method forms a first wafer comprising a high resistance first Si substrate and a moderately doped first Si layer, and forms a second wafer comprising a first silicon oxide layer and a second Si layer. The method bonds the first wafer to the second wafer, forming a SOI substrate. Then, a diode is formed with a p-n junction space charge region extending into the first Si substrate. A thin-film transistor (TFT) is formed in the second Si layer, and interconnects are formed between the TFT and the diode. For example, first Si substrate may have a resistivity of greater than 100 ohm-cm, and the first Si layer may have a dopant concentration in the range of about 1×1016 to about 5×1018 cm−3.
    • 提供了一种用于在绝缘体上硅(SOI)衬底上形成近红外(NIR)有源像素传感器阵列的方法。 该方法形成包括高电阻第一Si衬底和中度掺杂的第一Si层的第一晶片,并且形成包括第一氧化硅层和第二Si层的第二晶片。 该方法将第一晶片连接到第二晶片,形成SOI衬底。 然后,形成具有延伸到第一Si衬底中的p-n结空间电荷区域的二极管。 在第二Si层中形成薄膜晶体管(TFT),并且在TFT和二极管之间形成互连。 例如,第一Si衬底可以具有大于100欧姆 - 厘米的电阻率,并且第一Si层可以具有在约1×10 16至约5×10 18范围内的掺杂剂浓度, / SUP> cm 3 -3。