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81. 发明授权

US06844585B1 Circuit and method of forming the circuit having subsurface conductors 有权
标题翻译：形成具有地下导体的电路的电路和方法
公开(公告)号：US06844585B1
公开(公告)日：2005-01-18
申请号：US10173911
申请日：2002-06-17
申请人： Peter J. Hopper , Vladislav Vashchenko , Philipp Lindorfer , Andy Strachan
发明人： Peter J. Hopper , Vladislav Vashchenko , Philipp Lindorfer , Andy Strachan
IPC分类号： H01L21/265 , H01L21/8234 , H01L27/088 , H01L29/08 , H01L29/788
CPC分类号： H01L21/26586 , H01L21/2652 , H01L21/823418 , H01L27/088 , H01L29/0847
摘要： A MOS transistor and subsurface collectors can be formed by using a hard mask and precisely varying the implant angle, rotation, dose, and energy. In this case, a particular atomic species can be placed volumetrically in a required location under the hard mask. The dopant can be implanted to form sub-silicon volumes of arbitrary shapes, such as pipes, volumes, hemispheres, and interconnects.
摘要翻译：可以通过使用硬掩模并精确地改变植入角度，旋转，剂量和能量来形成MOS晶体管和地下收集器。在这种情况下，特定的原子物质可以体积地放置在硬掩模下的所需位置。可以将掺杂剂注入以形成任意形状的子硅体积，例如管道，体积，半球和互连。

82. 发明授权

US06777784B1 Bipolar transistor-based electrostatic discharge (ESD) protection structure with a heat sink 有权
标题翻译：双极晶体管静电放电（ESD）保护结构，带散热片
公开(公告)号：US06777784B1
公开(公告)日：2004-08-17
申请号：US09690580
申请日：2000-10-17
申请人： Vladislav Vashchenko , Peter J. Hopper
发明人： Vladislav Vashchenko , Peter J. Hopper
IPC分类号： H01L27082
CPC分类号： H01L27/0259
摘要： An ESD protection structure for use with bipolar or BiCMOS ICs that is relatively immune to thermal overheating and, thus, stable during an ESD event. This immunity is achieved by employing a heat sink region adjacent to a polysilicon emitter within a distance of less than 2 microns. Such a heat sink region provides temporal heat capacity to locally dissipate the heat generated during an ESD event. Bipolar transistor-based ESD protection structures according to the present invention include a semiconductor substrate and a bipolar transistor in and on the semiconductor. The bipolar transistor includes a base region, a collection region and a polysilicon emitter. The bipolar transistor-based ESD protection structures also include a heat sink region disposed above the semiconductor substrate adjacent to the polysilicon emitter. The heat sink region is formed of a material with a heat capacity and/or thermal conductivity that is greater than the heat capacity and/or thermal conductivity of the material (typically an SiO2-based material) which conventionally covers the ESD protection structures. The heat sink region can be formed, for example, of metal and/or polysilicon. In one embodiment, the heat sink region is floating and disposed adjacent to the polysilicon. In another embodiment, the heat sink region is integrated with a metal contact to the polysilicon emitter, thereby making the otherwise conventional metal contact bulkier. By locally providing extra heat capacity (i.e., a floating heat sink region or a bulky metal contact), heat is dissipated during an ESD event, thereby increasing ESD protection capability and reliability.
摘要翻译：用于双相或BiCMOS IC的ESD保护结构，其相对地不受热过热的影响，因此在ESD事件期间是稳定的。通过在小于2微米的距离内使用与多晶硅发射器相邻的散热区来实现该抗扰度。这样的散热区域提供时间热容量以局部消散在ESD事件期间产生的热量。根据本发明的基于双极晶体管的ESD保护结构包括在半导体中和半导体上的半导体衬底和双极晶体管。双极晶体管包括基极区域，收集区域和多晶硅发射极。基于双极晶体管的ESD保护结构还包括设置在与多晶硅发射极相邻的半导体衬底之上的散热片区域。散热区域由热容量和/或导热系数大于材料（通常为SiO 2基材料）的热容量和/或热导率（通常覆盖ESD保护结构）的材料形成。散热区域可以由例如金属和/或多晶硅形成。在一个实施例中，散热区域是浮置的并且与多晶硅相邻地设置。在另一个实施例中，散热片区域与金属接触件一体化到多晶硅发射器，从而使常规的金属接触体积更大。通过局部地提供额外的热容量（即，浮动散热区域或庞大的金属接触），在ESD事件期间散热，从而增加ESD保护能力和可靠性。

83. 发明授权

US06720624B1 LVTSCR-like structure with internal emitter injection control 有权
标题翻译：具有内部发射体注入控制的LVTSCR样结构
公开(公告)号：US06720624B1
公开(公告)日：2004-04-13
申请号：US10210942
申请日：2002-08-02
申请人： Vladislav Vashchenko , Ann Concannon , Peter J. Hopper , Marcel ter Beek
发明人： Vladislav Vashchenko , Ann Concannon , Peter J. Hopper , Marcel ter Beek
IPC分类号： H01L2362
CPC分类号： H01L27/0262 , H01L29/87
摘要： In an ESD protection device using a LVTSCR-like structure, the holding voltage is increased by placing the p+ emitter outside the drain of the device, thereby retarding the injection of holes from the p+ emitter. The p+ emitter may be implemented in one or more emitter regions formed outside the drain. The drain is split between a n+ drain and a floating n+ region near the gate to avoid excessive avalanche injection and resultant local overheating.
摘要翻译：在使用类似LVTSCR的结构的ESD保护器件中，通过将p +发射极放置在器件的漏极之外，从而延长了p +发射极的空穴注入，从而提高了保持电压。 p +发射极可以在形成在漏极外部的一个或多个发射极区域中实现。漏极在栅极附近的n +漏极和浮动n +区域之间分开，以避免过度的雪崩注入和局部过热。

84. 发明授权

US08497526B2 Low triggering voltage DIAC structure 有权
标题翻译：低触发电压DIAC结构
公开(公告)号：US08497526B2
公开(公告)日：2013-07-30
申请号：US12925277
申请日：2010-10-18
申请人： Vladislav Vashchenko , Antonio Gallerano , Peter J. Hopper
发明人： Vladislav Vashchenko , Antonio Gallerano , Peter J. Hopper
IPC分类号： H01L29/66
CPC分类号： H01L29/87 , H01L27/0262 , H01L29/66121
摘要： In a DIAC-like device that includes an n+ and a p+ region connected to the high voltage node, and an n+ and a p+ region connected to the low voltage node, at least two MOS devices are formed between the n+ and p+ region connected to the high voltage node, and the n+ and p+ region connected to the low voltage node.
摘要翻译：在包括连接到高压节点的n +和p +区以及连接到低电压节点的n +和p +区的DIAC类器件中，在连接到低电压节点的n +和p +区之间形成至少两个MOS器件高压节点，连接到低电压节点的n +和p +区域。

85. 发明授权

US08212320B1 High voltage tolerant ESD device 有权
标题翻译：高耐压ESD器件
公开(公告)号：US08212320B1
公开(公告)日：2012-07-03
申请号：US11375831
申请日：2006-03-15
申请人： Vladislav Vashchenko , Peter J. Hopper
发明人： Vladislav Vashchenko , Peter J. Hopper
IPC分类号： H01L23/62
CPC分类号： H01L27/0259
摘要： In an ESD clamp formed in a SOI process, voltage tolerance is increased by introducing multiple blocking junctions between the anode and cathode of the device.
摘要翻译：在SOI工艺中形成的ESD钳位中，通过在器件的阳极和阴极之间引入多个阻挡接头来增加电压容差。

86. 发明授权

US07911869B1 Fuse-type memory cells based on irreversible snapback device 有权
标题翻译：基于不可逆快速恢复装置的保险丝型存储单元
公开(公告)号：US07911869B1
公开(公告)日：2011-03-22
申请号：US11198688
申请日：2005-08-05
申请人： Vladislav Vashchenko , Peter J. Hopper , Yuri Mirgorodski
发明人： Vladislav Vashchenko , Peter J. Hopper , Yuri Mirgorodski
IPC分类号： G11C17/14 , G11C17/18 , G11C17/08 , H01H37/76 , H01H85/00
CPC分类号： G11C17/16 , G11C17/18
摘要： In a programmable circuit making use of fuse cells, a snapback NMOS or NPN transistor or SCR without reversible snapback capability is used as an anti-fuse, and programming comprises biasing the control electrode of the transistor to cause the transistor to go into snapback mode.
摘要翻译：在使用熔丝单元的可编程电路中，使用不具有可逆快速恢复能力的快速恢复NMOS或NPN晶体管或SCR作为反熔丝，并且编程包括偏置晶体管的控制电极以使晶体管进入快速恢复模式。

87. 发明授权

US07910950B1 High voltage ESD LDMOS-SCR with gate reference voltage 有权
标题翻译：具有栅极参考电压的高压ESD LDMOS-SCR
公开(公告)号：US07910950B1
公开(公告)日：2011-03-22
申请号：US11403599
申请日：2006-04-13
申请人： Vladislav Vashchenko , Peter J. Hopper
发明人： Vladislav Vashchenko , Peter J. Hopper
IPC分类号： H01L29/66
CPC分类号： H01L27/0266 , H01L29/063 , H01L29/7428 , H01L29/7436 , H01L29/749
摘要： In an LDMOS-SCR ESD protection structure gate voltage of an ESD protection LDSCR is defined by connecting the gate to the source of a reference LDSCR. The reference LDSCR is implemented as a self-triggering device in which the snapback drain-source voltage (avalanche breakdown voltage) is controlled to be lower than that for the major LDSCR by adjusting the RESURF layer-composite overlap for the reference LDSCR to be different to that of the major LDSCR.
摘要翻译：在LDMOS-SCR ESD保护结构中，通过将栅极连接到参考LDSCR的源极来定义ESD保护LDSCR的栅极电压。参考LDSCR被实现为自触发装置，其中通过将参考LDSCR的RESURF层 - 复合重叠调整为不同，将回跳式漏极 - 源极电压（雪崩击穿电压）控制为低于主LDSCR的电压到LDSCR主要的。

88. 发明申请

US20100295638A1 METHOD OF SWITCHING A MAGNETIC MEMS SWITCH 有权
标题翻译：切换磁性MEMS开关的方法
公开(公告)号：US20100295638A1
公开(公告)日：2010-11-25
申请号：US12852743
申请日：2010-08-09
申请人： Peter J. Hopper , Trevor Niblock , Peter Johnson , Vladislav Vashchenko
发明人： Peter J. Hopper , Trevor Niblock , Peter Johnson , Vladislav Vashchenko
IPC分类号： H01H51/22 , H01H36/00
CPC分类号： H02M3/34
摘要： A MEMS magnetic flux switch is fabricated as a ferromagnetic core. The core includes a center cantilever that is fabricated as a free beam that can oscillate at a resonant frequency that is determined by its mechanical and material properties. The center cantilever is moved by impulses applied by an associated motion oscillator, which can be magnetic or electric actuators.
摘要翻译： MEMS磁通开关被制造为铁磁芯。芯包括中心悬臂，其被制造为可以以其机械和材料性质确定的共振频率振荡的自由梁。中心悬臂由相关运动振荡器施加的脉冲移动，运动振荡器可以是磁性或电动执行器。

89. 发明授权

US07514751B2 SiGe DIAC ESD protection structure 有权
公开(公告)号：US07514751B2
公开(公告)日：2009-04-07
申请号：US11890097
申请日：2007-08-02
申请人： Vladislav Vashchenko , Peter J. Hopper
发明人： Vladislav Vashchenko , Peter J. Hopper
IPC分类号： H01L23/62
CPC分类号： H01L27/0259
摘要： A diode for alternating current (DIAC) electrostatic discharge (ESD) protection circuit is formed in a silicon germanium (SiGe) hetrojunction bipolar transistor (HBT) process that utilizes a very thin collector region. ESD protection for a pair of to-be-protected pads is provided by utilizing the base structures and the emitter structures of the SiGe transistors.

90. 发明授权

US07193251B1 ESD protection cluster and method of providing multi-port ESD protection 有权
标题翻译： ESD保护集群和提供多端口ESD保护的方法
公开(公告)号：US07193251B1
公开(公告)日：2007-03-20
申请号：US10339192
申请日：2003-01-09
申请人： Vladislav Vashchenko , Ann Concannon , Peter J Hopper , Marcel ter Beek
发明人： Vladislav Vashchenko , Ann Concannon , Peter J Hopper , Marcel ter Beek
IPC分类号： H01L29/74
CPC分类号： H01L27/0262
摘要： In multiple port chip circuit, an ESD protection circuit and method of protecting the ports of the multiple port circuit, includes providing a plurality of bi-directional snapback devices such as DIACs and connecting only one electrode to ground while connecting the other electrodes to the ports that are to be protected.
摘要翻译：在多端口芯片电路中，ESD保护电路和保护多端口电路端口的方法包括：提供多个双向快速恢复装置，例如DIAC，并且仅将一个电极连接到地，同时将其它电极连接到端口那些被保护。

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