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81. 发明授权

US07506113B2 Method for configuring compensation 有权
标题翻译：补偿方式
公开(公告)号：US07506113B2
公开(公告)日：2009-03-17
申请号：US11458996
申请日：2006-07-20
申请人： Yan Li
发明人： Yan Li
IPC分类号： G06F12/00 , G11C11/34 , G11C16/04 , G11C16/06
CPC分类号： G11C16/0483 , G11C11/5628 , G11C11/5642 , G11C16/3418 , G11C16/3427 , G11C16/3454
摘要： Shifts in the apparent charge stored on a floating gate (or other charge storing element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other adjacent charge storing elements). To compensate for this coupling, the read or programming process for a given memory cell can take into account the programmed state of an adjacent memory cell. To determine whether compensation is needed, a process can be performed that includes sensing information about the programmed state of an adjacent memory cell (e.g., on an adjacent bit line or other location).
摘要翻译：存在于非易失性存储单元的浮动栅极（或其他电荷存储元件）上的表观电荷的变化可能发生，因为基于存储在相邻浮动栅极（或其它相邻电荷存储元件）中的电荷的电场的耦合）。为了补偿该耦合，给定存储器单元的读取或编程过程可以考虑相邻存储器单元的编程状态。为了确定是否需要补偿，可以执行包括感测关于相邻存储器单元的编程状态的信息（例如，在相邻位线或其他位置上）的处理。

82. 发明授权

US07492634B2 Method for programming of multi-state non-volatile memory using smart verify 有权
标题翻译：使用智能验证来编程多状态非易失性存储器的方法
公开(公告)号：US07492634B2
公开(公告)日：2009-02-17
申请号：US11862157
申请日：2007-09-26
申请人： Yan Li , Long Pham
发明人： Yan Li , Long Pham
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/12 , G11C16/3454 , G11C16/3459 , G11C2211/5621
摘要： In a non-volatile memory, the initiation of program verification is adaptively set so that programming time is decreased. In one approach, non-volatile storage elements are programmed based on a lower page of data to have a voltage threshold (VTH) that falls within a first VTH distribution or a higher, intermediate VTH distribution. Subsequently, the non-volatile storage elements with the first VTH distribution either remain there, or are programmed to a second VTH distribution, based on an upper page of data. The non-volatile storage elements with the intermediate VTH distribution are programmed to third and fourth VTH distributions. The non-volatile storage elements being programmed to the third VTH distribution are specially identified and tracked. Verification of the non-volatile storage elements being programmed to the fourth VTH distribution is initiated after one of the identified non-volatile storage elements transitions to the third VTH distribution from the intermediate VTH distribution.
摘要翻译：在非易失性存储器中，自适应地设定程序验证的启动，从而减少编程时间。在一种方法中，非易失性存储元件基于较低数据页被编程以具有落在第一VTH分布或更高的中间VTH分布内的电压阈值（VTH）。随后，具有第一VTH分配的非易失性存储元件基于数据的上部页面保留在那里，或被编程到第二VTH分发。具有中间VTH分布的非易失性存储元件被编程为第三和第四VTH分布。被编程到第三VTH分配的非易失性存储元件被特别地识别和跟踪。被编程到第四VTH分布的非易失性存储元件的验证在所识别的非易失性存储元件中的一个从中间VTH分布转换到第三VTH分布之后启动。

83. 发明申请

US20090030188A1 ACTIVATABLE RECOMBINANT NEUROTOXINS 审中-公开
公开(公告)号：US20090030188A1
公开(公告)日：2009-01-29
申请号：US12195985
申请日：2008-08-21
申请人： J. Oliver Dolly , Yan Li , Kuo Chion Chan
发明人： J. Oliver Dolly , Yan Li , Kuo Chion Chan
IPC分类号： C07K19/00 , C07K16/46
CPC分类号： C07K14/33 , A61K38/00 , C12N9/52 , Y02A50/469
摘要： Compositions comprising activatable recombinant neurotoxins and polypeptides derived therefrom. The invention also comprises nucleic acids encoding such polypeptides, and methods of making such polypeptides and nucleic acids.

84. 发明申请

US20090005114A1 Intelligent shortcut multi-channel reminding method and means for portable device 审中-公开
标题翻译：智能快捷方式多通道提醒方式和手段便携式设备
公开(公告)号：US20090005114A1
公开(公告)日：2009-01-01
申请号：US12215779
申请日：2008-06-30
申请人： Qianying Wang , Wen Wang , Yan Li , Xiaoli Du
发明人： Qianying Wang , Wen Wang , Yan Li , Xiaoli Du
IPC分类号： H04M1/00
CPC分类号： H04M1/72566 , H04M1/72552 , H04M2250/60
摘要： The present invention discloses an intelligent shortcut multi-channel reminding method for a portable device, which provides a to-be-processed field for a communication record to be processed when attaching a to-be-processed tag to the communication record, and stores the to-be-processed field together with the communication record. The present invention further discloses an intelligent shortcut multi-channel reminding means for a portable device based on the method, which comprises a to-be-processed module including more than one to-be-processed sub-modules which share a storage space with communication functional modules and serve to view, add, modify and delete to-be-processed fields; at least one shortcut channel which enables information delivery between each to-be-processed sub-module and the corresponding communication functional module; a reminding module which connects to each of the to-be-processed sub-modules and pops up a reminding interface according to the setting of to-be-processed tags. The present invention has advantages of simple operation, no limitation in terms of use environment for various communication function reminding, no reliance on any operator and no additional fee.
摘要翻译：本发明公开了一种用于便携式设备的智能快捷方式多通道提醒方法，该方法为将要处理的标签附加到通信记录时提供要处理的通信记录的待处理字段，并且存储将被处理的字段与通信记录一起。本发明还公开了一种基于该方法的用于便携式设备的智能快捷方式多信道提醒装置，其包括一个待处理模块，该模块包括多个待处理的子模块，该子模块与通信共享存储空间功能模块，用于查看，添加，修改和删除要处理的字段; 至少一个快捷通道，其使得能够在每个待处理子模块和相应的通信功能模块之间进行信息传递; 提醒模块，其连接到每个待处理子模块，并根据待处理标签的设置弹出提醒界面。本发明具有操作简单的优点，对于各种通信功能提醒的使用环境没有限制，不依赖于任何操作者并且不需要额外的费用。

85. 发明授权

US07471575B2 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 有权
标题翻译：非易失性存储器和具有用于读/写电路的集合的共享处理的方法
公开(公告)号：US07471575B2
公开(公告)日：2008-12-30
申请号：US11781917
申请日：2007-07-23
申请人： Raul-Adrian Cernea , Yan Li , Shahzad Khalid , Siu Lung Chan
发明人： Raul-Adrian Cernea , Yan Li , Shahzad Khalid , Siu Lung Chan
IPC分类号： G11C7/10
CPC分类号： G11C16/26 , G11C11/5642
摘要： A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has an architecture that reduces redundancy in the multiple read/write circuits to a minimum. The multiple read/write circuits are organized into a bank of similar stacks of components. Redundant circuits such as a processor for processing data among stacks each associated with multiple memory cells are factored out. The processor is implemented with an input logic, a latch and an output logic. The input logic can transform the data received from either the sense amplifier or the data latches. The output logic further processes the transformed data to send to either the sense amplifier or the data latches or to a controller. This provides an infrastructure with maximum versatility and a minimum of components for sophisticated processing of the data sensed and the data to be input or output.
摘要翻译：能够并行地读取和写入具有多个读/写电路的大量存储单元的非易失性存储器件具有将多个读/写电路中的冗余降至最低的架构。多个读/写电路被组织成一组类似的组件堆叠。考虑冗余电路，例如用于处理每个与多个存储器单元相关联的堆栈之间的数据的处理器。处理器由输入逻辑，锁存器和输出逻辑实现。输入逻辑可以转换从读出放大器或数据锁存器接收到的数据。输出逻辑进一步处理变换的数据以发送到读出放大器或数据锁存器或控制器。这提供了具有最大通用性的基础设施和用于对所感测的数据进行复杂处理和要输入或输出的数据的最少组件。

86. 发明申请

US20080287492A1 Alkylpyridyl Quinolines as Nk3 Receptor Modulators 审中-公开
标题翻译：烷基吡啶喹啉作为Nk3受体调节剂
公开(公告)号：US20080287492A1
公开(公告)日：2008-11-20
申请号：US12063146
申请日：2006-08-09
申请人： Jeffrey S. Albert , Cristobal Alhambra , James Kang , Gerard M. Koether , Thomas R. Simpson , James Woods , Yan Li
发明人： Jeffrey S. Albert , Cristobal Alhambra , James Kang , Gerard M. Koether , Thomas R. Simpson , James Woods , Yan Li
IPC分类号： A61K31/4709 , C07D401/06 , A61P11/00 , A61P25/00 , A61P25/18 , A61P25/22 , A61P25/24 , A61P25/28 , A61P29/00 , A61P35/00
CPC分类号： C07D401/06
摘要： Compounds of Formula I wherein R1, A, R2, R3, R4, R5, n, m and p are as described in the specification, pharmaceutically-acceptable salts, methods of making, pharmaceutical compositions containing and methods for using the same.
摘要翻译：式Ⅰ的化合物，其中R 1，A，R 2，R 3，R 4，R 4， > 5，n，m和p如说明书中所述，药学上可接受的盐，制备方法，药物组合物和其使用方法。

87. 发明授权

US07450426B2 Systems utilizing variable program voltage increment values in non-volatile memory program operations 有权
标题翻译：在非易失性存储器程序操作中利用可变程序电压增量值的系统
公开(公告)号：US07450426B2
公开(公告)日：2008-11-11
申请号：US11548267
申请日：2006-10-10
申请人： Yan Li , Fanglin Zhang , Toru Miwa , Farookh Moogat
发明人： Yan Li , Fanglin Zhang , Toru Miwa , Farookh Moogat
IPC分类号： G11C11/34
CPC分类号： G11C16/12 , G11C11/5628 , G11C16/0483 , G11C16/3481
摘要： The lowest programmed state in multi-state non-volatile flash memory devices can suffer from an increased level of bit line to bit line capacitive charge coupling when compared with other states. Program voltages applied to memory cells as increasing voltage pulses can be incremented using smaller values when programming memory cells to the lowest programmable state. Smaller increments in the applied voltage allow for greater precision and a narrower threshold voltage distribution to compensate for the disproportionate charge coupling experienced by cells programmed to this state. Smaller increment values can be used when switching from lower page to upper page programming in some implementations. In a pipelined programming architecture where cells forming a physical page store two logical pages of data and programming for one logical page begins before receiving data for the other logical page, the increment value can be increased when switching from programming the first logical page to programming both pages concurrently.
摘要翻译：与其他状态相比，多状态非易失性闪存器件中的最低编程状态可能会受到位线到位线电容电荷耦合的增加的影响。当将存储器单元编程到最低可编程状态时，可以使用较小的值将增加的电压脉冲施加到存储单元的编程电压递增。施加电压的较小增量允许更高的精度和更窄的阈值电压分布，以补偿编程到该状态的单元所经历的不成比例的电荷耦合。在一些实现中从较低页切换到上页编程时，可以使用较小的增量值。在流水线编程架构中，形成物理页面的单元存储两个逻辑页面的数据和一个逻辑页面的编程，在接收另一个逻辑页面的数据之前开始，当从第一个逻辑页面的编程切换到编程时，增量值可以增加同时页面。

88. 发明授权

US07447094B2 Method for power-saving multi-pass sensing in non-volatile memory 有权
标题翻译：非易失性存储器中省电多通道感测的方法
公开(公告)号：US07447094B2
公开(公告)日：2008-11-04
申请号：US11322427
申请日：2005-12-29
申请人： Shou-Chang Tsao , Yan Li
发明人： Shou-Chang Tsao , Yan Li
IPC分类号： G11C7/00
CPC分类号： G11C11/5642 , G11C7/08 , G11C7/12 , G11C16/0483 , G11C16/24 , G11C16/28 , G11C2207/005 , G11C2211/5631
摘要： Power-saving techniques are employed in sensing a group of non-volatile memory cells in parallel. One technique is that the coupling of the memory cells to their bit lines is delayed during a precharge operation in order to reduce the cells'currents working against the precharge. Another technique is that a power-consuming precharge period is minimized by preemptively starting the sensing in a multi-pass sensing operation. High current cells not detected as a result of the premature sensing will still be able to be detected in a subsequent pass.
摘要翻译：同时采用省电技术来感测一组非易失性存储单元。一种技术是在预充电操作期间，存储器单元与其位线的耦合被延迟，以便减小单元电流对预充电的作用。另一种技术是通过在多遍感测操作中预先启动感测来最大限度地减少功耗的预充电周期。作为过早感测的结果，未检测到的高电流电流仍然能够在随后的通过中被检测。

89. 发明申请

US20080259954A1 METHOD AND SYSTEMS FOR BANDWIDTH SCHEDULING AND PATH COMPUTATION FOR CONNECTION-ORIENTED NETWORKS 有权
标题翻译：用于面向连接的网络的带宽调度和路径计算的方法和系统
公开(公告)号：US20080259954A1
公开(公告)日：2008-10-23
申请号：US11738464
申请日：2007-04-20
申请人： Sartaj Sahni , Nageswara Sirikonda Venkata Rao , Sanjay Ranka , Yan Li , Eun-Sung Jung , Narayana Kamath
发明人： Sartaj Sahni , Nageswara Sirikonda Venkata Rao , Sanjay Ranka , Yan Li , Eun-Sung Jung , Narayana Kamath
IPC分类号： H04J3/16 , H04J3/22
CPC分类号： H04L41/0896 , H04L47/70 , H04L47/724 , H04L47/781 , H04L47/805 , H04L47/826
摘要： A connection-oriented network includes a control server. The control server receives requests to establish and utilize dedicated channels in the network. The control server utilizes various scheduling methods and algorithms to determine channels based on the request's requirements and resources of the network. For example, the control server may determine a channel based on: (i) a specified bandwidth in a specified time slot, (ii) highest available bandwidth in a specified time slot, (iii) earliest available time with a specified bandwidth and duration, and (iv) all available time slots with a specified bandwidth and duration.
摘要翻译：面向连接的网络包括控制服务器。控制服务器接收到建立和利用网络中的专用信道的请求。控制服务器利用各种调度方法和算法，根据请求的要求和网络的资源来确定信道。例如，控制服务器可以基于以下方式确定信道：（i）指定时隙中的指定带宽，（ii）指定时隙中的最高可用带宽，（iii）具有指定带宽和持续时间的最早可用时间，和（iv）具有指定带宽和持续时间的所有可用时隙。

90. 发明授权

US07441175B2 Turbo product code implementation and decoding termination method and apparatus 有权
标题翻译： Turbo产品代码实现和解码终止方法和装置
公开(公告)号：US07441175B2
公开(公告)日：2008-10-21
申请号：US10799232
申请日：2004-03-12
申请人： Nan-Hsiung Yeh , Yan Li
发明人： Nan-Hsiung Yeh , Yan Li
IPC分类号： H03M13/00
CPC分类号： G11B20/1866 , G11B20/10379 , G11B20/1833 , G11B2020/1843 , G11B2020/1853 , G11B2020/1856 , G11B2020/1863 , G11B2220/2516 , H03M13/098 , H03M13/2963 , H03M13/2975 , H03M13/3994 , H03M13/4138 , H03M13/6325 , H03M13/6343
摘要： A method of decoding a turbo product code (TPC) code word comprises iteratively decoding the TPC code word using an iterative decoder. The method further comprises terminating the iterative decoding when the TPC code word satisfies a cyclic redundancy check (CRC). The TPC code word can include a plurality of square code blocks of user data, with CRC data bits appended to one of the plurality of code blocks instead of replacing user data within the code blocks. Apparatus for implementing the method are also provided.
摘要翻译：解码涡轮乘积代码（TPC）码字的方法包括使用迭代解码器对TPC码字进行迭代解码。该方法还包括当TPC码字满足循环冗余校验（CRC）时终止迭代解码。 TPC码字可以包括多个用户数据的平方码块，其中CRC数据位附加到多个码块之一，而不是代替码块内的用户数据。还提供了用于实现该方法的装置。

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