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81. 发明申请

US20090229850A1 Cable For High Speed Data Communications 审中-公开
标题翻译：电缆用于高速数据通信
公开(公告)号：US20090229850A1
公开(公告)日：2009-09-17
申请号：US12045899
申请日：2008-03-11
申请人： Moises Cases , Bhyrav M. Mutnury , Bruce J. Wilkie
发明人： Moises Cases , Bhyrav M. Mutnury , Bruce J. Wilkie
IPC分类号： H01B11/00 , H01B13/26
CPC分类号： H01B11/20 , H01B11/183
摘要： A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a wrap rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, an inner surface of the conductive shield material roughened to reduce non-linear attenuation of signals transmitted through the conductive shield material. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.
摘要翻译：公开了一种用于高速数据通信的电缆和用于制造这种电缆的方法，该电缆包括由第一电介质层包围的第一内部导体和由第二电介质层包围的第二内部导体。该电缆还包括导电屏蔽材料，该导电屏蔽材料围绕内导体和电介质层沿着纵向轴线并围绕纵向轴线缠绕在旋转方向上，包括导电屏蔽材料沿着和围绕纵向轴线重叠的包裹物，内表面导电屏蔽材料变粗糙，以减少通过导电屏蔽材料传输的信号的非线性衰减。在电缆上传输信号，包括传输特征为电缆7-9千兆赫兹频率的平衡信号。

82. 发明申请

US20090091345A1 STRUCTURE FOR PROVIDING A DUPLICATE TEST SIGNAL OF AN OUTPUT SIGNAL UNDER TEST IN AN INTEGRATED CIRCUIT 审中-公开
标题翻译：在集成电路测试中提供输出信号的双重测试信号的结构
公开(公告)号：US20090091345A1
公开(公告)日：2009-04-09
申请号：US12113386
申请日：2008-05-01
申请人： Moises Cases , Bhyrav M. Mutnury , Nam H. Pham
发明人： Moises Cases , Bhyrav M. Mutnury , Nam H. Pham
IPC分类号： G01R31/02
CPC分类号： G01R31/31926
摘要： A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure provides a duplicate test signal of an output signal under test in an integrated circuit including selecting through a multiplexer an output signal under test, the output signal under test selected from a plurality of output signals of the integrated circuit; providing through the multiplexer a duplicate signal of the selected output signal under test; adding a high impedance load on the duplicate signal thereby reducing the amplitude of the duplicate signal; and amplifying the reduced duplicate signal thereby creating the duplicate test signal.
摘要翻译：提供了体现在用于设计，制造和/或测试设计的机器可读存储介质中的设计结构。该设计结构在集成电路中提供被测输出信号的重复测试信号，包括通过多路复用器选择被测信号，从集成电路的多个输出信号中选出的被测输出信号; 通过多路复用器提供被测输出信号的重复信号; 在重复信号上增加高阻抗负载，从而减小重复信号的幅度; 并放大缩小的重复信号从而产生重复测试信号。

83. 发明申请

US20090049341A1 Method for Performing Memory Diagnostics Using a Programmable Diagnostic Memory Module 失效
标题翻译：使用可编程诊断内存模块执行内存诊断的方法
公开(公告)号：US20090049341A1
公开(公告)日：2009-02-19
申请号：US11840498
申请日：2007-08-17
申请人： Moises Cases , Daniel Mark Dreps , Bhyrav M. Mutnury , Nam H. Pham , Daniel N. De Araujo
发明人： Moises Cases , Daniel Mark Dreps , Bhyrav M. Mutnury , Nam H. Pham , Daniel N. De Araujo
IPC分类号： G06F11/26 , G06F9/455
CPC分类号： G06F11/24
摘要： A method for performing memory diagnostics using a programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.
摘要翻译：使用可编程诊断存储器模块执行存储器诊断的方法提供了存储器控制器和存储器子系统设计的增强的可测试性。可编程诊断存储器模块包括用于与外部诊断系统通信的接口，并且该接口用于将命令传送到存储器模块以改变存储器模块的各种行为。改变的行为可能是改变被写入存储器模块的数据流，以模拟错误，改变存储器模块信号的定时和/或加载，下载由存储器模块内的处理器核心执行的程序，改变驱动器的输出强度存储器模块的信号和在模拟域中的操作，在存储器模块的端子处发出信号，例如在与存储器模块的电源连接上注入噪声。存储器模块可以模拟多个可选择的存储器模块类型，并且可以包括完整的存储阵列以提供标准存储器模块操作。

84. 发明申请

US20090021264A1 METHOD AND APPARATUS FOR REPEATABLE DRIVE STRENGTH ASSESSMENTS OF HIGH SPEED MEMORY DIMMS 有权
标题翻译：用于高速记忆体可重复驱动强度评估的方法和装置
公开(公告)号：US20090021264A1
公开(公告)日：2009-01-22
申请号：US11780505
申请日：2007-07-20
申请人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
IPC分类号： G01R31/02 , G06F11/00
CPC分类号： G01R31/2815 , G01R31/304 , G11C29/02 , G11C29/022 , G11C29/56 , G11C2029/5602
摘要： The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided.
摘要翻译：本发明通过计算由诸如偶极天线的装置收集的辐射场的频率内容来评估存储器（DIMM）强度。辐射场由加速电荷产生，这是压摆率或DIMM强度的函数。辐射功率与驱动位的频率成正比。通过将辐射场与近场或存储场分离，DIMM强度内容与其他功能性DIMM问题（例如tRCD延迟，刷新周期，寻址模式等）隔离。通过检查辐射功率，现有技术的缺点，例如通过探测DIMM的触点。

85. 发明授权

US07474117B1 Bi-directional universal serial bus booster circuit 失效
标题翻译：双向通用串行总线升压电路
公开(公告)号：US07474117B1
公开(公告)日：2009-01-06
申请号：US12127165
申请日：2008-05-27
申请人： Justin P. Bandholz , Moises Cases , Bradley D. Herman , Erdem Matoglu , Bhyrav M. Mutnury , Thomas D. Pahel , Pravin S. Patel , Nam H. Pham , Christopher C. West
发明人： Justin P. Bandholz , Moises Cases , Bradley D. Herman , Erdem Matoglu , Bhyrav M. Mutnury , Thomas D. Pahel , Pravin S. Patel , Nam H. Pham , Christopher C. West
IPC分类号： H03K17/16
CPC分类号： G06F13/4072
摘要： A method of transmitting a signal on a bi-directional universal serial bus (“USB”) circuit for boosting a signal on a USB bus disclosed. The circuit includes a first stage inverting buffer coupled to a second stage inverting buffer to form a non-inverting buffer circuit. A high pass filter is coupled in series with the non-inverting buffer circuit to provide AC coupling to the USB bus and to allow fast signal edges through the circuit. The booster circuit is arranged to improve signal quality over a USB bus to allow additional USB devices and longer USB busses to be utilized.
摘要翻译：一种在双向通用串行总线（“USB”）电路上传输信号以提升USB总线上的信号的方法。电路包括耦合到第二级反相缓冲器以形成非反相缓冲电路的第一级反相缓冲器。高通滤波器与非反相缓冲电路串联耦合以提供与USB总线的AC耦合并允许通过电路的快速信号边缘。升压电路被设置为通过USB总线提高信号质量，以允许使用附加的USB设备和更长的USB总线。

86. 发明授权

US07443180B2 On-chip probing apparatus 失效
标题翻译：片上探测装置
公开(公告)号：US07443180B2
公开(公告)日：2008-10-28
申请号：US11567449
申请日：2006-12-06
申请人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： G01R31/02 , G01R31/26
CPC分类号： G01R31/31723 , G01R31/2884 , G01R31/31926
摘要： The invention is directed to an on-chip probing apparatus. In accordance with an embodiment of the present invention, the on-chip probing apparatus includes: a plurality of switches on a chip; a plurality of externally accessible probe points on the chip; and a multiplexer for controlling the plurality of switches to selectively couple an output signal of the chip to one of the plurality of probe points.
摘要翻译：本发明涉及片上探测装置。根据本发明的实施例，片上探测装置包括：芯片上的多个开关; 芯片上的多个外部可访问的探针点; 以及多路复用器，用于控制所述多个开关以选择性地将所述芯片的输出信号耦合到所述多个探针点中的一个。

87. 发明申请

US20080258755A1 Noise Reduction Among Conductors 审中-公开
标题翻译：导体之间的降噪
公开(公告)号：US20080258755A1
公开(公告)日：2008-10-23
申请号：US11737355
申请日：2007-04-19
申请人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Nam H. Pham
IPC分类号： H03K17/16
CPC分类号： H04B3/32 , H03K2005/00019 , H03K2005/00156
摘要： Noise reduction among conductors, the conductors disposed adjacent to one another, the conductors characterized as two or more aggressor conductors and one or more victim conductors, a least two of the aggressor conductors driven with at least two signals that induce unwanted crosstalk upon at least one of the victim conductors, a programmable delay device disposed in a signal path of each of the at least two signals that induce unwanted crosstalk, including programming a delay period into each programmable delay device; receiving, simultaneously at the programmable delay devices, the at least two signals that induce unwanted crosstalk; and transmitting, on two aggressor conductors, the at least two signals that induce unwanted crosstalk, with the at least two signals separated in time by the delay period.
摘要翻译：导体之间的噪声降低，导体彼此相邻布置，导体表征为两个或多个侵略导体和一个或多个受害导体，至少两个侵略体导体用至少两个信号驱动，这些信号在至少一个所述可编程延迟装置设置在所述至少两个信号中的每一个的信号路径中，所述至少两个信号引起不需要的串扰，包括将延迟周期编程到每个可编程延迟装置中; 同时在可编程延迟装置处接收至少两个引起不想要的串扰的信号; 以及在两个侵略者导体上传输引起不想要的串扰的至少两个信号，其中至少两个信号在时间上与延迟周期分开。

88. 发明申请

US20110061898A1 REDUCING CROSS-TALK IN HIGH SPEED CERAMIC PACKAGES USING SELECTIVELY-WIDENED MESH 审中-公开
标题翻译：使用选择性更宽的MESH降低高速陶瓷包装中的交叉点
公开(公告)号：US20110061898A1
公开(公告)日：2011-03-17
申请号：US12560133
申请日：2009-09-15
申请人： Bhyrav Mutnury , Jinwoo Choi , Moises Cases , Nanju Na
发明人： Bhyrav Mutnury , Jinwoo Choi , Moises Cases , Nanju Na
IPC分类号： H05K1/00 , G06F17/50 , H05K3/00
CPC分类号： H05K1/0224 , G06F17/5036 , G06F17/5081 , G06F2217/82 , H05K3/4629 , H05K2201/09681 , H05K2201/09727 , H05K2201/09972 , Y10T29/49155
摘要： One embodiment of the invention provides a multi-layered ceramic package. The ceramic package includes a signal layer having a plurality of signal lines and a mesh reference layer parallel to the signal layer. The mesh reference layer includes a plurality of intersecting reference lines of varying reference-line width in the plane of the mesh layer. The mesh reference lines may be widened in locations of probable signal cross-talk. Other embodiments of the invention include software for optimizing a ceramic package design by selectively widening mesh lines in regions of probable cross-talk, and systems for designing and manufacturing such a ceramic package.
摘要翻译：本发明的一个实施例提供一种多层陶瓷封装。陶瓷封装包括具有多个信号线的信号层和与信号层平行的网格参考层。网格参考层包括在网格层的平面中改变参考线宽度的多个相交参考线。网格参考线可能在可能的信号串扰的位置加宽。本发明的其它实施例包括通过在可能的串扰区域中选择性地加宽网格线来优化陶瓷封装设计的软件，以及用于设计和制造这种陶瓷封装的系统。

89. 发明授权

US07999185B2 Transmission cable with spirally wrapped shielding 有权
标题翻译：传输电缆采用螺旋缠绕屏蔽
公开(公告)号：US07999185B2
公开(公告)日：2011-08-16
申请号：US12468327
申请日：2009-05-19
申请人： Moises Cases , Jinwoo Choi , Bhyrav Murthy Mutnury
发明人： Moises Cases , Jinwoo Choi , Bhyrav Murthy Mutnury
IPC分类号： H01B7/00
CPC分类号： H01B11/203 , H01B7/0823 , H01B11/1025 , H01B11/1091
摘要： Embodiments of the invention are directed to transmission cables, and particularly to twinax cables, for transmitting digital data and other information between components in a data processing environment. One embodiment of the invention is directed to an information transmission cable that comprises first and second signal carrying conductors of specified length, each of the signal carrying conductors being disposed to carry information signals and having a longitudinal axis. The embodiment further includes an insulating structure comprising an amount of specified dielectric insulation material, the insulating structure being positioned to surround the first and second signal carrying conductors along their respective lengths, and acting to maintain the first and second signal conductors in spaced apart parallel relationship with each other. A first drain conductor is positioned proximate to the first signal carrying conductor in spaced apart parallel relationship, and is further positioned in a first prespecified relationship with a reference line that intersects the respective longitudinal axes of the first and second signal carrying conductors, and that lies in a plane orthogonal thereto. In similar manner, a second drain conductor is positioned proximate to the second signal carrying conductor in spaced apart parallel relationship, and is further positioned in a second prespecified relationship with the reference line. Shielding material is spirally wrapped around the first and second signaling conductors, the first and second drain conductors and the insulating structure.
摘要翻译：本发明的实施例涉及用于在数据处理环境中在组件之间传送数字数据和其他信息的传输电缆，特别是双芯电缆。本发明的一个实施例涉及一种信息传输电缆，其包括具有指定长度的第一和第二信号承载导体，每个信号承载导体设置为承载信息信号并具有纵向轴线。该实施例还包括绝缘结构，该绝缘结构包括一定量的介电绝缘材料，该绝缘结构被定位成沿其相应的长度包围第一和第二信号承载导体，并且用于将第一和第二信号导体保持间隔开的平行关系与彼此。第一漏极导体以间隔开的平行关系定位成靠近第一信号承载导体，并且进一步定位成与与第一和第二信号承载导体的相应纵轴相交的参考线的第一预定关系，并且位于在与其正交的平面内。以类似的方式，第二漏极导体以间隔开的平行关系定位成靠近第二信号承载导体，并且还以与参考线的第二预定关系进一步定位。屏蔽材料螺旋缠绕在第一和第二信号导体，第一和第二漏极导体和绝缘结构周围。

90. 发明授权

US06600347B2 Dynamically producing an effective impedance of an output driver with a bounded variation during transitions thereby reducing jitter 失效
标题翻译：在转换期间动态地产生具有有界变化的输出驱动器的有效阻抗，从而减少抖动
公开(公告)号：US06600347B2
公开(公告)日：2003-07-29
申请号：US09974686
申请日：2001-10-10
申请人： John Michael Borkenhagen , Moises Cases , Daniel Mark Dreps , David LeRoy Guertin , Nam Huu Pham , Robert Russell Williams
发明人： John Michael Borkenhagen , Moises Cases , Daniel Mark Dreps , David LeRoy Guertin , Nam Huu Pham , Robert Russell Williams
IPC分类号： H03B100
CPC分类号： H03K17/164
摘要： A method and system for reducing a reflection coefficient below a predetermined value thereby reducing jitter by the variation of the effective impedance of a driver appearing to be bounded during state transitions. The driver may include a pull-up driver and a pull-down driver. In the pull-up driver, the transistors may be switched from a first state to a second state in a staggered fashion where the first state is complementary to the second state; In the pull-down driver, the transistors may be switched from a second state to a first state in a staggered fashion. By staggering the switching of the transistors in the pull-up driver and the pull-down driver, a portion of the current may flow from the pull-up driver to the pull-down driver thereby causing the variation of the effective impedance of the driver to appear to be bounded during state transitions.
摘要翻译：一种用于将反射系数降低到低于预定值的方法和系统，从而通过在状态转换期间看起来被界定的驱动器的有效阻抗的变化来减少抖动。驱动器可以包括上拉驱动器和下拉驱动器。在上拉驱动器中，晶体管可以以第一状态与第二状态互补的交错方式从第一状态切换到第二状态; 在下拉驱动器中，晶体管可以以交错的方式从第二状态切换到第一状态。通过交错上拉驱动器和下拉驱动器中的晶体管的切换，电流的一部分可以从上拉驱动器流向下拉驱动器，从而导致驱动器的有效阻抗的变化在状态转换期间看起来是有界的。

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