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1. 发明申请

US20080136427A1 ON-CHIP PROBING APPARATUS 失效
标题翻译：片上探针装置
公开(公告)号：US20080136427A1
公开(公告)日：2008-06-12
申请号：US11567449
申请日：2006-12-06
申请人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： G01R31/26 , G01R1/067
CPC分类号： G01R31/31723 , G01R31/2884 , G01R31/31926
摘要： The invention is directed to an on-chip probing apparatus. In accordance with an embodiment of the present invention, the on-chip probing apparatus includes: a plurality of switches on a chip; a plurality of externally accessible probe points on the chip; and a multiplexer for controlling the plurality of switches to selectively couple an output signal of the chip to one of the plurality of probe points.
摘要翻译：本发明涉及片上探测装置。根据本发明的实施例，片上探测装置包括：芯片上的多个开关; 芯片上的多个外部可访问的探针点; 以及多路复用器，用于控制所述多个开关以选择性地将所述芯片的输出信号耦合到所述多个探针点中的一个。

2. 发明授权

US08289101B2 Pre-distortion based impedence discontinuity remediation for via stubs and connectors in printed circuit board design 有权
标题翻译：针对印刷电路板设计中通孔短路和连接器的基于预失真的阻抗不连续性修复
公开(公告)号：US08289101B2
公开(公告)日：2012-10-16
申请号：US11737196
申请日：2007-04-19
申请人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： H03H7/38
CPC分类号： H05K1/0237 , H04L25/028 , H04L25/0288 , H04L25/03343 , H05K1/14 , H05K1/181 , H05K2201/044 , H05K2201/1006
摘要： Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
摘要翻译：本发明的实施例解决了PCB设计中的通孔结构利用方面的技术缺陷，并且提供了一种用于PCB中经由短线和连接器的阻抗不连续修复的新颖且非显而易见的方法，系统和计算机程序产品。在一个实施例中，可以提供PCB中阻抗不连续修复的方法。该方法可以包括配置预失真滤波器以消除由具有通孔短路或连接器之一的传输线引起的电信号中的阻抗不连续性。该方法还可以包括在通过传输线路传输电信号之前对电信号进行预失真滤波。最后，该方法可以包括通过传输线传输预失真滤波的电信号。

3. 发明申请

US20090019204A1 SELF-HEALING NOISE DISPERSION SYSTEM FOR HIGH PERFORMANCE MULTIDROP SYSTEMS 审中-公开
标题翻译：用于高性能多系统的自我健康噪声分散系统
公开(公告)号：US20090019204A1
公开(公告)日：2009-01-15
申请号：US11777307
申请日：2007-07-13
申请人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Nam H. Pham
IPC分类号： G06F13/14 , G06F13/16 , G06F13/20
CPC分类号： G06F13/4086 , G06F13/4243
摘要： The key limiter in a multi-drop system, such as a multi-drop memory system, is the super-positioning of reflection noise from multiple modules or pluggable units, such as DIMMs. Using the noise cancellation approach of the present invention, the noise is distributed across the width of the pulse thus significantly reducing the impact of noise super-positioning. Use of the system of the present invention provides improved noise margins and is a key enabler of high performance, high speed bus, particularly at higher bit rates, as well as an enabler for higher capacity modules, such as DIMMs. The system provides for electrical traces from each of the modules of varying lengths thereby distributing the noise reflections.
摘要翻译：多点系统中的关键限制器（如多点存储器系统）是来自多个模块或可插拔单元（如DIMM）的反射噪声的超定位。使用本发明的噪声消除方法，噪声分布在脉冲的宽度上，从而显着地减少噪声超定位的影响。使用本发明的系统提供改进的噪声容限，并且是高性能，高速总线，特别是在较高比特率下的关键推动因素，以及用于诸如DIMM的更高容量模块的推动者。该系统提供来自不同长度的每个模块的电迹线，从而分配噪声反射。

4. 发明授权

US07725783B2 Method and apparatus for repeatable drive strength assessments of high speed memory DIMMs 有权
标题翻译：用于高速存储器DIMM的可重复驱动强度评估的方法和装置
公开(公告)号：US07725783B2
公开(公告)日：2010-05-25
申请号：US11780505
申请日：2007-07-20
申请人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
IPC分类号： G11C29/00
CPC分类号： G01R31/2815 , G01R31/304 , G11C29/02 , G11C29/022 , G11C29/56 , G11C2029/5602
摘要： The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided.
摘要翻译：本发明通过计算由诸如偶极天线的装置收集的辐射场的频率内容来评估存储器（DIMM）强度。辐射场由加速电荷产生，这是压摆率或DIMM强度的函数。辐射功率与驱动位的频率成正比。通过将辐射场与近场或存储场分离，DIMM强度内容与其他功能性DIMM问题（例如tRCD延迟，刷新周期，寻址模式等）隔离。通过检查辐射功率，现有技术的缺点，例如通过探测DIMM的触点。

5. 发明申请

US20080261451A1 PRE-DISTORTION BASED IMPEDENCE DISCONTINUITY REMEDIATION FOR VIA STUBS AND CONNECTORS IN PRINTED CIRCUIT BOARD DESIGN 有权
标题翻译：在印刷电路板设计中通过STUBS和连接器进行基于预失真的动态不连续性修复
公开(公告)号：US20080261451A1
公开(公告)日：2008-10-23
申请号：US11737196
申请日：2007-04-19
申请人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： H01R13/648
CPC分类号： H05K1/0237 , H04L25/028 , H04L25/0288 , H04L25/03343 , H05K1/14 , H05K1/181 , H05K2201/044 , H05K2201/1006
摘要： Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
摘要翻译：本发明的实施例解决了PCB设计中的通孔结构利用方面的技术缺陷，并且提供了一种用于PCB中经由短线和连接器的阻抗不连续修复的新颖且非显而易见的方法，系统和计算机程序产品。在一个实施例中，可以提供PCB中阻抗不连续修复的方法。该方法可以包括配置预失真滤波器以消除由具有通孔短路或连接器之一的传输线引起的电信号中的阻抗不连续性。该方法还可以包括在通过传输线路传输电信号之前对电信号进行预失真滤波。最后，该方法可以包括通过传输线传输预失真滤波的电信号。

6. 发明申请

US20120327622A1 PRE-DISTORTION BASED IMPEDENCE DISCONTINUITY REMEDIATION FOR VIA STUBS AND CONNECTORS IN PRINTED CIRCUIT BOARD DESIGN 有权
标题翻译：在印刷电路板设计中通过STUBS和连接器进行基于预失真的动态不连续性修复
公开(公告)号：US20120327622A1
公开(公告)日：2012-12-27
申请号：US13603386
申请日：2012-09-04
申请人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： H05K1/18 , H05K1/11
CPC分类号： H05K1/0237 , H04L25/028 , H04L25/0288 , H04L25/03343 , H05K1/14 , H05K1/181 , H05K2201/044 , H05K2201/1006
摘要： Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
摘要翻译：本发明的实施例解决了PCB设计中的通孔结构利用方面的技术缺陷，并且提供了一种用于PCB中经由短线和连接器的阻抗不连续修复的新颖且非显而易见的方法，系统和计算机程序产品。在一个实施例中，可以提供PCB中阻抗不连续修复的方法。该方法可以包括配置预失真滤波器以消除由具有通孔短路或连接器之一的传输线引起的电信号中的阻抗不连续性。该方法还可以包括在通过传输线路传输电信号之前对电信号进行预失真滤波。最后，该方法可以包括通过传输线传输预失真滤波的电信号。

7. 发明申请

US20090021264A1 METHOD AND APPARATUS FOR REPEATABLE DRIVE STRENGTH ASSESSMENTS OF HIGH SPEED MEMORY DIMMS 有权
标题翻译：用于高速记忆体可重复驱动强度评估的方法和装置
公开(公告)号：US20090021264A1
公开(公告)日：2009-01-22
申请号：US11780505
申请日：2007-07-20
申请人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
IPC分类号： G01R31/02 , G06F11/00
CPC分类号： G01R31/2815 , G01R31/304 , G11C29/02 , G11C29/022 , G11C29/56 , G11C2029/5602
摘要： The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided.
摘要翻译：本发明通过计算由诸如偶极天线的装置收集的辐射场的频率内容来评估存储器（DIMM）强度。辐射场由加速电荷产生，这是压摆率或DIMM强度的函数。辐射功率与驱动位的频率成正比。通过将辐射场与近场或存储场分离，DIMM强度内容与其他功能性DIMM问题（例如tRCD延迟，刷新周期，寻址模式等）隔离。通过检查辐射功率，现有技术的缺点，例如通过探测DIMM的触点。

8. 发明申请

US20090007048A1 DESIGN STRUCTURE FOR A COMPUTER MEMORY SYSTEM WITH A SHARED MEMORY MODULE JUNCTION CONNECTOR 审中-公开
标题翻译：具有共享存储器模块连接器的计算机存储器系统的设计结构
公开(公告)号：US20090007048A1
公开(公告)日：2009-01-01
申请号：US12203335
申请日：2008-09-03
申请人： MOISES CASES , Martin J. Crippen , Daniel N. de Araujo , Bradley D. Herman , Erdem Matoglu , William R. Milani , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
发明人： MOISES CASES , Martin J. Crippen , Daniel N. de Araujo , Bradley D. Herman , Erdem Matoglu , William R. Milani , Bhyrav M. Mutnury , Pravin Patel , Nam H. Pham
IPC分类号： G06F17/50
CPC分类号： H01R25/006
摘要： A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a memory module system and DIMM connector is provided. A DIMM connector includes a plurality of DIMM sockets for receiving a corresponding plurality of DIMMs in a radially oriented, angularly spaced orientation. The DIMM sockets are connected in parallel at a memory module junction so that socket terminals of each DIMM socket are joined to the same relative terminal of all the other DIMM sockets along electronic pathways of substantially equal length. A memory controller selectively communicates with the DIMMs via the DIMM junction. By virtue of the improved topology, impedance within the DIMM connector may be better matched to minimize reflections and improve signal quality.
摘要翻译：提供了体现在用于设计，制造和/或测试存储器模块系统和DIMM连接器的机器可读存储介质中的设计结构。 DIMM连接器包括多个DIMM插座，用于以径向定向的，有角度间隔的方向接收相应的多个DIMM。 DIMM插槽在存储器模块连接处并联连接，使得每个DIMM插座的插座端子沿着基本相等长度的电子路径连接到所有其他DIMM插槽的相同相对端子。存储器控制器经由DIMM连接器选择性地与DIMM通信。凭借改进的拓扑结构，可以更好地匹配DIMM连接器内的阻抗以最小化反射并提高信号质量。

9. 发明授权

US07443180B2 On-chip probing apparatus 失效
标题翻译：片上探测装置
公开(公告)号：US07443180B2
公开(公告)日：2008-10-28
申请号：US11567449
申请日：2006-12-06
申请人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： G01R31/02 , G01R31/26
CPC分类号： G01R31/31723 , G01R31/2884 , G01R31/31926
摘要： The invention is directed to an on-chip probing apparatus. In accordance with an embodiment of the present invention, the on-chip probing apparatus includes: a plurality of switches on a chip; a plurality of externally accessible probe points on the chip; and a multiplexer for controlling the plurality of switches to selectively couple an output signal of the chip to one of the plurality of probe points.
摘要翻译：本发明涉及片上探测装置。根据本发明的实施例，片上探测装置包括：芯片上的多个开关; 芯片上的多个外部可访问的探针点; 以及多路复用器，用于控制所述多个开关以选择性地将所述芯片的输出信号耦合到所述多个探针点中的一个。

10. 发明申请

US20080258755A1 Noise Reduction Among Conductors 审中-公开
标题翻译：导体之间的降噪
公开(公告)号：US20080258755A1
公开(公告)日：2008-10-23
申请号：US11737355
申请日：2007-04-19
申请人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Nam H. Pham
发明人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Nam H. Pham
IPC分类号： H03K17/16
CPC分类号： H04B3/32 , H03K2005/00019 , H03K2005/00156
摘要： Noise reduction among conductors, the conductors disposed adjacent to one another, the conductors characterized as two or more aggressor conductors and one or more victim conductors, a least two of the aggressor conductors driven with at least two signals that induce unwanted crosstalk upon at least one of the victim conductors, a programmable delay device disposed in a signal path of each of the at least two signals that induce unwanted crosstalk, including programming a delay period into each programmable delay device; receiving, simultaneously at the programmable delay devices, the at least two signals that induce unwanted crosstalk; and transmitting, on two aggressor conductors, the at least two signals that induce unwanted crosstalk, with the at least two signals separated in time by the delay period.
摘要翻译：导体之间的噪声降低，导体彼此相邻布置，导体表征为两个或多个侵略导体和一个或多个受害导体，至少两个侵略体导体用至少两个信号驱动，这些信号在至少一个所述可编程延迟装置设置在所述至少两个信号中的每一个的信号路径中，所述至少两个信号引起不需要的串扰，包括将延迟周期编程到每个可编程延迟装置中; 同时在可编程延迟装置处接收至少两个引起不想要的串扰的信号; 以及在两个侵略者导体上传输引起不想要的串扰的至少两个信号，其中至少两个信号在时间上与延迟周期分开。

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