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    • 81. 发明申请
    • DEVICE PERFORMANCE ENHANCEMENT
    • 设备性能提升
    • US20140027821A1
    • 2014-01-30
    • US13557479
    • 2012-07-25
    • Chang-Yu WuChih-Chiang ChangShang-Chih HsiehWei-Chih Hsieh
    • Chang-Yu WuChih-Chiang ChangShang-Chih HsiehWei-Chih Hsieh
    • H01L21/28H01L29/78
    • H01L29/4238H01L21/28123H01L29/78
    • Among other things, one or more techniques for enhancing device (e.g., transistor) performance are provided herein. In one embodiment, device performance is enhanced by forming an extended dummy region at an edge of a region of a device and forming an active region at a non-edge of the region. Limitations associated with semiconductor fabrication processing present in the extended dummy region more so than in non-edge regions. Accordingly, a device exhibiting enhanced performance is formed by connecting a gate to the active region, where the active region has a desired profile because it is comprised within a non-edge of the region. A dummy device (e.g., that may be less responsive) may be formed to include the extended dummy region, where the extended dummy region has a less than desired profile due to limitations associated with semiconductor fabrication processing, for example.
    • 除此之外,本文提供了用于增强器件(例如,晶体管)性能的一种或多种技术。 在一个实施例中,通过在器件的区域的边缘处形成延伸的虚拟区域并在该区域的非边缘处形成有源区域来增强器件性能。 与非边缘区域相比,扩展虚拟区域中存在与半导体制造处理相关的限制。 因此,通过将栅极连接到有源区域来形成表现出增强的性能的器件,其中有源区域具有期望的形状,因为它被包括在该区域的非边缘内。 例如,由于与半导体制造处理相关的限制,可以形成虚拟设备(例如,可能较不响应的)以包括扩展的虚拟区域,其中扩展的虚拟区域具有小于期望的轮廓。
    • 83. 发明授权
    • Meta-hardened flip-flop
    • 元硬化触发器
    • US08514000B1
    • 2013-08-20
    • US13562539
    • 2012-07-31
    • Wei-Chih HsiehShang-Chih HsiehChih-Chiang Chang
    • Wei-Chih HsiehShang-Chih HsiehChih-Chiang Chang
    • H03K3/00
    • H03K3/0375H03K3/356156
    • Some embodiments relate to a flip-flop having a data input terminal, a data output terminal and a clock terminal. The flip-flop includes a master latch, a slave latch, and an isolation element coupled between the master latch output and slave latch. The isolation element is arranged to isolate capacitive loading seen by the output of the master latch that comes from the slave latch. In some embodiments, the master latch includes one or more drive enhancement elements on its feedforward and feedback paths. The slave latch can also include one or more drive enhancement elements on its feedforward and feedback paths. These drive enhancement elements, particularly in combination with the isolation element, may help to reduce the setup and hold times and enhance meta-stability resistance of the flip-flop relative to conventional implementations. Other embodiments are also disclosed.
    • 一些实施例涉及具有数据输入端,数据输出端和时钟端的触发器。 触发器包括主锁存器,从锁存器和耦合在主锁存器输出和从锁存器之间的隔离元件。 隔离元件被布置成隔离来自从锁存器的主锁存器的输出所看到的电容性负载。 在一些实施例中,主锁存器在其前馈和反馈路径上包括一个或多个驱动增强元件。 从锁存器还可以在其前馈和反馈路径上包括一个或多个驱动增强元件。 这些驱动增强元件,特别是与隔离元件组合,可以有助于减小建立和保持时间,并且增强触发器相对于传统实现方式的元稳定性。 还公开了其他实施例。
    • 85. 发明申请
    • Methods and Apparatus for Time to Current Conversion
    • 时间到当前转换的方法和装置
    • US20130049810A1
    • 2013-02-28
    • US13221628
    • 2011-08-30
    • Chung-Ting LuChung-Chieh YangChin-Hua WenChih-Chiang Chang
    • Chung-Ting LuChung-Chieh YangChin-Hua WenChih-Chiang Chang
    • H03D13/00
    • H03K5/131H03K5/135
    • A time to current conversion apparatus and methods. An impedance having an input for selectively receiving a time varying periodic signal or a known voltage signal is provided; and a current output is coupled to the impedance. By observing the average current through the impedance for the known voltage signal over a time period, and by observing the average current through the impedance for a time varying periodic signal, the duty cycle of the time varying periodic signal may be determined by evaluating a ratio of a first average current observed at the current output while the time varying periodic signal is coupled to the impedance to a second average current observed at the current output while the known voltage signal is coupled to the impedance. An embodiment time to current converter circuit is disclosed. Method embodiments for determining the duty cycle of a time varying periodic signal are provided.
    • 一个时间到当前的转换设备和方法。 提供具有用于选择性地接收时变周期信号或已知电压信号的输入的阻抗; 并且电流输出耦合到阻抗。 通过在一段时间内观察已知电压信号的阻抗的平均电流,并且通过观察时变周期信号的通过阻抗的平均电流,可以通过评估时变周期信号的占空比来确定时变周期信号的占空比 在电流输出处观察到的第一平均电流,而当所述已知电压信号耦合到所述阻抗时,所述时变周期信号与所述阻抗耦合到在所述电流输出处观察到的第二平均电流。 公开了一种实时的电流转换器电路。 提供了用于确定时变周期信号的占空比的方法实施例。
    • 89. 发明授权
    • Hinge assembly and portable electronic device using same
    • 铰链组件和使用其的便携式电子设备
    • US08161602B2
    • 2012-04-24
    • US12536288
    • 2009-08-05
    • Mu-Wen YangChih-Chiang Chang
    • Mu-Wen YangChih-Chiang Chang
    • E05D11/10
    • H04M1/0216Y10T16/527Y10T16/5335Y10T16/54Y10T16/5402Y10T16/54025Y10T16/540253
    • A hinge assembly includes a mounting sleeve defining a pivoting hole, a fastening seat, an elastic member, and a right side cover. The pivoting hole is enclosed by an interior peripheral wall. The interior peripheral wall defines a stopping slot. The fastening seat defines a fastening hole. The elastic member is received in the mounting sleeve. The right side cover includes a pole. The pole includes a first resisting bar and a second resisting bar. The pole is received in the pivoting hole and the fastening hole. The first resisting bar is slidably embedded in the stopping slot. The elastic member compresses the first resisting bar to abut against the fastening seat. When the first resisting bar slides out of the fastening hole and abuts against the fastening seat, the second resisting bar is slidably embedded in the stopping slot.
    • 铰链组件包括限定枢转孔的安装套筒,紧固座,弹性构件和右侧盖。 枢转孔由内周壁包围。 内周壁限定了一个停止槽。 紧固座限定一个紧固孔。 弹性构件被容纳在安装套筒中。 右侧盖包括一个杆。 杆包括第一阻力杆和第二阻力杆。 该杆被容纳在枢转孔和紧固孔中。 第一阻力杆可滑动地嵌入停止槽中。 弹性构件压缩第一阻力杆以抵靠紧固座。 当第一阻力杆从紧固孔滑出并抵靠紧固座时,第二阻力杆可滑动地嵌入停止槽中。