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    • 81. 发明授权
    • Plug-and-play data cable with protocol translation
    • 具有协议转换的即插即用数据线
    • US6131125A
    • 2000-10-10
    • US970992
    • 1997-11-14
    • Michael D. RostokerJoel Silverman
    • Michael D. RostokerJoel Silverman
    • G06F9/445G06F13/38G06F13/00G06F13/60
    • G06F9/4411G06F13/385
    • A protocol translation cable assembly includes a first connector having a first plurality of pins, a second connector having a second plurality of pins, and an electrical cable coupling the first connector to the second connector, where the electrical cable includes a plurality of conductors. The protocol translation cable assembly further includes translation circuitry coupled to at least some of the plurality of wires of the electric cable at points between the first plurality of pins of the first connector and the second plurality of pins of the second connector. The translation circuitry preferably derives its power from the electrical cable such that separate power supplies are not required. The cable assembly therefore provides transparent "plug-and-play" capabilities.
    • 协议转换电缆组件包括具有第一多个引脚的第一连接器,具有第二多个引脚的第二连接器和将第一连接器耦合到第二连接器的电缆,其中电缆包括多个导体。 协议转换电缆组件还包括在第一连接器的第一多个引脚和第二连接器的第二多个引脚之间的点处,耦合到电缆的多个电线中的至少一些的平移电路。 翻译电路优选地从电缆导出其功率,使得不需要单独的电源。 因此,电缆组件提供透明的“即插即用”功能。
    • 82. 发明授权
    • Single chip systems using general purpose processors
    • 单芯片系统采用通用处理器
    • US06092229A
    • 2000-07-18
    • US723475
    • 1996-10-09
    • Douglas B. BoyleMichael D. Rostoker
    • Douglas B. BoyleMichael D. Rostoker
    • G06F11/10G06F11/00
    • G06F11/1004G06F11/10
    • A system for providing information to memory within a local device is provided herein. The system initially receives information transmitted from a remote location and reads predetermined data, including start and end addresses, within the local device. The system computes a checksum based on information received from the remote location and the predetermined data and compares a predetermined checksum to the received information checksum. If the predetermined checksum does not equal the received information checksum, the system requests retransmission of information and repeats the preceding steps (receiving information, computing a checksum, and comparing) until the predetermined checksum equals the received information checksum. The system then provides the valid information to local device memory. The invention may execute a protocol to receive information packets and store the information packets in appropriate memory locations after receiving the information. The system may copy information from the remote location directly into local device memory. The system is implemented on a single chip and provides information to memory of a local device. The system utilizes minimal non-volatile memory and comprises a microprocessor and registers including a start register, an end register, and a checksum register, and a communications interface. The communications interface receives information from a remote device, the microprocessor receives information from the communications interface and evaluates whether information received is valid, and the microprocessor passes valid information to RAM for execution.
    • 本文提供了一种用于向本地设备内的存储器提供信息的系统。 该系统最初接收从远程位置发送的信息,并在本地设备内读取包括起始和结束地址的预定数据。 该系统基于从远程位置和预定数据接收的信息计算校验和,并将预定校验和与接收的信息校验和进行比较。 如果预定校验和不等于接收到的信息校验和,则系统请求重发信息并重复上述步骤(接收信息,计算校验和和比较),直到预定校验和等于接收的信息校验和。 然后系统将有效信息提供给本地设备存储器。 本发明可以在接收到信息之后执行接收信息分组的协议并将信息分组存储在适当的存储器位置中。 系统可以将来自远程位置的信息直接复制到本地设备存储器中。 该系统在单个芯片上实现,并向本地设备的存储器提供信息。 该系统使用最小的非易失性存储器,并且包括微处理器和包括起始寄存器,结束寄存器和校验和寄存器的寄存器以及通信接口。 通信接口从远程设备接收信息,微处理器从通信接口接收信息,并评估接收到的信息是否有效,并且微处理器将有效信息传递给RAM进行执行。
    • 85. 发明授权
    • Single chip integrated circuit distributed shared memory (DSM) and
communications nodes
    • 单芯片集成电路分布式共享存储器(DSM)和通信节点
    • US5963975A
    • 1999-10-05
    • US932042
    • 1997-09-17
    • Douglas B. BoyleJames S. KofordEdwin R. JonesRanko ScepanovicMichael D. Rostoker
    • Douglas B. BoyleJames S. KofordEdwin R. JonesRanko ScepanovicMichael D. Rostoker
    • G06F12/08G06F13/00
    • G06F12/0817
    • The capacity of a cache memory is substantially reduced over that required for a multi-chip distributed shared memory (DSM) implementation to enable the cache memory, a main memory, a processor and requisite logic and control circuitry to fit on a single integrated circuit chip. The increased cache miss rate created by the reduced cache memory capacity is compensated for by the reduced cache miss resolution period resulting from integrating the main memory and processor on the single chip. The reduced cache miss resolution period enables the processor clock rate to be substantially increased, so that a processor having a simple functionality such as a reduced instruction set computer (RISC) processor can be utilized and still provide the required processing speed. The RISC processor is substantially smaller than a more complicated processor that would be required to provide the same processing speed in a multi-chip DSM implementation, thereby enabling the RISC processor to fit on the chip with the other elements. A single-chip communications node that can be used in telecommunications networks other than DSM includes a memory controller for providing local and remote memory coherency, and a bidirectional interconnect unit that converts memory access instructions into memory access messages and vice-versa.
    • 高速缓冲存储器的容量比多芯片分布式共享存储器(DSM)实现所需的容量大大减少,以使得高速缓冲存储器,主存储器,处理器和必需的逻辑和控制电路能够安装在单个集成电路芯片 。 由降低的高速缓存存储器容量创建的增加的高速缓存未命中率由通过在单个芯片上集成主存储器和处理器而减少的高速缓存未命中分辨率周期来补偿。 减小的高速缓存未命中分辨率周期使得处理器时钟速率能够显着增加,使得可以利用具有简单功能的处理器,诸如精简指令集计算机(RISC)处理器,并且仍然提供所需的处理速度。 RISC处理器远小于在多芯片DSM实现中提供相同处理速度所需的更复杂的处理器,从而使RISC处理器能够与其他元件相配合。 可以用于DSM以外的电信网络中的单芯片通信节点包括用于提供本地和远程存储器一致性的存储器控​​制器,以及将存储器访问指令转换为存储器访问消息的反向互连的双向互连单元。
    • 86. 发明授权
    • Method of cell placement for an integrated circuit chip comprising
chaotic placement and moving windows
    • 一种集成电路芯片的电池放置方法,包括混沌放置和移动窗口
    • US5903461A
    • 1999-05-11
    • US862791
    • 1997-05-23
    • Michael D. RostokerJames S. KofordEdwin R. JonesDouglas B. BoyleRanko Scepanovic
    • Michael D. RostokerJames S. KofordEdwin R. JonesDouglas B. BoyleRanko Scepanovic
    • G06F17/50G06F19/00
    • G06F17/5072
    • In a physical design automation system for producing an optimized cell placement for an integrated circuit chip, a placement optimization methodology is decomposed into a plurality of cell placement optimization processes that are performed simultaneously by parallel processors on input data representing the chip. The results of the optimization processes are recomposed to produce an optimized cell placement. The fitness of the optimized cell placement is analyzed, and the parallel processors are controlled to selectively repeat performing the optimization processes for further optimizing the optimized cell placement if the fitness does not satisfy a predetermined criterion. The system can be applied to initial placement, routing, placement improvement and other problems. The processors can perform the same optimization process on different placements, or on areas of a single placement. Alternatively, the processors can perform different optimization processes simultaneously on a single initial placement, with the resulting processed placement having the highest fitness being selected as the optimized placement. The processors can further selectively reprocess areas of a placement having high cell interconnect congestion or other low fitness parameters.
    • 在用于生成用于集成电路芯片的优化的单元布置的物理设计自动化系统中,布局优化方法被分解成由并行处理器在表示芯片的输入数据上同时执行的多个单元布局优化处理。 重组优化过程的结果以产生优化的细胞放置。 分析优化的单元布局的适应性,并且如果适合度不满足预定标准,则并行处理器被控制以选择性地重复执行优化处理以进一步优化优化的单元布局。 该系统可以应用于初始放置,布线,布局改进等问题。 处理器可以对不同的展示位置或单个展示位置执行相同的优化过程。 或者,处理器可以在单个初始放置上同时执行不同的优化过程,所得到的经处理的放置具有最佳适合度作为优化的位置。 处理器可以进一步选择性地重新处理具有高单元互连拥塞或其他低适应度参数的位置的区域。
    • 90. 发明授权
    • Micromachined microscopic particle selecting apparatus
    • 微加工微观粒子选择装置
    • US5824389A
    • 1998-10-20
    • US454539
    • 1995-05-30
    • Michael D. Rostoker
    • Michael D. Rostoker
    • B23Q7/00A61B17/00A61B17/04B65G54/02B81B1/00H01L21/677B03C7/00B32B3/24
    • A61B17/00234A61B2017/00345Y10S428/901Y10S977/845Y10T428/24322Y10T428/24562Y10T428/24661Y10T428/24744
    • Various forms of micromachined electrostatic microconveyors and useful devices based thereon are described. In one embodiment, a tube shaped conveyor is formed by disposing conductors circumferentially about the exterior surface of the tube. The tube is formed of an insulating material (e.g., silicon dioxide). Driving voltages are applied in staggered phase to selected ones of the conductors to provide a travelling electrostatic wave within the tube. Charged particles (or fluid or gas) can be propelled through the tube electrostatically by "riding" the travelling wave. Various aspects of the invention are directed to apparatus making use of the microconveyor to convey particles, gas ions, etc. Apparatus is described for using gas pressure resulting from the transport of gas ions to do mechanical work (i.e., to operate mechanical actuators. A planar microconveyor, similar to the tubular microconveyor, but formed as a series of evenly spaced conductive lines on the surface of a semiconductor die is also described. Other aspect of the invention are directed to using the microconveyors in conjunction with an electrostatic accelerator to "sort" or select particles by directing them through specific apertures into associated bins or reservoirs.
    • 描述了各种形式的微加工静电微型输送机和基于此的有用的装置。 在一个实施例中,通过围绕管的外表面周向设置导体来形成管状输送器。 管由绝缘材料(例如二氧化硅)形成。 驱动电压以交错相位施加到所选择的导体中以在管内提供行进静电波。 带电粒子(或液体或气体)可以通过“骑行”行波静电地推进管道。 本发明的各个方面涉及使用微输送机输送颗粒,气体离子等的装置。描述了使用由气体离子的运输产生的气体压力进行机械加工(即,操作机械致动器。 还描述了类似于管状微型输送器,但是在半导体管芯的表面上形成为一系列均匀间隔的导电线的平面微型输送机。本发明的另一方面涉及使用微型输送机与静电加速器结合“分类 “或通过将它们引导通过特定的孔到相关联的箱或储存器中来选择颗粒。