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81. 发明授权

US07659042B2 Full phase shifting mask in damascene process 有权
标题翻译：镶嵌过程中的全相移掩模
公开(公告)号：US07659042B2
公开(公告)日：2010-02-09
申请号：US12184215
申请日：2008-07-31
申请人： Christophe Pierrat
发明人： Christophe Pierrat
IPC分类号： G03F1/02
CPC分类号： G03F1/30 , G03F1/70
摘要： A full phase shifting mask (FPSM) can be advantageously used in a damascene process for hard-to-etch metal layers. Because the FPSM can be used with a positive photoresist, features on an original layout can be replaced with shifters on a FPSM layout. Adjacent shifters should be of opposite phase, e.g. 0 and 180 degrees. In one embodiment, a dark field trim mask can be used with the FPSM. The trim mask can include cuts that correspond to cuts on the FPSM. Cuts on the FPSM can be made to resolve phase conflicts between proximate shifters. In one case, exposing two proximate shifters on the FPSM and a corresponding cut on the trim mask can form a feature in the metal layer. The FPSM and/or the trim mask can include proximity corrections to further improve printing resolution.
摘要翻译：全相移掩模（FPSM）可有利地用于难蚀刻金属层的镶嵌工艺。因为FPSM可以与正光致抗蚀剂一起使用，原始布局上的特征可以用FPSM布局上的移位器替代。相邻移位器应该是相反的，例如 0和180度。在一个实施例中，暗场修剪掩模可以与FPSM一起使用。修剪蒙版可以包括对应于FPSM上的切割的切口。可以对FPSM进行切割以解决相邻移位器之间的相位冲突。在一种情况下，在FPSM上曝光两个相邻的移位器并且在修剪蒙版上相应的切割可以在金属层中形成特征。 FPSM和/或修剪掩模可以包括接近校正以进一步提高打印分辨率。

82. 发明申请

US20090249266A1 Displacing Edge Segments On A Fabrication Layout Based On Proximity Effects Model Amplitudes For Correcting Proximity Effects 有权
标题翻译：基于近似效应的制造布局偏移边缘段用于校正接近效应的模型幅度
公开(公告)号：US20090249266A1
公开(公告)日：2009-10-01
申请号：US12482276
申请日：2009-06-10
申请人： Christophe Pierrat , Youping Zhang
发明人： Christophe Pierrat , Youping Zhang
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/68 , G03F7/70441
摘要： Techniques for forming a mask fabrication layout for a physical integrated circuit design layout include correcting the fabrication layout for proximity effects using a proximity effects model. A proximity effects model is executed to produce an initial output. The initial output is based on a first position for a segment in a fabrication layout. The first position is displaced from a corresponding original edge in the original fabrication layout by a distance equal to an initial bias. The model is also executed to produce a second output based on a second position for the segment. The second position is displaced from the corresponding original edge by a distance equal to a second bias. An optimal bias for the segment is determined based on the initial output and the second output. The segment is displaced in the fabrication layout from the corresponding edge based on the optimal bias.
摘要翻译：用于形成用于物理集成电路设计布局的掩模制造布局的技术包括使用邻近效应模型来校正邻近效应的制造布局。执行邻近效应模型以产生初始输出。初始输出基于制造布局中的段的第一位置。第一位置从原始制造布局中的相应原始边缘移位等于初始偏置的距离。还执行该模型以基于该段的第二位置产生第二输出。第二位置从相应的原始边缘移位等于第二偏置的距离。基于初始输出和第二输出确定段的最佳偏差。基于最佳偏差，该段在制造布局中从相应的边缘移位。

83. 发明授权

US07312003B2 Design and layout of phase shifting photolithographic masks 有权
标题翻译：相移光刻掩模的设计和布局
公开(公告)号：US07312003B2
公开(公告)日：2007-12-25
申请号：US10799073
申请日：2004-03-12
申请人： Michel L. Cote , Christophe Pierrat
发明人： Michel L. Cote , Christophe Pierrat
IPC分类号： G03F1/00
CPC分类号： G03F7/70466 , G03F1/26 , G03F1/36 , G03F1/68 , G03F1/70 , G03F7/70425 , G03F7/70433 , G03F7/70558
摘要： A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
摘要翻译：描述了一种用于定义用于在集成电路中定义材料层的全相布局的方法。该方法可用于定义，排列和细化移相器以基本上使用相移限定层。通过该过程，产生交替光圈，暗场相移掩模和互补掩模的计算机可读定义。掩模可以由定义制成，然后用于在集成电路中制造一层材料。移相器或切口之间的分离被设计为便于掩模制造，同时还使由相移掩模限定的每个特征的量最大化。成本函数用于描述相位分配的相对质量，并选择较高质量的相位分配并减少相位冲突。

84. 发明授权

US07169515B2 Phase conflict resolution for photolithographic masks 有权
标题翻译：光刻掩模的相位冲突分辨率
公开(公告)号：US07169515B2
公开(公告)日：2007-01-30
申请号：US10834623
申请日：2004-04-29
申请人： Christophe Pierrat , Michel Luc Côté
发明人： Christophe Pierrat , Michel Luc Côté
IPC分类号： G03F9/00 , G06F17/50
CPC分类号： G03F7/70466 , G03F1/26 , G03F7/70425 , G03F7/70433 , G03F7/70558
摘要： A photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting in phase shift regions is laid out including for patterns comprising high density, small dimension features, and for “full shift” patterns. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The phase shift values assigned comprise φ and θ, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of φ and θ. In the preferred embodiment, φ is equal to approximately θ+180 degrees. Results of the cutting and assigning steps are stored in a computer readable medium, used for manufacturing a mask, and used for manufacturing an integrated circuit. By identifying the cutting areas based on characteristics of the pattern to be formed, the problem of dividing phase shift regions into phase shift windows, and assigning phase shift values to the windows is simplified.
摘要翻译：布置用于在集成电路或其它工件中定义层的光刻掩模，其中该层包括在相移区域中实现相移的多个特征的图案，包括用于高密度，小的尺寸特征和“全移”图案。该方法包括基于图案的特性识别相移区域的切割区域。接下来，该处理切割选择的切割区域中的相移区域以限定相移窗口，并将相位值分配给相移窗口。分配的相移值包括phi和theta，使得在具有各自的phi和theta的相移值的相邻相移窗口之间的转变中引起相消干涉。在优选实施例中，phi等于大约θ+ 180度。切割和分配步骤的结果存储在用于制造掩模的计算机可读介质中，并用于制造集成电路。通过基于要形成的图案的特性来识别切割区域，简化了将相移区域划分为相移窗口并将相移值分配给窗口的问题。

85. 发明授权

US07165234B2 Model-based data conversion 有权
标题翻译：基于模型的数据转换
公开(公告)号：US07165234B2
公开(公告)日：2007-01-16
申请号：US10844987
申请日：2004-05-12
申请人： Christophe Pierrat
发明人： Christophe Pierrat
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/26
摘要： Shifters on a phase shifting mask (PSM) can be intelligently assigned their corresponding phase. Specifically, the phase of a shifter can be assigned based on simulating the contrast provided by each phase for that shifter. The higher the contrast, the better the lithographic performance of the shifter. Therefore, the phase providing the higher contrast can be selected for that shifter. To facilitate this phase assignment, a pre-shifter can be placed relative to a feature on the layout. The pre-shifter can then be divided into a plurality of shifter tiles for contrast analysis. Model-based data conversion allows for a comprehensive solution including both phase assignment as well as optical proximity correction.
摘要翻译：相移掩码（PSM）上的移位器可以智能地分配相应的相位。具体地，可以基于模拟由该移位器的每个相位提供的对比度来分配移位器的相位。对比度越高，移位器的光刻性能越好。因此，可以为该移位器选择提供较高对比度的相位。为了方便这个相位分配，可以相对于布局上的一个特征放置一个换位器。然后可以将预移位器分成多个用于对比度分析的移位器瓦片。基于模型的数据转换允许包括相位分配以及光学邻近校正的综合解决方案。

86. 发明授权

US07132203B2 Phase shift masking for complex patterns with proximity adjustments 有权
公开(公告)号：US07132203B2
公开(公告)日：2006-11-07
申请号：US10818727
申请日：2004-04-06
申请人： Christophe Pierrat
发明人： Christophe Pierrat
IPC分类号： G03F9/00
CPC分类号： G03F1/30 , G03F1/36 , G03F7/70425 , G03F7/70433 , G03F7/70466 , G03F7/70558
摘要： Techniques are provided for extending the use of phase shift techniques to implementation of masks used for complex layouts in the layers of integrated circuits, beyond selected critical dimension features. The method includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and application of assist features and proximity correction features. The method includes applying an adjustment to a phase shift mask pattern including a first and a second phase shift window, and a control chrome with a control width, and/or to a trim mask pattern having a trim shape with a trim width based upon one or both of a rule based correction and a model based correction to improve a match between a resulting exposure pattern and a target feature.

87. 发明授权

US06918104B2 Dissection of printed edges from a fabrication layout for correcting proximity effects 有权
标题翻译：从制造布局解剖印刷边缘，以纠正邻近效应
公开(公告)号：US06918104B2
公开(公告)日：2005-07-12
申请号：US10346903
申请日：2003-01-17
申请人： Christophe Pierrat , Youping Zhang
发明人： Christophe Pierrat , Youping Zhang
IPC分类号： G03F1/00 , G03F1/36 , G06F17/50 , G03C5/00
CPC分类号： G03F1/36 , Y10T428/24802
摘要： Techniques for fabricating a device include forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, and identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects. Techniques include correcting for proximity effects associated with an edge in a first fabrication layout by determining whether any portion of the edge corresponds to a target edge in a design layer. The first fabrication layout corresponds to the design layer that indicates target edges for a printed features layer. If any portion of the edge corresponds to the target edge, then it is determined whether to establish an evaluation point on the edge. Then it is determined how to correct the edge for proximity effects based on the evaluation point. In case it is determined that no portion of the edge corresponds to the target edge, then no evaluation point is selected on the edge.
摘要翻译：用于制造器件的技术包括形成用于物理设计层（例如集成电路的设计）的制造布局，例如掩模布局，以及识别与设计层对应的多边形的边缘上的评估点，用于校正接近度效果。技术包括通过确定边缘的任何部分是否对应于设计层中的目标边缘来校正与第一制造布局中的边缘相关联的邻近效应。第一制造布局对应于指示印刷特征层的目标边缘的设计层。如果边缘的任何部分对应于目标边缘，则确定是否在边缘上建立评估点。然后，根据评估点确定如何纠正邻近效应的边缘。在确定边缘的任何部分不对应于目标边缘的情况下，在边缘上不选择评估点。

88. 发明申请

US20050123841A1 Full phase shifting mask in damascene process 有权
公开(公告)号：US20050123841A1
公开(公告)日：2005-06-09
申请号：US11035788
申请日：2005-01-13
申请人： Christophe Pierrat
发明人： Christophe Pierrat
IPC分类号： G03F1/00 , G03F7/20 , H01L21/027 , H01L21/3205 , G03C5/00 , G03F9/00
CPC分类号： G03F1/30 , G03F1/70
摘要： A full phase shifting mask (FPSM) can be advantageously used in a damascene process for hard-to-etch metal layers. Because the FPSM can be used with a positive photoresist, features on an original layout can be replaced with shifters on a FPSM layout. Adjacent shifters should be of opposite phase, e.g. 0 and 180 degrees. In one embodiment, a dark field trim mask can be used with the FPSM. The trim mask can include cuts that correspond to cuts on the FPSM. Cuts on the FPSM can be made to resolve phase conflicts between proximate shifters. In one case, exposing two proximate shifters on the FPSM and a corresponding cut on the trim mask can form a feature in the metal layer. The FPSM and/or the trim mask can include proximity corrections to further improve printing resolution.

89. 发明授权

US06861204B2 Design and layout of phase shifting photolithographic masks 有权
公开(公告)号：US06861204B2
公开(公告)日：2005-03-01
申请号：US10809650
申请日：2004-03-26
申请人： Michel Luc Côté , Christophe Pierrat
发明人： Michel Luc Côté , Christophe Pierrat
IPC分类号： G03F1/00 , G03F7/20 , H01L21/027 , G03C5/00 , G03F9/00
CPC分类号： G03F7/70466 , G03F1/26 , G03F1/36 , G03F1/68 , G03F1/70 , G03F7/70425 , G03F7/70433 , G03F7/70558
摘要： A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.

90. 发明申请

US20050031972A1 Design and layout of phase shifting photolithographic masks 有权
标题翻译：相移光刻掩模的设计和布局
公开(公告)号：US20050031972A1
公开(公告)日：2005-02-10
申请号：US10939104
申请日：2004-09-10
申请人： Michel Cote , Christophe Pierrat
发明人： Michel Cote , Christophe Pierrat
IPC分类号： G03F1/00 , G03F7/20 , H01L21/027 , G06F17/50 , G03F9/00
CPC分类号： G03F7/70466 , G03F1/26 , G03F1/36 , G03F1/68 , G03F1/70 , G03F7/70425 , G03F7/70433 , G03F7/70558
摘要： A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
摘要翻译：描述了一种用于定义用于在集成电路中定义材料层的全相布局的方法。该方法可用于定义，排列和细化移相器以基本上使用相移限定层。通过该过程，产生交替光圈，暗场相移掩模和互补掩模的计算机可读定义。掩模可以由定义制成，然后用于在集成电路中制造一层材料。移相器或切口之间的分离被设计为便于掩模制造，同时还使由相移掩模限定的每个特征的量最大化。成本函数用于描述相位分配的相对质量，并选择较高质量的相位分配并减少相位冲突。

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