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    • 1. 发明授权
    • Design and layout of phase shifting photolithographic masks
    • 相移光刻掩模的设计和布局
    • US07435513B2
    • 2008-10-14
    • US10939104
    • 2004-09-10
    • Michel L. CoteChristophe Pierrat
    • Michel L. CoteChristophe Pierrat
    • G03F1/00
    • G03F7/70466G03F1/26G03F1/36G03F1/68G03F1/70G03F7/70425G03F7/70433G03F7/70558
    • A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
    • 描述了一种用于定义用于在集成电路中定义材料层的全相布局的方法。 该方法可用于定义,排列和细化移相器以基本上使用相移限定层。 通过该过程,产生交替光圈,暗场相移掩模和互补掩模的计算机可读定义。 掩模可以由定义制成,然后用于在集成电路中制造一层材料。 移相器或切口之间的分离被设计为便于掩模制造,同时还使由相移掩模限定的每个特征的量最大化。 成本函数用于描述相位分配的相对质量,并选择较高质量的相位分配并减少相位冲突。
    • 2. 发明授权
    • Layout of phase shifting photolithographic masks with refined shifter shapes
    • 具有精细移位器形状的相移光刻掩模的布局
    • US08566757B2
    • 2013-10-22
    • US12609928
    • 2009-10-30
    • Michel L. CoteChristophe Pierrat
    • Michel L. CoteChristophe Pierrat
    • G06F17/50G03F1/00
    • G03F7/70466G03F1/26G03F1/36G03F1/68G03F1/70G03F7/70425G03F7/70433G03F7/70558
    • A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
    • 描述了一种用于定义用于在集成电路中定义材料层的全相布局的方法。 该方法可用于定义,排列和细化移相器以基本上使用相移限定层。 通过该过程,产生交替光圈,暗场相移掩模和互补掩模的计算机可读定义。 掩模可以由定义制成,然后用于在集成电路中制造一层材料。 移相器或切口之间的分离被设计为便于掩模制造,同时还使由相移掩模限定的每个特征的量最大化。 成本函数用于描述相位分配的相对质量,并选择较高质量的相位分配并减少相位冲突。
    • 3. 发明申请
    • Handling Of Flat Data For Phase Processing Including Growing Shapes Within Bins To Identify Clusters
    • 处理用于相位处理的平面数据的处理,其中包括用于识别簇的生长形状
    • US20090125867A1
    • 2009-05-14
    • US12352538
    • 2009-01-12
    • Michel L. CoteChristophe Pierrat
    • Michel L. CoteChristophe Pierrat
    • G06F17/50
    • G03F1/30G03F1/26G03F1/36G03F1/68G03F7/70425G03F7/70433G03F7/70466G03F7/70558
    • Definition of a phase shifting layout from an original layout can be time consuming. If the original layout is divided into useful groups, i.e. clusters that can be independently processed, then the phase shifting process can be performed more rapidly. If the shapes on the layout are enlarged, then the overlapping shapes can be grouped together to identify shapes that should be processed together. For large layouts, growing and grouping the shapes can be time consuming. Therefore, an approach that uses bins can speed up the clustering process, thereby allowing the phase shifting to be performed in parallel on multiple computers. Additional efficiencies result if identical clusters are identified and processing time saved so that repeated clusters of shapes only undergo the computationally expensive phase shifter placement and assignment process a single time.
    • 从原始布局定义相移布局可能是耗时的。 如果将原始布局分成有用的组,即可以被独立处理的集群,则可以更快地执行相移过程。 如果布局上的形状被放大,则可以将重叠的形状分组在一起以识别应该一起处理的形状。 对于大型布局,增长和分组形状可能是耗时的。 因此,使用箱体的方法可以加快聚类过程,从而允许在多个计算机上并行执行相移。 如果确定相同的集群并节省处理时间,则可以产生额外的效率,以便重复的形状集群只能在单次时间内经历计算上昂贵的移相器放置和分配过程。
    • 6. 发明申请
    • Design and Layout of Phase Shifting Photolithographic Masks
    • 相移光刻掩模的设计和布局
    • US20100050149A1
    • 2010-02-25
    • US12609928
    • 2009-10-30
    • Michel L. CoteChristophe Pierrat
    • Michel L. CoteChristophe Pierrat
    • G06F17/50
    • G03F7/70466G03F1/26G03F1/36G03F1/68G03F1/70G03F7/70425G03F7/70433G03F7/70558
    • A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
    • 描述了一种用于定义用于在集成电路中定义材料层的全相布局的方法。 该方法可用于定义,排列和细化移相器以基本上使用相移限定层。 通过该过程,产生交替光圈,暗场相移掩模和互补掩模的计算机可读定义。 掩模可以由定义制成,然后用于在集成电路中制造一层材料。 移相器或切口之间的分离被设计为便于掩模制造,同时还使由相移掩模限定的每个特征的量最大化。 成本函数用于描述相位分配的相对质量,并选择较高质量的相位分配并减少相位冲突。
    • 7. 发明授权
    • Design and layout of phase shifting photolithographic masks
    • 相移光刻掩模的设计和布局
    • US07739649B2
    • 2010-06-15
    • US11926648
    • 2007-10-29
    • Michel L. CoteChristophe Pierrat
    • Michel L. CoteChristophe Pierrat
    • G06F17/50
    • G03F7/70466G03F1/26G03F1/36G03F1/68G03F1/70G03F7/70425G03F7/70433G03F7/70558
    • A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
    • 描述了一种用于定义用于在集成电路中定义材料层的全相布局的方法。 该方法可用于定义,排列和细化移相器以基本上使用相移限定层。 通过该过程,产生交替光圈,暗场相移掩模和互补掩模的计算机可读定义。 掩模可以由定义制成,然后用于在集成电路中制造一层材料。 移相器或切口之间的分离被设计为便于掩模制造,同时还使由相移掩模限定的每个特征的量最大化。 成本函数用于描述相位分配的相对质量,并选择较高质量的相位分配并减少相位冲突。
    • 8. 发明授权
    • Design and layout of phase shifting photolithographic masks
    • 相移光刻掩模的设计和布局
    • US07312003B2
    • 2007-12-25
    • US10799073
    • 2004-03-12
    • Michel L. CoteChristophe Pierrat
    • Michel L. CoteChristophe Pierrat
    • G03F1/00
    • G03F7/70466G03F1/26G03F1/36G03F1/68G03F1/70G03F7/70425G03F7/70433G03F7/70558
    • A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
    • 描述了一种用于定义用于在集成电路中定义材料层的全相布局的方法。 该方法可用于定义,排列和细化移相器以基本上使用相移限定层。 通过该过程,产生交替光圈,暗场相移掩模和互补掩模的计算机可读定义。 掩模可以由定义制成,然后用于在集成电路中制造一层材料。 移相器或切口之间的分离被设计为便于掩模制造,同时还使由相移掩模限定的每个特征的量最大化。 成本函数用于描述相位分配的相对质量,并选择较高质量的相位分配并减少相位冲突。