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81. 发明授权

US09123800B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09123800B2
公开(公告)日：2015-09-01
申请号：US14317426
申请日：2014-06-27
申请人： Hyundai Motor Company
发明人： Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park , Youngkyun Jung
IPC分类号： H01L29/12 , H01L29/16 , H01L29/36 , H01L29/78 , H01L21/205 , H01L21/335 , H01L21/762 , H01L29/66 , H01L29/06 , H01L29/423
CPC分类号： H01L29/7811 , H01L29/0619 , H01L29/0661 , H01L29/086 , H01L29/1608 , H01L29/4238 , H01L29/66068 , H01L29/7813
摘要： A semiconductor device includes: a first n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate including a current carrying region and termination regions positioned at both sides of the current carrying region; a p type epitaxial layer disposed on the first n− type epitaxial layer; a second n− type epitaxial layer disposed on the p type epitaxial layer; a first trench disposed in the current carrying region; a second trench disposed in each termination region; a gate insulating layer disposed in the first trench; a gate electrode disposed on the gate insulating layer; and a termination insulating layer disposed in the second trench, in which a side of the termination insulating layer contacts the p type epitaxial layer and the second n− type epitaxial layer.
摘要翻译：半导体器件包括：第一n型外延层，其设置在n +型碳化硅衬底的第一表面上，该n +型碳化硅衬底包括载流区域和位于载流区域两侧的端接区域; 设置在第一n型外延层上的p型外延层; 设置在p型外延层上的第二n型外延层; 布置在所述载流区域中的第一沟槽; 设置在每个端接区域中的第二沟槽; 设置在所述第一沟槽中的栅极绝缘层; 设置在所述栅极绝缘层上的栅电极; 以及设置在第二沟槽中的终端绝缘层，其中端接绝缘层的一侧接触p型外延层和第二n-型外延层。

82. 发明申请

US20150187962A1 SCHOTTKY BARRIER DIODE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：肖特彼勒二极管及其制造方法
公开(公告)号：US20150187962A1
公开(公告)日：2015-07-02
申请号：US14468987
申请日：2014-08-26
申请人： Hyundai Motor Company
发明人： Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park , Youngkyun Jung
IPC分类号： H01L29/872 , H01L29/16 , H01L21/04 , H01L29/66
CPC分类号： H01L29/872 , H01L21/046 , H01L21/0495 , H01L29/0623 , H01L29/1608 , H01L29/6606
摘要： A Schottky barrier diode includes: an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate; a first p+ region disposed on the n− type epitaxial layer; an n type epitaxial layer disposed on the n− type epitaxial layer and the first p+ region; a second p+ region disposed on the n type epitaxial layer, and being in contact with the first p+ region; a Schottky electrode disposed on the n type epitaxial layer and the second p+ region; and an ohmic electrode disposed on a second surface of the n+ type silicon carbide substrate. Also, the first p+ region has a lattice shape including a plurality of vertical portions and horizontal portions connecting both ends of the respective vertical portions to each other.
摘要翻译：肖特基势垒二极管包括：n型外延层，设置在n +型碳化硅衬底的第一表面上; 布置在所述n型外延层上的第一p +区; 设置在n型外延层和第一p +区上的n型外延层; 设置在所述n型外延层上并与所述第一p +区接触的第二p +区; 设置在n型外延层和第二p +区上的肖特基电极; 以及设置在n +型碳化硅衬底的第二表面上的欧姆电极。此外，第一p +区域具有包括将各个垂直部分的两端彼此连接的多个垂直部分和水平部分的格子形状。

83. 发明申请

US20150076515A1 SCHOTTKY BARRIER DIODE AND METHOD FOR MANUFACTURING SCHOTTKY BARRIER DIODE 有权
标题翻译：肖特基二极体二极管及制造肖特基二极管的方法
公开(公告)号：US20150076515A1
公开(公告)日：2015-03-19
申请号：US14143649
申请日：2013-12-30
申请人： Hyundai Motor Company
发明人： Youngkyun Jung , Dae Hwan Chun , Kyoung-Kook Hong , Jong Seok Lee , Junghee Park
IPC分类号： H01L29/872 , H01L29/16 , H01L29/66
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/1608 , H01L29/6606
摘要： A Schottky barrier diode and a method of manufacturing the diode are provided. The diode includes an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate and a plurality of p+ regions disposed within the n− type epitaxial layer. An n+ type epitaxial layer is disposed on the n− type epitaxial layer, a Schottky electrode is disposed on the n+ type epitaxial layer, and an ohmic electrode is disposed on a second surface of the n+ type silicon carbide substrate. The n+ type epitaxial layer includes a plurality of pillar parts disposed on the n− type epitaxial layer and a plurality of openings disposed between the pillar parts and that expose the p+ regions. Each of the pillar parts includes substantially straight parts that contact the n− type epitaxial layer and substantially curved parts that extend from the substantially straight parts.
摘要翻译：提供肖特基势垒二极管和制造二极管的方法。二极管包括设置在n +型碳化硅衬底的第一表面上的n型外延层和设置在n型外延层内的多个p +区。在n型外延层上设置n +型外延层，在n +型外延层上设置肖特基电极，在n +型碳化硅基板的第二面上设置欧姆电极。 n +型外延层包括设置在n型外延层上的多个柱部分和设置在柱部分之间并暴露p +区域的多个开口。每个支柱部分包括接触n型外延层的基本上直的部分和从基本上直的部分延伸的基本上弯曲的部分。

84. 发明授权

US08586434B1 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08586434B1
公开(公告)日：2013-11-19
申请号：US13729534
申请日：2012-12-28
申请人： Hyundai Motor Company
发明人： Youngkyun Jung , Kyoung-Kook Hong , Jong Seok Lee , Dae Hwan Chun
IPC分类号： H01L21/00
CPC分类号： H01L29/7827 , H01L29/66068
摘要： A method of manufacturing a semiconductor device may include forming a first n− type epitaxial layer by performing a first epitaxial growth on a first surface of an n+ type silicon carbide substrate, forming a photosensitive layer pattern on the first n− type epitaxial layer, etching the first n− type epitaxial layer by using the photosensitive layer pattern as a mask to form a first trench, forming a buffer layer on the first n− type epitaxial layer after the photosensitive layer pattern may be removed, etching the buffer layer to form a trench passivation layer in the first trench, forming an n− type epitaxial layer by performing a second epitaxial growth on the first n− type epitaxial layer, and forming a p type epitaxial layer by performing a third epitaxial growth on the n− type epitaxial layer other than the portion on which the trench passivation layer may be formed.
摘要翻译：制造半导体器件的方法可以包括通过在n +型碳化硅衬底的第一表面上进行第一外延生长来形成第一n型外延层，在第一n-型外延层上形成感光层图案，蚀刻通过使用感光层图案作为掩模来形成第一沟槽的第一n型外延层，在可以去除感光层图案之后在第一n型外延层上形成缓冲层，蚀刻缓冲层以形成在第一沟槽中的沟槽钝化层，通过在第一n型外延层上进行第二外延生长形成n型外延层，并通过在n型外延层上进行第三外延生长形成p型外延层可以形成沟槽钝化层的部分。

85. 发明授权

US10115816B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US10115816B2
公开(公告)日：2018-10-30
申请号：US15187485
申请日：2016-06-20
申请人： Hyundai Motor Company
发明人： Dae Hwan Chun , Youngkyun Jung , Nackyong Joo , Junghee Park , Jong Seok Lee
IPC分类号： H01L29/78 , H01L29/16 , H01L29/66 , H01L21/04
摘要： A semiconductor device is provided. The device includes an n− type layer with a trench disposed in a first surface of an n+ type silicon carbide substrate. An n+ type region and a first p type region are disposed at the n− type layer and at a lateral surface of the trench. A plurality of second p type regions are disposed at the n− type layer and spaced apart from the first p type region. A gate electrode includes a first and a plurality of second gate electrodes disposed at the trench and extending from the first gate electrode, respectively. A source electrode is disposed on and insulated from the gate electrode. A drain electrode is disposed on a second surface of the n+ type silicon carbide substrate. The source electrode contacts the plurality of second p type regions spaced apart with the n− type layer disposed therein.

86. 发明授权

US09755020B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US09755020B2
公开(公告)日：2017-09-05
申请号：US15342363
申请日：2016-11-03
申请人： HYUNDAI MOTOR COMPANY
发明人： Dae Hwan Chun , Youngkyun Jung , Nack Yong Joo , Junghee Park , Jong Seok Lee
IPC分类号： H01L29/06 , H01L29/08 , H01L29/16 , H01L29/78 , H01L29/861
CPC分类号： H01L29/0847 , H01L29/0619 , H01L29/0684 , H01L29/1608 , H01L29/78 , H01L29/7828
摘要： A semiconductor device includes a first n− type layer and a second n− type layer that are sequentially disposed on a first surface of an n+ type silicon carbide substrate; a first trench and a second trench that are disposed at the second n− type layer and are spaced apart from each other; a p type region surrounding a lateral surface and a lower surface of the first trench; an n+ type region disposed on the p type region and the second n− type layer; a gate insulating layer disposed in the second trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer and the n+ type region disposed in the first trench; and a drain electrode disposed at a second surface of the n+ type silicon carbide substrate.

87. 发明授权

US09236500B2 Schottky barrier diode and method for manufacturing schottky barrier diode 有权
标题翻译：肖特基势垒二极管及制造肖特基势垒二极管的方法
公开(公告)号：US09236500B2
公开(公告)日：2016-01-12
申请号：US14143735
申请日：2013-12-30
申请人： Hyundai Motor Company
发明人： Jong Seok Lee , Kyoung-Kook Hong , Dae Hwan Chun , Youngkyun Jung
IPC分类号： H01L29/06 , H01L29/872 , H01L29/66 , H01L29/16
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0661 , H01L29/1608 , H01L29/6606 , H01L29/66143
摘要： A Schottky barrier diode and a method of manufacturing the Schottky barrier diode are provided. The diode includes an n− type epitaxial layer disposed on a first surface of an n+ type silicon carbide substrate and having an upper surface, a lower surface, and an inclined surface that connects the upper surface and the lower surface. A p region is disposed on the inclined surface of the n− type epitaxial layer and a Schottky electrode is disposed on the upper surface of the n− type epitaxial layer and the p region. In addition, an ohmic electrode is disposed on a second surface of the n+ type silicon carbide substrate.
摘要翻译：提供肖特基势垒二极管和制造肖特基势垒二极管的方法。二极管包括n型外延层，其设置在n +型碳化硅衬底的第一表面上，并具有上表面，下表面和连接上表面和下表面的倾斜表面。 p区设置在n型外延层的倾斜面上，肖特基电极设置在n型外延层和p区的上表面上。此外，欧姆电极设置在n +型碳化硅衬底的第二表面上。

88. 发明授权

US09159847B2 Schottky barrier diode and method of manufacturing the same 有权
标题翻译：肖特基势垒二极管及其制造方法
公开(公告)号：US09159847B2
公开(公告)日：2015-10-13
申请号：US14098359
申请日：2013-12-05
申请人： Hyundai Motor Company
发明人： Jong Seok Lee , Kyoung-Kook Hong , Dae Hwan Chun , Youngkyun Jung
IPC分类号： H01L31/0312 , H01L29/872 , H01L29/16 , H01L29/66 , H01L29/06 , H01L29/08
CPC分类号： H01L29/872 , H01L29/0615 , H01L29/0619 , H01L29/0804 , H01L29/1608 , H01L29/6606
摘要： A schottky barrier diode includes: an n− type epitaxial layer that is disposed at a first surface of an n+ type silicon carbide substrate; a plurality of n type pillar areas that are disposed at the inside of the n− type epitaxial layer and that are disposed at a first portion of the first surface of the n+ type silicon carbide substrate; a p type area that is disposed at the inside of the n− type epitaxial layer and that is extended in a direction perpendicular to the n type pillar areas; a plurality of p+ areas in which the n− type epitaxial layer is disposed at a surface thereof and that are separated from the n type pillar areas and the p type area; a schottky electrode that is disposed on the n− type epitaxial layer and the p+ areas; and an ohmic electrode that is disposed at a second surface of the n+ type silicon carbide substrate.
摘要翻译：肖特基势垒二极管包括：n型外延层，其设置在n +型碳化硅衬底的第一表面; 多个n型支柱区域，其设置在n型外延层的内部，并且设置在n +型碳化硅衬底的第一表面的第一部分; p型区域，其设置在所述n型外延层的内部，并且在垂直于所述n型支柱区域的方向上延伸; 多个p +区域，其中n型外延层设置在其表面并且与n型支柱区域和p型区域分离; 设置在n型外延层和p +区域上的肖特基电极; 以及设置在n +型碳化硅衬底的第二表面的欧姆电极。

89. 发明授权

US09142644B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09142644B2
公开(公告)日：2015-09-22
申请号：US14079222
申请日：2013-11-13
申请人： Hyundai Motor Company
发明人： Jong Seok Lee , Kyoung-Kook Hong , Dae Hwan Chun , Youngkyun Jung
IPC分类号： H01L29/772 , H01L29/66 , H01L29/06 , H01L29/78 , H01L29/423
CPC分类号： H01L29/66666 , H01L29/0688 , H01L29/1608 , H01L29/41766 , H01L29/42312 , H01L29/42316 , H01L29/4232 , H01L29/4236 , H01L29/66068 , H01L29/66734 , H01L29/66787 , H01L29/66795 , H01L29/7802 , H01L29/7813 , H01L29/7834
摘要： The present inventive concept has been made in an effort to increase the width of a channel in a silicon carbide MOSFET using a trench gate.According to the exemplary embodiment of the present inventive concept, the width of a channel can be increased, compared with the conventional art, by forming a plurality of protrusions extending to the p type epitaxial layer on both sides of the trench.
摘要翻译：本发明构思是为了增加使用沟槽栅极的碳化硅MOSFET中的沟道的宽度。根据本发明构思的示例性实施例，与传统技术相比，可以通过在沟槽的两侧形成延伸到p型外延层的多个突起来增加通道的宽度。

90. 发明申请

US20140187004A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20140187004A1
公开(公告)日：2014-07-03
申请号：US13830260
申请日：2013-03-14
申请人： HYUNDAI MOTOR COMPANY
发明人： Dae Hwan Chun , Jong Seok Lee , Kyoung-Kook Hong , Youngkyun Jung
IPC分类号： H01L29/66
CPC分类号： H01L29/0634 , H01L29/1608 , H01L29/2003 , H01L29/41766 , H01L29/66068 , H01L29/66727 , H01L29/66734 , H01L29/7802 , H01L29/7813
摘要： Disclosed is a method for fabricating a semiconductor device including: sequentially forming a first insulating film and a first barrier layer on a first surface of a substrate; etching the first barrier layer to form a first barrier layer pattern; etching the first insulating film to form a first insulating film pattern; removing the first barrier layer pattern and forming a first type epitaxial layer on an exposed first portion of the substrate; forming a second insulating film and a second barrier layer on the first type epitaxial layer and the first insulating film pattern; etching the second barrier layer to form a second barrier layer pattern; etching the second insulating film to form a second insulating film pattern, and etching the first insulating film pattern; and forming a second type epitaxial layer on an exposed second portion of the first surface of the n substrate.
摘要翻译：公开了一种制造半导体器件的方法，包括：在衬底的第一表面上依次形成第一绝缘膜和第一阻挡层; 蚀刻第一阻挡层以形成第一阻挡层图案; 蚀刻第一绝缘膜以形成第一绝缘膜图案; 去除所述第一阻挡层图案并在所述基板的暴露的第一部分上形成第一类型的外延层; 在所述第一型外延层和所述第一绝缘膜图案上形成第二绝缘膜和第二阻挡层; 蚀刻第二阻挡层以形成第二阻挡层图案; 蚀刻第二绝缘膜以形成第二绝缘膜图案，并蚀刻第一绝缘膜图案; 以及在所述n基板的所述第一表面的暴露的第二部分上形成第二类型的外延层。

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