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81. 发明授权

US06586766B2 Semiconductor device with semiconductor circuit comprising semiconductor units, and method of fabricating it 有权
标题翻译：具有半导体单元的半导体电路的半导体装置及其制造方法
公开(公告)号：US06586766B2
公开(公告)日：2003-07-01
申请号：US10124373
申请日：2002-04-18
申请人： Shunpei Yamazaki , Etsuko Fujimoto , Atsuo Isobe , Toru Takayama , Kunihiko Fukuchi
发明人： Shunpei Yamazaki , Etsuko Fujimoto , Atsuo Isobe , Toru Takayama , Kunihiko Fukuchi
IPC分类号： H01L2904
CPC分类号： H01L27/1237 , G02F1/13454 , H01L27/1248 , H01L29/458 , H01L29/4908 , H01L29/78645
摘要： The invention is to provide a high-productivity method for fabricating a TFT device having different LDD structures on one and the same substrate, and the TFT device. Specifically, the invention provides a novel TFT structure, and a high-productivity method for fabricating it. A Ta film or a Ta-based film having good heat resistance is used for forming interconnections, and the interconnections are covered with a protective film. The interconnections can be subjected to heat treatment at high temperatures (400 to 700° C.), and, in addition, the protective film serves as an etching stopper. In the peripheral driving circuit portion in the device, TFTs having an LDD structure are disposed in a self-aligned process in which is used side walls 126 and 127; while in the pixel matrix portion therein, TFTs having an LDD structure are disposed in a non-self-aligned process in which is used an insulator 125.
摘要翻译：本发明提供一种用于制造在同一基板上具有不同LDD结构的TFT器件和TFT器件的高生产率方法。具体地说，本发明提供了一种新颖的TFT结构，以及高生产率的制造方法。使用具有良好耐热性的Ta膜或Ta基膜形成互连，并且互连用保护膜覆盖。互连可以在高温（400〜700℃）下进行热处理，另外，保护膜用作蚀刻停止体。在器件的外围驱动电路部分中，具有LDD结构的TFT以自对准工艺设置，其中使用侧壁126和127; 而在其中的像素矩阵部分中，具有LDD结构的TFT被设置在非自对准工艺中，其中使用绝缘体125。

82. 发明授权

US07868328B2 Semiconductor device having antenna over thin film integrated circuit 有权
标题翻译：具有天线薄膜集成电路的半导体器件
公开(公告)号：US07868328B2
公开(公告)日：2011-01-11
申请号：US12362462
申请日：2009-01-29
申请人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
IPC分类号： H01L29/786
CPC分类号： H01L27/127 , H01L24/32 , H01L24/73 , H01L27/11526 , H01L27/11546 , H01L27/1214 , H01L27/13 , H01L29/78621 , H01L29/78624 , H01L29/78627 , H01L2029/7863 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/83385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0104 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/0106 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/07811 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/01014
摘要： The present invention provides a semiconductor device capable of being mass-produced and a manufacturing method of the semiconductor device. The present invention also provides a semiconductor device using an extreme thin integrated circuit and a manufacturing method of the semiconductor device. Further, the present invention provides a low power consumption semiconductor device and a manufacturing method of the semiconductor device. According to one aspect of the present invention, a semiconductor device that has a semiconductor nonvolatile memory element transistor over an insulating surface in which a floating gate electrode of the memory transistor is formed by a plurality of conductive particles or semiconductor particles is provided.
摘要翻译：本发明提供一种能够大规模生产的半导体器件和该半导体器件的制造方法。本发明还提供了使用极薄集成电路的半导体器件和半导体器件的制造方法。此外，本发明提供一种半导体器件的低功耗半导体器件和制造方法。根据本发明的一个方面，提供了一种在绝缘表面上具有半导体非易失性存储元件晶体管的半导体器件，其中存储晶体管的浮置栅电极由多个导电粒子或半导体粒子形成。

83. 发明授权

US07785947B2 Method for manufacturing semiconductor device comprising the step of forming nitride/oxide by high-density plasma 有权
标题翻译：用于制造半导体器件的方法包括通过高密度等离子体形成氮化物/氧化物的步骤
公开(公告)号：US07785947B2
公开(公告)日：2010-08-31
申请号：US11410188
申请日：2006-04-25
申请人： Atsuo Isobe , Satoshi Murakami , Shunpei Yamazaki
发明人： Atsuo Isobe , Satoshi Murakami , Shunpei Yamazaki
IPC分类号： H01L21/336
CPC分类号： H01L27/1266 , H01L27/1248 , H01L27/1255
摘要： In order to manufacture a highly reliable and compact TFT, it is an object of the present invention to provide a method for manufacturing a semiconductor device for forming a gate electrode, a source wiring and a drain wiring with high reliability, and a semiconductor device. In the method for manufacturing a semiconductor device, a semiconductor film is formed over a substrate having an insulated surface, a gate insulating film is formed over the semiconductor film, a gate electrode is formed over the gate insulating film, and a nitride film is formed over the surface of the gate electrode by nitriding the surface of the gate electrode by using high-density plasma.
摘要翻译：为了制造高度可靠且紧凑的TFT，本发明的目的是提供一种用于制造用于形成具有高可靠性的栅电极，源极布线和漏极布线的半导体器件的方法和半导体器件。在半导体器件的制造方法中，在具有绝缘面的基板上形成半导体膜，在半导体膜上形成栅极绝缘膜，在栅极绝缘膜上形成栅电极，形成氮化膜通过使用高密度等离子体氮化栅电极的表面，在栅电极的表面上。

84. 发明授权

US07745293B2 Method for manufacturing a thin film transistor including forming impurity regions by diagonal doping 有权
标题翻译：制造薄膜晶体管的方法，其包括通过对角掺杂形成杂质区域
公开(公告)号：US07745293B2
公开(公告)日：2010-06-29
申请号：US11148289
申请日：2005-06-09
申请人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
IPC分类号： H01L21/336
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/1285 , H01L27/1288 , H01L27/13 , H01L29/458 , H01L29/4908 , H01L29/78621 , H01L29/78624
摘要： It is an object of the present invention to manufacture a thin film transistor having a required property without complicating steps and devices. It is another object of the present invention to provide a technique for manufacturing a semiconductor device having high reliability and better electrical characteristics with a higher yield at lower cost. In the present invention, a lightly doped impurity region is formed in a source region side or a drain region side of a semiconductor layer covered with a gate electrode layer in a thin film transistor. The semiconductor layer is doped diagonally to the surface thereof using the gate electrode layer as a mask to form the lightly doped impurity region. Therefore, the properties of the thin film transistor can be minutely controlled.
摘要翻译：本发明的目的是制造具有所需性能的薄膜晶体管，而不会使步骤和装置复杂化。本发明的另一个目的是提供一种以更低的成本制造具有高可靠性和更好的电气特性并以较高产量获得的半导体器件的技术。在本发明中，在薄膜晶体管中由栅极电极层覆盖的半导体层的源区域侧或漏极区侧形成有轻掺杂杂质区。使用栅极电极层作为掩模将半导体层以其对面的方式对角地掺杂以形成轻掺杂杂质区域。因此，可以精细地控制薄膜晶体管的性质。

85. 发明授权

US07410839B2 Thin film transistor and manufacturing method thereof 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US07410839B2
公开(公告)日：2008-08-12
申请号：US11410071
申请日：2006-04-25
申请人： Atsuo Isobe , Shunpei Yamazaki
发明人： Atsuo Isobe , Shunpei Yamazaki
IPC分类号： H01L21/84 , H01L21/00 , H01L21/336 , H01L21/8234
CPC分类号： H01L27/1266 , H01L27/1214 , H01L27/3244 , H01L29/4908
摘要： The present invention provides a thin film transistor in which a substantial length of a channel is shortened to miniaturize a semiconductor device and a manufacturing method thereof. In addition, the present invention provides a semiconductor device which realizes high-speed operation and high-performance of the semiconductor device and a manufacturing method thereof. Further in addition, it is an object of the present invention to provide a manufacturing method in which a manufacturing process is simplified. The semiconductor device of the present invention has an island-shaped semiconductor film formed over a substrate having an insulating surface and a gate electrode formed over the island-shaped semiconductor film, in which the gate electrode is oxidized its surface by high-density plasma to be slimmed and the substantial length of a channel is shortened.
摘要翻译：本发明提供了一种薄膜晶体管，其中缩短了通道的相当长度以使半导体器件小型化及其制造方法。另外，本发明提供实现半导体器件的高速操作和高性能的半导体器件及其制造方法。另外，本发明的目的在于提供一种制造方法简化的制造方法。本发明的半导体器件具有岛状半导体膜，该岛状半导体膜形成在具有绝缘面的基板上，形成在岛状半导体膜上的栅电极，其中栅电极通过高密度等离子体将其表面氧化成缩小了通道的实际长度。

86. 发明授权

US07211502B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07211502B2
公开(公告)日：2007-05-01
申请号：US10806353
申请日：2004-03-23
申请人： Shunpei Yamazaki , Tetsuji Yamaguchi , Atsuo Isobe
发明人： Shunpei Yamazaki , Tetsuji Yamaguchi , Atsuo Isobe
IPC分类号： H01L21/44
CPC分类号： H01L21/76843 , G02F1/136227 , H01L21/76882
摘要： A method for manufacturing a semiconductor device in which lower cost can be realized, a wiring with favorable coverage can be formed in a contact hole having a large aspect ratio, wiring capacitance can be reduced and a multilayer wiring can be formed, can be provided. In order to obtain the semiconductor device, the following steps are required; forming a first conductive film which serves as a barrier so as to be in contact with an organic insulating film with an opening portion formed; forming a second conductive film including aluminum so as to be in contact with the first conductive film; or forming a nitride film so as to be in contact with the organic insulating film with the opening portion formed; patterning the nitride film; forming a first conductive film which serves as a barrier so as to be in contact with the nitride film; forming a second conductive film including aluminum so as to be in contact with first conductive film; and thereafter selectively performing a heat treatment under reduced pressure or in normal pressure, and flattening the second conductive film.
摘要翻译：一种制造可以实现更低成本的半导体器件的方法，可以在具有大纵横比的接触孔中形成具有良好覆盖的布线，可以减少布线电容并且可以形成多层布线。为了获得半导体器件，需要以下步骤：形成作为屏障的第一导电膜，以与形成有开口部的有机绝缘膜接触; 形成包含铝的第二导电膜以与第一导电膜接触; 或形成氮化物膜，以与形成有开口部的有机绝缘膜接触; 图案化氮化膜; 形成用作阻挡层以与氮化膜接触的第一导电膜; 形成包含铝的第二导电膜以与第一导电膜接触; 然后选择性地在减压或常压下进行热处理，并使第二导电膜变平。

87. 发明授权

US08835918B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08835918B2
公开(公告)日：2014-09-16
申请号：US13608039
申请日：2012-09-10
申请人： Shunpei Yamazaki , Atsuo Isobe , Toshinari Sasaki
发明人： Shunpei Yamazaki , Atsuo Isobe , Toshinari Sasaki
IPC分类号： H01L29/786 , H01L27/12
CPC分类号： H01L29/7869 , H01L27/1218 , H01L27/1225
摘要： To provide a transistor which includes an oxide semiconductor and is capable of operating at high speed or a highly reliable semiconductor device including the transistor, a transistor in which an oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer, which is embedded in a base insulating layer and whose upper surface is at least partly exposed from the base insulating layer, and a wiring layer provided above the oxide semiconductor layer is electrically connected to the electrode layer or a part of a low-resistance region of the oxide semiconductor layer, which overlaps with the electrode layer.
摘要翻译：为了提供包括氧化物半导体并且能够高速运行的晶体管或包括晶体管的高度可靠的半导体器件，提供了包括一对低电阻区域和沟道形成区域的氧化物半导体层的晶体管在基底绝缘层上嵌入并且其上表面至少部分地从基底绝缘层露出的电极层上，并且设置在氧化物半导体层上方的布线层电连接到电极层或电极层的一部分氧化物半导体层的低电阻区域与电极层重叠。

88. 发明授权

US08809992B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08809992B2
公开(公告)日：2014-08-19
申请号：US13356012
申请日：2012-01-23
申请人： Shunpei Yamazaki , Atsuo Isobe , Toshihiko Saito , Takehisa Hatano , Hideomi Suzawa , Shinya Sasagawa , Junichi Koezuka , Yuichi Sato , Shinji Ohno
发明人： Shunpei Yamazaki , Atsuo Isobe , Toshihiko Saito , Takehisa Hatano , Hideomi Suzawa , Shinya Sasagawa , Junichi Koezuka , Yuichi Sato , Shinji Ohno
IPC分类号： H01L29/786
CPC分类号： H01L29/66969 , H01L21/02488 , H01L21/02565 , H01L27/1225 , H01L29/786 , H01L29/78606 , H01L29/7869
摘要： A semiconductor device which includes an oxide semiconductor and has favorable electrical characteristics is provided. In the semiconductor device, an oxide semiconductor film and an insulating film are formed over a substrate. Side surfaces of the oxide semiconductor film are in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. A gate insulating film is formed on and in contact with the oxide semiconductor film. A gate electrode with sidewall insulating films is formed over the gate insulating film. A source electrode and a drain electrode are formed in contact with the oxide semiconductor film and the insulating film.
摘要翻译：提供了包括氧化物半导体并且具有良好的电特性的半导体器件。在半导体器件中，在衬底上形成氧化物半导体膜和绝缘膜。氧化物半导体膜的侧面与绝缘膜接触。氧化物半导体膜包括沟道形成区域和包含掺杂剂的区域，沟道形成区域夹在其间。栅极绝缘膜与氧化物半导体膜形成并接触。在栅绝缘膜上形成具有侧壁绝缘膜的栅电极。源电极和漏电极形成为与氧化物半导体膜和绝缘膜接触。

89. 发明申请

US20090194803A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090194803A1
公开(公告)日：2009-08-06
申请号：US12362462
申请日：2009-01-29
申请人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
IPC分类号： H01L29/788 , H01L23/04
CPC分类号： H01L27/127 , H01L24/32 , H01L24/73 , H01L27/11526 , H01L27/11546 , H01L27/1214 , H01L27/13 , H01L29/78621 , H01L29/78624 , H01L29/78627 , H01L2029/7863 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/83385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0104 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/0106 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/07811 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/01014
摘要： The present invention provides a semiconductor device capable of being mass-produced and a manufacturing method of the semiconductor device. The present invention also provides a semiconductor device using an extreme thin integrated circuit and a manufacturing method of the semiconductor device. Further, the present invention provides a low power consumption semiconductor device and a manufacturing method of the semiconductor device. According to one aspect of the present invention, a semiconductor device that has a semiconductor nonvolatile memory element transistor over an insulating surface in which a floating gate electrode of the memory transistor is formed by a plurality of conductive particles or semiconductor particles is provided.
摘要翻译：本发明提供一种能够大规模生产的半导体器件和该半导体器件的制造方法。本发明还提供了使用极薄集成电路的半导体器件和半导体器件的制造方法。此外，本发明提供一种半导体器件的低功耗半导体器件和制造方法。根据本发明的一个方面，提供了一种在绝缘表面上具有半导体非易失性存储元件晶体管的半导体器件，其中存储晶体管的浮置栅电极由多个导电粒子或半导体粒子形成。

90. 发明授权

US07504327B2 Method of manufacturing thin film semiconductor device 有权
标题翻译：制造薄膜半导体器件的方法
公开(公告)号：US07504327B2
公开(公告)日：2009-03-17
申请号：US11148426
申请日：2005-06-09
申请人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
IPC分类号： H01L21/425 , H01L21/00 , H01L21/84 , H01L21/8238 , H01L21/336
CPC分类号： H01L27/1214 , H01L21/26586 , H01L27/127 , H01L27/1274 , H01L29/66757 , H01L29/78624
摘要： In the invention, a low concentration impurity region is formed between a channel formation region and a source region or a drain region in a semiconductor layer and covered with a gate electrode layer in a thin film transistor The semiconductor layer is doped obliquely to the surface thereof using the gate electrode layer as a mask to form the low concentration impurity region. The semiconductor layer is formed to have an impurity region including an impurity element for imparting one conductivity which is different from conductivity of the thin film transistor, thereby being able to minutely control the properties of the thin film transistor.
摘要翻译：在本发明中，在半导体层中的沟道形成区域和源极区域或漏极区域之间形成低浓度杂质区域，并且在薄膜晶体管中被栅极电极层覆盖。半导体层倾斜地掺杂在其表面上使用栅极电极层作为掩模形成低浓度杂质区域。半导体层形成为具有包含用于赋予与薄膜晶体管的导电性不同的一种导电性的杂质元素的杂质区域，从而能够精细地控制薄膜晶体管的性质。

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