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81. 发明申请

US20120301569A1 PATTERN TRANSFERRING APPARATUS AND PATTERN TRANSFERRING METHOD 审中-公开
标题翻译：图案转印装置和图案转印方法
公开(公告)号：US20120301569A1
公开(公告)日：2012-11-29
申请号：US13574064
申请日：2010-12-28
申请人： Mitsuru Hasegawa , Masahiko Ogino , Keiji Sakaue , Kazunari Sugai , Daisuke Shimao
发明人： Mitsuru Hasegawa , Masahiko Ogino , Keiji Sakaue , Kazunari Sugai , Daisuke Shimao
IPC分类号： B29C59/04
CPC分类号： B29C33/58 , B29C37/0067 , B29C59/04
摘要： Provided is a pattern transferring apparatus (1A) which presses a belt-shaped mold (2) with a fine convex concave pattern and a transfer target material (3) against each other, releases the mold (2) from the transfer target material (3), thereby to transfer the convex concave pattern onto a surface of the transfer target material (3). The apparatus includes a pressing mechanism (4A) that presses the mold (2) and the transfer target material (3) against each other, and a supply mechanism for a mold releasing agent (7), which supplies a mold releasing agent to the mold (2). Accordingly, the pattern transferring apparatus (1A) may need no renewable process of the continuously used mold (2), allowing the excellent mold releasing performance of the mold (2) to be maintained.
摘要翻译：提供了一种图案转印装置（1A），其将细小凸凹图案的带状模具（2）和转印目标材料（3）彼此挤压，从转印目标材料（3）释放模具），从而将凸凹图案转印到转印目标材料（3）的表面上。该装置包括将模具（2）和转印目标材料（3）彼此挤压的按压机构（4A）和用于脱模剂（7）的供给机构，其将脱模剂供应到模具（2）。因此，图案转印装置（1A）不需要连续使用的模具（2）的可再生处理，能够保持模具（2）的脱模性优异。

82. 发明授权

US07294905B2 Thin film capacitor and electronic circuit component 有权
标题翻译：薄膜电容器和电子电路元件
公开(公告)号：US07294905B2
公开(公告)日：2007-11-13
申请号：US10483378
申请日：2002-07-12
申请人： Masahiko Ogino , Toshiya Satoh , Takao Miwa , Toshihide Nabatame , Satoru Amou
发明人： Masahiko Ogino , Toshiya Satoh , Takao Miwa , Toshihide Nabatame , Satoru Amou
IPC分类号： H01L29/00
CPC分类号： H01L27/0805 , H01L23/49822 , H01L2924/0002 , H01L2924/15311 , H05K1/162 , H01L2924/00
摘要： A thin film capacitor comprising a lower electrode formed on a predetermined surface, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, wherein the end portion of the lower electrode is further covered by an insulator other than the dielectric layer.
摘要翻译：一种薄膜电容器，包括形成在预定表面上的下电极，形成在下电极上的电介质层和形成在电介质层上的上电极，其中下电极的端部进一步被绝缘体覆盖，电介质层。

83. 发明授权

US07091620B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US07091620B2
公开(公告)日：2006-08-15
申请号：US11116209
申请日：2005-04-28
申请人： Chuichi Miyazaki , Yukiharu Akiyama , Masnori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Hiroshi Koyama , Akira Nagai , Masahiko Ogino
发明人： Chuichi Miyazaki , Yukiharu Akiyama , Masnori Shibamoto , Tomoaki Kudaishi , Ichiro Anjoh , Kunihiko Nishi , Asao Nishimura , Hideki Tanaka , Ryosuke Kimoto , Kunihiro Tsubosaki , Akio Hasebe , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Hiroshi Koyama , Akira Nagai , Masahiko Ogino
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/50 , H01L23/3114 , H01L23/3128 , H01L23/49572 , H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L24/06 , H01L24/45 , H01L24/48 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/06136 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/4824 , H01L2224/48465 , H01L2224/50 , H01L2224/85951 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00015 , H01L2224/05599
摘要： A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

84. 发明申请

US20050245061A1 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050245061A1
公开(公告)日：2005-11-03
申请号：US11168460
申请日：2005-06-29
申请人： Toshiya Satoh , Masahiko Ogino , Tadanori Segawa , Yoshihide Yamaguchi , Hiroyuki Tenmei , Atsushi Kazama , Ichiro Anjo , Asao Nishimura
发明人： Toshiya Satoh , Masahiko Ogino , Tadanori Segawa , Yoshihide Yamaguchi , Hiroyuki Tenmei , Atsushi Kazama , Ichiro Anjo , Asao Nishimura
IPC分类号： H01L23/29 , H01L21/301 , H01L21/3205 , H01L21/56 , H01L21/60 , H01L21/768 , H01L23/31 , H01L23/485 , H01L23/52 , H01L23/522 , H01L21/50
CPC分类号： H01L24/11 , H01L23/3192 , H01L24/13 , H01L2224/02125 , H01L2224/0231 , H01L2224/0236 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05171 , H01L2224/05548 , H01L2224/05644 , H01L2224/13099 , H01L2224/16 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/15787 , H01L2924/30107 , H01L2924/351 , H01L2924/00 , H01L2924/00014
摘要： The present invention is a semiconductor device having the semiconductor element obtained by cutting a semiconductor wafer with the electrode pad formed on one side along a scribe line, a semiconductor element protective layer on the semiconductor element which has a opening on the pad, a stress cushioning layer on the layer which has the opening on the pad, a lead wire portion reaching the layer from the electrode pad via the openings, external electrodes on the lead wire portion, and the conductor protective layer on the layers, the layer and the conductor protective layer forming the respective end faces on the end surface of the semiconductor element inside the scribe line and exposing the range from the end face of the end surface to the inside of the scribe line.
摘要翻译：本发明是一种具有半导体元件的半导体器件，该半导体器件通过沿着划线在一侧形成电极焊盘切割半导体晶片而获得，半导体元件保护层在半导体元件上具有在该焊盘上的开口，应力缓冲在该焊盘上具有开口的层上的引线部分，经由开口从电极焊盘到达层的引线部分，引线部分上的外部电极和层上的导体保护层，层和导体保护层层，形成在划线内的半导体元件的端面上的各个端面，并露出从端面的端面到划线的内侧的范围。

85. 发明授权

US06933601B2 Semiconductor connection substrate 失效
标题翻译：半导体连接基板
公开(公告)号：US06933601B2
公开(公告)日：2005-08-23
申请号：US10483383
申请日：2002-07-12
申请人： Toshiya Satoh , Masahiko Ogino , Takao Miwa , Takashi Naitou , Takashi Namekawa
发明人： Toshiya Satoh , Masahiko Ogino , Takao Miwa , Takashi Naitou , Takashi Namekawa
IPC分类号： H01L23/498 , H05K1/16 , H05K3/46 , H01L23/04 , H01L23/48
CPC分类号： H01L23/49827 , H01L23/49816 , H01L23/49822 , H01L23/49894 , H01L2924/0002 , H01L2924/12044 , H01L2924/19011 , H01L2924/3011 , H05K1/162 , H05K3/4602 , H05K2201/09509 , H05K2201/09763 , H01L2924/00
摘要： A semiconductor connection substrate which connects a semiconductor element to a mounting substrate such as a printed substrate comprises an insulator substrate, a plurality of electrodes having different areas provided on the insulator substrate, one or more elements selected from a capacitor element of dielectric material sandwiched between the electrodes, an inductor element and resistor element, a metal wiring connecting the elements, a metal terminal part of part of the metal wiring and an organic insulator material covering the elements and the circumference of the metal wiring portion excluding the metal terminal portion.
摘要翻译：将半导体元件连接到诸如印刷基板的安装基板的半导体连接基板包括绝缘体基板，设置在绝缘体基板上的具有不同区域的多个电极，一个或多个元件，它们被选自介于电极，电感器元件和电阻器元件，连接元件的金属布线，金属布线的一部分的金属端子部分和覆盖元件的有机绝缘体材料以及除了金属端子部分之外的金属布线部分的周边。

86. 发明申请

US20050166707A1 Method of recovering platinum group element and apparatus therefor 有权
标题翻译：铂族元素回收方法及其设备
公开(公告)号：US20050166707A1
公开(公告)日：2005-08-04
申请号：US10521818
申请日：2003-08-04
申请人： Koji Yamada , Masahiko Ogino , Nobuyasu Ezawa , Hiroshi Inoue
发明人： Koji Yamada , Masahiko Ogino , Nobuyasu Ezawa , Hiroshi Inoue
IPC分类号： B09B3/00 , B01J23/96 , B01J38/00 , C22B7/00 , C22B9/16 , C22B11/02 , C22B15/00 , C22B11/00
CPC分类号： C22B9/16 , C22B11/02 , C22B11/021 , C22B11/026 , C22B15/0054 , Y02P10/214
摘要： A method for recovering platinum group elements comprises charging into a closed electric furnace and melting, together with flux components and a reducing agent, a platinum group element-containing substance to be processed and a copper source material containing copper oxide, sinking molten metal of primarily metallic copper below a molten slag layer of primarily oxides, and enriching the platinum group elements in the molten metal sunk below, and is characterized in that molten slag whose copper content has decreased to 3.0 wt % or less is discharged from the electric furnace and that the copper source material charged into the electric furnace is a granular copper source material of a grain diameter of not less than 0.1 mm and not greater than 10 mm.
摘要翻译：回收铂族元素的方法包括：向封闭的电炉中加入熔融物，与助熔剂成分和还原剂一起熔化待加工的含铂族元素的物质和含有氧化铜的铜源材料，主要沉入熔融金属金属铜在主要氧化物的熔融渣层以下，并且将熔融金属中的铂族元素富集在下面，并且其特征在于，铜含量已降至3.0重量％以下的熔渣从电炉中排出，装入电炉的铜源材料是粒径不小于0.1mm且不大于10mm的粒状铜源材料。

87. 发明授权

US06515371B2 Semiconductor device with elastic structure and wiring 有权
标题翻译：具有弹性结构和布线的半导体器件
公开(公告)号：US06515371B2
公开(公告)日：2003-02-04
申请号：US09983177
申请日：2001-10-23
申请人： Yukiharu Akiyama , Tomoaki Kudaishi , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Asao Nishimura , Ichiro Anjo , Kunihiro Tsubosaki , Chuichi Miyazaki , Hiroshi Koyama , Masanori Shibamoto , Akira Nagai , Masahiko Ogino
发明人： Yukiharu Akiyama , Tomoaki Kudaishi , Takehiro Ohnishi , Noriou Shimada , Shuji Eguchi , Asao Nishimura , Ichiro Anjo , Kunihiro Tsubosaki , Chuichi Miyazaki , Hiroshi Koyama , Masanori Shibamoto , Akira Nagai , Masahiko Ogino
IPC分类号： H01L2348
CPC分类号： H01L24/50 , H01L23/3114 , H01L23/49572 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/1433 , H01L2924/3025
摘要： A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.
摘要翻译：一种半导体器件，包括在其主表面的周边部分中具有连接端子的半导体芯片; 设置在主表面上的弹性体，使连接端子露出; 绝缘带，形成在弹性体上并且在连接端子所在的区域中具有开口; 多个引线形成在绝缘带的顶表面上，每个引线的一端连接到一个连接端子，另一端设置在弹性体上; 形成在多个引线的另一端上的多个凸起电极; 以及用于密封连接端子和每个引线的一端的树脂体，其中绝缘带突出超过设置有多个连接端子的芯片，并且其中树脂体的形状受到绝缘胶带

88. 发明授权

US08366991B2 Apparatus for recovering platinum group elements 有权
标题翻译：用于回收铂族元素的装置
公开(公告)号：US08366991B2
公开(公告)日：2013-02-05
申请号：US12883729
申请日：2010-09-16
申请人： Koji Yamada , Masahiko Ogino , Nobuyasu Ezawa , Hiroshi Inoue
发明人： Koji Yamada , Masahiko Ogino , Nobuyasu Ezawa , Hiroshi Inoue
IPC分类号： C21B7/00
CPC分类号： C22B9/16 , C22B11/02 , C22B11/021 , C22B11/026 , C22B15/0054 , Y02P10/214
摘要： An apparatus for recovering platinum group elements comprises a furnace body having an interior space substantially shot off from external air, a material charging port and an exhaust port provided in an upper half of the furnace body, at least two fluid discharge ports provided in a lower half of the furnace body at different height levels. a material charging chute connected to the material charging port. an exhaust unit connected to the exhaust port; and electrodes for passing electric current through and heating material charged into the furnace. The material charging chute is equipped with a vertical two stage shutter so as to maintain airtightness when material is charged into the interior space of the furnace.
摘要翻译：用于回收铂族元件的装置包括：炉体，其具有基本上从外部空气射出的内部空间;设置在炉体上半部的材料加料口和排气口，设置在下部的至少两个流体排出口一半的炉体在不同的高度水平。材料充电槽连接到材料充电口。连接到排气口的排气单元; 以及用于使电流通过并加热到炉中的材料的电极。材料装料槽装备有一个垂直的两级挡板，以便当材料装入炉子的内部空间时保持气密性。

89. 发明授权

US07887723B2 Site-selectively modified micro-and nanostructures and the methods of their fabrication 有权
标题翻译：位点选择性修饰的微观和纳米结构及其制造方法
公开(公告)号：US07887723B2
公开(公告)日：2011-02-15
申请号：US11623817
申请日：2007-01-17
申请人： Kenji Murao , Kosuke Kuwabara , Masahiko Ogino
发明人： Kenji Murao , Kosuke Kuwabara , Masahiko Ogino
IPC分类号： B29C65/00
CPC分类号： B81C1/0046 , B29C43/021 , B29C2043/025 , B81B2201/0214 , B81B2203/0361 , B81C2201/0153 , B82Y10/00 , B82Y15/00 , B82Y40/00 , G03F7/0002
摘要： It is an object of the present invention to provide a method which can easily and selectively modify specific sites on indentations or protrusions of indentation/protrusion structures fabricated by nano-imprinting. Pressing a mold having indentation/protrusion structures onto a polymer substrate comprising at least two layers of different chemical composition exposes the second layer, which has been covered by the outermost layer, in pillars formed as a result of the pressing. Site-specific chemical modification of the pillars can be achieved by formulating a desired chemical composition for the second layer beforehand, or by chemical modification of the exposed second layer cross-sections in the pillars.
摘要翻译：本发明的一个目的是提供一种方法，其可以容易且选择性地改变通过纳米压印制造的压痕/突起结构的凹陷或凸起上的特定部位。将具有凹陷/突起结构的模具压到包含至少两层不同化学组成的聚合物基材上，将由最外层覆盖的第二层暴露在由压制形成的柱中。可以通过预先为第二层配制所需的化学组合物，或者通过化学修饰柱中暴露的第二层横截面来实现柱的特定位点的化学修饰。

90. 发明授权

US07654815B2 Belt-shaped mold and nanoimprint system using the belt-shaped mold 失效
标题翻译：带状模具和纳米压印系统使用带状模具
公开(公告)号：US07654815B2
公开(公告)日：2010-02-02
申请号：US12191326
申请日：2008-08-14
申请人： Mitsuru Hasegawa , Masahiko Ogino
发明人： Mitsuru Hasegawa , Masahiko Ogino
IPC分类号： B29C59/04
CPC分类号： B29C59/04 , B29C2059/023 , B82Y10/00 , B82Y40/00 , G03F7/0002 , Y10S977/887
摘要： There is provided a fine pattern transfer, belt-shaped mold, with which a fine structure having a high aspect ratio can be formed rapidly and stably using nanoimprinting, and a fine pattern transfer system (a nanoimprint system) that employs this mold. According to the present invention, a nanoimprint mold includes: a belt-shaped support member; a plurality of stampers, for each of which a fine convex-and-concave pattern, to be transferred, is formed on one surface; and an adhesive member, to which the belt-shaped support member and the stampers are to be securely adhered, wherein the adhesive member includes a porous member and adhesive layers, which are deposited on either face of the porous member, for impregnating one part of the porous member, and wherein, for the porous member, a porous area that is not impregnated with the adhesive layers, is provided and positioned so as to sandwich the porous member between portions impregnated with the adhesive layers.
摘要翻译：提供了一种精细图案转印，带状模具，利用其可以使用纳米压印快速且稳定地形成具有高纵横比的精细结构，并且使用该模具的精细图案转印系统（纳米压印系统）。根据本发明，纳米压印模具包括：带状支撑构件; 在一个表面上形成多个刻印机，每个都要在其上形成要转印的细凹凸图案; 以及粘合构件，其中带状支撑构件和压模应牢固地粘附到该粘合构件上，其中粘合构件包括多孔构件和粘合剂层，其沉积在多孔构件的任一面上，用于浸渍一部分多孔构件，并且其中，对于多孔构件，设置并定位未浸渍有粘合剂层的多孔区域，以将多孔构件夹在浸渍有粘合剂层的部分之间。

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