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81. 发明申请

US20110214029A1 SYSTEM AND METHOD FOR MULTI-DIMENSIONAL DECODING 有权
标题翻译：用于多维解码的系统和方法
公开(公告)号：US20110214029A1
公开(公告)日：2011-09-01
申请号：US13036622
申请日：2011-02-28
申请人： Avi STEINER , Hanan Weingarten
发明人： Avi STEINER , Hanan Weingarten
IPC分类号： H03M13/03 , G06F11/10
CPC分类号： H03M13/2963 , G06F11/1012 , H03M13/2918 , H03M13/2927 , H03M13/451
摘要： A system and method for soft decoding data. A plurality of candidate error corrections may be generated to correct one or more data bits having soft bit information. Each candidate error correction may define suggested changes to the data bits and is associated with a soft bit value. The soft bit values associated the plurality of candidate error corrections may be mapped to a uniform scale, for example, a uniform finite or integer grid. The plurality of candidate error corrections may be ordered to have combined associated mapped values in a monotonically non-decreasing order. One or more of the plurality of candidate error corrections may be soft decoded in the order of the associated mapped values by a decoding operation for each candidate error correction therein with the associated non-mapped soft bit values.
摘要翻译：一种用于软解码数据的系统和方法。可以生成多个候选误差校正以校正具有软位信息的一个或多个数据位。每个候选纠错可以定义对数据位的建议改变，并且与软比特值相关联。与多个候选误差校正相关联的软比特值可以被映射到统一的比例，例如均匀的有限或整数网格。多个候选错误校正可以被排序为具有以单调非递减顺序的组合的相关映射值。多个候选误差校正中的一个或多个可以通过对其中的每个候选误差校正的解码操作以相关联的映射的软比特值按照相关联的映射值的顺序进行软解码。

82. 发明申请

US20100211833A1 SYSTEMS AND METHODS FOR AVERAGING ERROR RATES IN NON-VOLATILE DEVICES AND STORAGE SYSTEMS 有权
标题翻译：在非易失性设备和存储系统中平均误差率的系统和方法
公开(公告)号：US20100211833A1
公开(公告)日：2010-08-19
申请号：US12595964
申请日：2008-09-17
申请人： Hanan Weingarten
发明人： Hanan Weingarten
IPC分类号： G06F12/02 , G06F11/00
CPC分类号： G11C29/82 , G06F11/1068 , G11C2029/0411
摘要： A system for storing a plurality of logical pages in a set of at least one flash device, each flash device including a set of at least one erase block, the system comprising apparatus for distributing at least one of the plurality of logical pages over substantially all of the erase blocks in substantially all of the flash devices, thereby to define, for at least one logical page, a sequence of pagelets thereof together including all information on the logical page and each being stored within a different erase block in the set of erase blocks; and apparatus for reading each individual page from among the plurality of logical pages including apparatus for calling and ordering the sequence of pagelets from different erase blocks in the set of erase blocks.
摘要翻译：一种用于将至少一个闪存设备的集合中的多个逻辑页面存储的系统，每个闪存设备包括一组至少一个擦除块，所述系统包括用于基本上全部分发所述多个逻辑页面中的至少一个的装置基本上所有闪存器件中的擦除块，从而为至少一个逻辑页定义其小页序列，其中包括逻辑页面上的所有信息，并且每个存储在擦除组中的不同擦除块内块以及用于从多个逻辑页面中读取每个单独页面的装置，包括用于从该组擦除块中的不同擦除块调用和排序小页的序列的装置。

83. 发明申请

US20100199149A1 FLASH MEMORY APPARATUS AND METHODS USING A PLURALITY OF DECODING STAGES INCLUDING OPTIONAL USE OF CONCATENATED BCH CODES AND/OR DESIGNATION OF "FIRST BELOW" CELLS 有权
标题翻译：闪存存储器装置和使用多个解码阶段的方法，包括可选择使用固定的BCH代码和/或指定“第一个”单元格
公开(公告)号：US20100199149A1
公开(公告)日：2010-08-05
申请号：US12667386
申请日：2008-09-17
申请人： Hanan Weingarten , Shmuel Levy , Michael Katz
发明人： Hanan Weingarten , Shmuel Levy , Michael Katz
IPC分类号： H03M13/05 , G06F11/10 , G06F12/00
CPC分类号： G06F11/1044 , G06F11/1068 , G11C11/5621 , G11C11/5692 , G11C29/00
摘要： A method for decoding a plurality of flash memory cells which are error-correction-coded as a unit, the method comprising providing a hard-decoding success indication indicating whether or not hard-decoding is at least likely to be successful; and soft-decoding the plurality of flash memory cells at a first resolution only if the hard-decoding success indication indicates that the hard-decoding is not at least likely to be successful.
摘要翻译：一种用于对作为单元进行纠错编码的多个闪存单元进行解码的方法，所述方法包括提供硬解码成功指示，指示硬解码是否至少可能成功; 以及仅当所述硬解码成功指示指示所述硬解码最不可能成功时，以所述第一分辨率对所述多个闪存单元进行软解码。

84. 发明申请

US20100146192A1 METHODS FOR ADAPTIVELY PROGRAMMING FLASH MEMORY DEVICES AND FLASH MEMORY SYSTEMS INCORPORATING SAME 有权
标题翻译：用于适应性编程FLASH存储器件的方法和包含其的闪存存储器系统
公开(公告)号：US20100146192A1
公开(公告)日：2010-06-10
申请号：US12596680
申请日：2008-09-17
申请人： Hanan Weingarten , Erez Sabbag , Michael Katz
发明人： Hanan Weingarten , Erez Sabbag , Michael Katz
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G11C11/5628 , G11C16/10 , G11C16/3418 , G11C16/349
摘要： A method for programming a plurality of data sequences into a corresponding plurality of flash memory functional units using a programming process having at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, the method comprising providing at least one indication of at least one varying situational characteristic and determining a value for said at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, for each flash memory functional unit, depending at least partly on said indication of said varying characteristic; and, for each individual flash memory functional unit from among said plurality of flash memory functional units, programming a sequence of bits into said individual flash memory functional unit using a programming process having at least one selectable parameter, said at least one selectable parameter being set at said value determined for said individual flash memory functional unit.
摘要翻译：一种用于使用编程处理将多个数据序列编程到相应的多个闪速存储器功能单元中的方法，所述编程处理具有控制给定数据序列的编程过程的持续时间的至少一个可选择的编程持续时间控制参数，所述方法包括：至少一个变化的情境特征的指示，并且至少部分地基于每个闪存功能单元确定用于所述至少一个可选择的编程持续时间控制参数的值，用于控制给定数据序列的编程过程的持续时间所述指示所述变化的特征; 并且对于来自所述多个闪存功能单元的每个单独的闪速存储器功能单元，使用具有至少一个可选参数的编程处理将一系列比特编程到所述单独闪存功能单元中，所述至少一个可选参数被设置以所述个别闪存功能单元确定的所述值。

85. 发明申请

US20100058146A1 CHIEN-SEARCH SYSTEM EMPLOYING A CLOCK-GATING SCHEME TO SAVE POWER FOR ERROR CORRECTION DECODER AND OTHER APPLICATIONS 有权
标题翻译：采用时钟校正方式的CHIEN-SEARCH系统，用于保存错误校正解码器和其他应用的电源
公开(公告)号：US20100058146A1
公开(公告)日：2010-03-04
申请号：US12595640
申请日：2008-09-17
申请人： Hanan Weingarten , Eli Sterin , Ofir Avraham Kanter
发明人： Hanan Weingarten , Eli Sterin , Ofir Avraham Kanter
IPC分类号： H03M13/05 , H03M13/15 , H03M13/07 , G06F11/10 , G06F1/26
CPC分类号： H03M13/1545 , H03M13/1515 , H03M13/152
摘要： Chien search apparatus operative to evaluate an error locator polynomial having a known rank and including a sequence of terms for each element in a finite field whose elements correspond respectively to bits in each of a stream of data blocks to be decoded, the apparatus comprising a sequence of functional units each operative to compute a corresponding term in the sequence of terms included in the error locator polynomial, each term having a degree; and a power saving unit operative to de-activate at least one individual functional unit from among the sequence of functional units, the individual functional unit being operative, when active, to compute a term whose degree exceeds the rank.
摘要翻译： Chien搜索装置用于评估具有已知秩的误差定位多项式，并且包括其有限域中的每个元素的项的序列，其元素分别对应于要解码的数据块流中的每一个中的比特，所述装置包括序列每个功能单元各自操作以计算包括在误差定位器多项式中的项序列中的对应项，每个项具有度; 以及功率节省单元，其用于从所述功能单元序列中去激活至少一个单独的功能单元，所述单个功能单元在活动时可操作，以计算其度数超过所述等级的项。

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