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81. 发明申请

US20110243473A1 IMAGE ENHANCEMENT METHOD AND APPARATUSES UTILIZING THE SAME 有权
标题翻译：图像增强方法和使用其的设备
公开(公告)号：US20110243473A1
公开(公告)日：2011-10-06
申请号：US12752270
申请日：2010-04-01
申请人： Shing-Chia Chen , Biing-Seng Wu , Lin-Kai Bu , Kuei-Hsiang Chen
发明人： Shing-Chia Chen , Biing-Seng Wu , Lin-Kai Bu , Kuei-Hsiang Chen
IPC分类号： G06K9/40
CPC分类号： G06T5/007 , G06T2207/20012 , G06T2207/20016 , G06T2207/20021 , G09G3/2011 , G09G3/3406 , G09G2320/064 , G09G2320/0646 , G09G2320/0673
摘要： An image enhancement apparatus is provided. The image enhancement apparatus includes a global tone mapping curve generator, a local tone mapping curve generator, a reference gamma voltage generator and an image generator. The global tone mapping curve generator generates a global tone mapping curve for an input image according to global characteristic(s) of the input image. The local tone mapping curve generator generates a local tone mapping curve for each image partition within the input image according to the global tone mapping curve and further a feature of the image partition. The reference gamma voltage generator generates a plurality of reference gamma voltages for each image partition according to the corresponding local tone mapping curve for the image partition. The image generator generates an output image according to the reference gamma voltages of the image partitions and the input image.
摘要翻译：提供了一种图像增强装置。图像增强装置包括全局色调映射曲线发生器，局部色调映射曲线发生器，参考伽马电压发生器和图像发生器。全局色调映射曲线生成器根据输入图像的全局特性为输入图像生成全局色调映射曲线。本地色调映射曲线生成器根据全局色调映射曲线生成输入图像内的每个图像分区的本地色调映射曲线，并且还可以生成图像分区的特征。参考伽马电压发生器根据图像分区的相应局部色调映射曲线为每个图像分区生成多个参考伽玛电压。图像发生器根据图像分区和输入图像的参考伽玛电压生成输出图像。

82. 发明申请

US20110235738A1 SYSTEM AND METHOD FOR GENERATING TEST PATTERNS OF BASELINE WANDER 有权
标题翻译：用于生成基线测量仪的系统和方法
公开(公告)号：US20110235738A1
公开(公告)日：2011-09-29
申请号：US12731430
申请日：2010-03-25
申请人： TIEN-JU TSAI
发明人： TIEN-JU TSAI
IPC分类号： H04L25/49
CPC分类号： H03M5/20
摘要： A system and method for generating test patterns of baseline wander, such as worst-case test patterns commonly referred to as killer packets. The number of steps required to cycle an output of a multi-level encoder in order to arrive at an anticipated level is determined. A test packet generator then generates the test patterns according to the determined steps and the state of a scrambler.
摘要翻译：用于产生基线漂移的测试模式的系统和方法，例如通常被称为杀手包的最坏情况测试模式。确定为了达到预期水平而循环多电平编码器的输出所需的步骤数。然后，测试分组生成器根据确定的步骤和加扰器的状态生成测试模式。

83. 发明授权

US08018357B1 System and method for generating test patterns of baseline wander 有权
标题翻译：用于生成基线漂移测试模式的系统和方法
公开(公告)号：US08018357B1
公开(公告)日：2011-09-13
申请号：US12731430
申请日：2010-03-25
申请人： Tien-Ju Tsai
发明人： Tien-Ju Tsai
IPC分类号： H03M5/02
CPC分类号： H03M5/20
摘要： A system and method for generating test patterns of baseline wander, such as worst-case test patterns commonly referred to as killer packets. The number of steps required to cycle an output of a multi-level encoder in order to arrive at an anticipated level is determined. A test packet generator then generates the test patterns according to the determined steps and the state of a scrambler.
摘要翻译：用于产生基线漂移的测试模式的系统和方法，例如通常被称为杀手包的最坏情况测试模式。确定为了达到预期水平而循环多电平编码器的输出所需的步骤数。然后，测试分组生成器根据确定的步骤和加扰器的状态生成测试模式。

84. 发明授权

US07961122B1 Multi-bin CABAC bypass bin decoder 有权
标题翻译：多槽CABAC旁路箱解码器
公开(公告)号：US07961122B1
公开(公告)日：2011-06-14
申请号：US12699818
申请日：2010-02-03
申请人： Chien-Chang Lin
发明人： Chien-Chang Lin
IPC分类号： H03M7/00
CPC分类号： H03M7/4006
摘要： A parallel based 5 bypass bin CABAC decoder may include a 3 bypass bins decoder appropriately coupled to a 2 bypass bins decoder. The 3 bypass bins decoder may have a first input receiving a bitstream, a second input receiving range values, a first output outputting a first bypass bin, a second output outputting a second bypass bin, a third output outputting a third bypass bin, and a fourth output outputting a shifted bitstream to the 2 bypass bins decoder. The 2 bypass bins decoder may have a first input to receive the shifted bitstream, a second input to receive the range values, a first output outputting a fourth bypass bin, and a second output outputting a fifth bypass bin.
摘要翻译：并行的5旁路箱CABAC解码器可以包括适当地耦合到2个旁路箱解码器的3个旁路箱解码器。 3旁路箱解码器可以具有接收比特流的第一输入，第二输入接收范围值，输出第一旁路仓的第一输出，输出第二旁路仓的第二输出，输出第三旁路仓的第三输出和第四输出将移位的比特流输出到2个旁路箱解码器。 2旁路箱解码器可以具有用于接收移位的比特流的第一输入，接收范围值的第二输入，输出第四旁路槽的第一输出和输出第五旁路仓的第二输出。

85. 发明申请

US20110085081A1 VIDEO HORIZONTAL SYNCHRONIZER 有权
标题翻译：视频水平同步器
公开(公告)号：US20110085081A1
公开(公告)日：2011-04-14
申请号：US12577838
申请日：2009-10-13
申请人： Tien-Ju Tsai
发明人： Tien-Ju Tsai
IPC分类号： H03L7/00 , H04N5/04
CPC分类号： H04N5/04 , H03L7/0805 , H03L7/081 , H03L7/085 , H03L2207/50
摘要： A video horizontal synchronizer outputting a line timing signal and an indicating flag of a received video signal for use in a video signal post-processing unit, including a filter outputting a wide bandwidth filtered and a narrow bandwidth filtered signals of the received video signal, a dynamic slicer threshold generator generating a slicer threshold, a timing recovery circuit generating a phase error and the line timing signal, a phase error statistics circuit averaging the phase error to generate a average phase error, a HSYNC checker generating a matching flag indicating whether a periodic pattern appears in the narrow bandwidth filtered signal according to the line timing signal, and a finite state machine controlling the dynamic slicer threshold generator, the timing recovery circuit, the phase error statistics circuit and the HSYNC checker and generating an indicating flag when the average phase error is small enough and the matching flag is confirmed.
摘要翻译：输出用于视频信号后处理单元的接收视频信号的行定时信号和指示标志的视频水平同步器，包括输出接收到的视频信号的宽带宽滤波信号和窄带宽滤波信号的滤波器，产生切片器阈值的动态切片器阈值生成器，产生相位误差的定时恢复电路和线路定时信号;相位误差统计电路，对相位误差进行平均以产生平均相位误差; HSYNC检查器，产生指示周期性模式根据线路定时信号出现在窄带宽滤波信号中，有限状态机控制动态限幅器阈值发生器，定时恢复电路，相位误差统计电路和HSYNC检验器，并且当平均相位错误足够小，并且确认了匹配标志。

86. 发明授权

US07924204B2 Stage-resolution scalable opamp-sharing technique for pipelined/cyclic ADC 有权
标题翻译：流水线/循环ADC的阶段分辨率可扩展运算放大器共享技术
公开(公告)号：US07924204B2
公开(公告)日：2011-04-12
申请号：US12247186
申请日：2008-10-07
申请人： Soon-Jyh Chang , Jin-Fu Lin , Chih-Haur Huang
发明人： Soon-Jyh Chang , Jin-Fu Lin , Chih-Haur Huang
IPC分类号： H03M1/38
CPC分类号： H03M1/1225 , H03M1/0695 , H03M1/162 , H03M1/164 , H03M1/40 , H03M1/44
摘要： An analog-to-digital converter (ADC) for pipelined ADCs or cyclic ADCs is disclosed. The ADC includes at least one pair of two stages connected in series, and the two stages have different bits of resolution. An amplifier is shared by the pair of two stages such that the two stages operate in an interleaved manner. Accordingly, this stage-resolution scalable opamp-sharing technique is adaptable for pipelined ADC or cyclic ADC, which substantially reduces power consumption and increases operating speed.
摘要翻译：公开了一种用于流水线ADC或循环ADC的模数转换器（ADC）。 ADC包括串联连接的至少一对两个级，两级具有不同的分辨率。放大器由一对两个级共享，使得两个级以交错方式操作。因此，这种阶段分辨率可扩展的运算放大器共享技术适用于流水线ADC或循环ADC，这大大降低了功耗并提高了运行速度。

87. 发明申请

US20110060431A1 AUDIO OUTPUT DEVICES 审中-公开
标题翻译：音频输出设备
公开(公告)号：US20110060431A1
公开(公告)日：2011-03-10
申请号：US12555922
申请日：2009-09-09
申请人： Chih-Haur Huang
发明人： Chih-Haur Huang
IPC分类号： G06F17/00 , H03M1/12
CPC分类号： H03M1/186 , H03G3/001 , H04R3/12
摘要： An audio output device is provided and includes a signal source, a detector, a plurality of digital-to-analog converters, and a plurality of amplifiers. The signal source generates a plurality of digital signals. The detector receives the digital signals and detects states of the digital signals to generate a plurality of control signals according to the detection results respectively. The digital-to-analog converters receive the digital signals and convert the digital signals to a plurality of analog signals, respectively. The amplifiers receive the analog signals and generate a plurality of amplified signals according to the control signals, respectively.
摘要翻译：提供音频输出装置，并包括信号源，检测器，多个数模转换器和多个放大器。信号源产生多个数字信号。检测器接收数字信号并检测数字信号的状态，分别根据检测结果产生多个控制信号。数模转换器接收数字信号并将数字信号分别转换成多个模拟信号。放大器分别接收模拟信号并根据控制信号产生多个放大信号。

88. 发明申请

US20110025926A1 SOUND INTERMEDIATE FREQUENCY DEMODULATOR AND SOUND INTERMEDIATE FREQUENCY DETECTING METHOD THEREOF 有权
标题翻译：声频中频解调器及其中音频检测方法
公开(公告)号：US20110025926A1
公开(公告)日：2011-02-03
申请号：US12510270
申请日：2009-07-28
申请人： Shih-Chuan Lu , Tien-Ju Tsai , Yen-Ming Lin
发明人： Shih-Chuan Lu , Tien-Ju Tsai , Yen-Ming Lin
IPC分类号： H04N5/60
CPC分类号： H04N5/60 , H04N5/605
摘要： A sound-IF demodulator including a first demodulating unit and a second demodulating unit and a sound-IF detecting method thereof are provided. A sound de-matrix unit is adapted to generate a driving signal by de-matrixing outputs of the sound-IF demodulator. The first demodulating unit generates a first demodulated signal to the sound de-matrix unit by demodulating the first carrier signal. The second demodulating unit detects the signal quality of the sound signal and generates a second demodulated signal to the sound de-matrix unit and/or the first demodulating unit by demodulating the second carrier signal. When the second demodulating unit is idle, the second demodulating unit is programmed to select a corresponding standard among a plurality of predetermined standards for the sound signal according to the signal quality of the sound signal, so that the sound-IF demodulator is programmed to demodulate the sound signal in the corresponding standard.
摘要翻译：提供了包括第一解调单元和第二解调单元以及声音IF检测方法的声音中频解调器。声音解矩阵单元适于通过对声 - IF解调器的输出进行去矩阵化来产生驱动信号。第一解调单元通过对第一载波信号进行解调来生成对声音去矩阵单元的第一解调信号。第二解调单元检测声音信号的信号质量，并通过对第二载波信号进行解调来产生第二解调信号给声音去矩阵单元和/或第一解调单元。当第二解调单元空闲时，第二解调单元被编程为根据声音信号的信号质量在声音信号的多个预定标准中选择相应的标准，使得声IF解调器被编程为解调声音信号在相应的标准。

89. 发明申请

US20110019091A1 Method and System of Automatically Correcting a Sampling Clock in a Digital Video System 有权
标题翻译：在数字视频系统中自动校正采样时钟的方法和系统
公开(公告)号：US20110019091A1
公开(公告)日：2011-01-27
申请号：US12510242
申请日：2009-07-27
申请人： Yin-Ho Chiang , Shih-Chou Yang
发明人： Yin-Ho Chiang , Shih-Chou Yang
IPC分类号： H03L7/00
CPC分类号： H03L7/091 , G09G5/008 , H03L7/0807 , H03M1/1255
摘要： A method and system of automatically correcting a sampling clock in a digital video system are disclosed. Sampling clocks with different phases are generated and subjected in turn to analog-to-digital conversion (ADC). A difference of at least a pair of neighboring data out of the ADC with respect to each phase is determined. A maximum difference is determined, and the sampling clock with the phase corresponding to the maximum difference is thus generated.
摘要翻译：公开了一种在数字视频系统中自动校正采样时钟的方法和系统。生成具有不同相位的采样时钟，并依次进行模数转换（ADC）。确定ADC相对于每个相位的至少一对相邻数据的差异。确定最大差异，从而生成具有对应于最大差的相位的采样时钟。

90. 发明申请

US20110004810A1 Method and System of Receiving Data with Enhanced Error Correction 审中-公开
标题翻译：增强纠错接收数据的方法和系统
公开(公告)号：US20110004810A1
公开(公告)日：2011-01-06
申请号：US12498345
申请日：2009-07-06
申请人： TIEN-JU TSAI , SHIANG-LUN KAO
发明人： TIEN-JU TSAI , SHIANG-LUN KAO
IPC分类号： H03M13/45 , G06F11/10
CPC分类号： H04L1/0045 , H03M13/45 , H03M13/6577
摘要： A method and system of receiving data with enhanced error correction is disclosed. One or more reliability bits associated with each received data bit are generated, for example, by a soft-decision slicer. Subsequently, one or more errors of the data bits may be corrected according to the associated reliability bit(s).
摘要翻译：公开了一种接收具有增强纠错的数据的方法和系统。与每个接收的数据位相关联的一个或多个可靠性位例如由软判决限幅器产生。随后，可以根据相关联的可靠性位来校正数据位的一个或多个错误。

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