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    • 71. 发明授权
    • Periodic waveform generating circuit
    • 周期波形发生电路
    • US5770958A
    • 1998-06-23
    • US831995
    • 1997-04-01
    • Kunihiro AraiHideaki Matsuzaki
    • Kunihiro AraiHideaki Matsuzaki
    • H03K3/313H03K3/356H03K3/357H03K3/36H03K17/56H03K19/08H03B19/00H03K17/70
    • H03K3/356H03K3/357H03K3/36
    • A first partial circuit is formed by grounding the emitter electrode of a first negative differential resistive element, connecting the emitter electrode of a second negative differential resistive element to the collector electrode of the first negative differential resistive element, and connecting a first field-effect transistor in parallel with the first negative differential resistive element. A second partial circuit is formed by grounding the emitter electrode of a third negative differential resistive element, connecting the emitter electrode of a fourth negative differential resistive element to the collector electrode of the third negative differential resistive element, and connecting a second field-effect transistor in parallel with the third negative differential resistive element. An output from the first partial circuit is input to the input of the second partial circuit. The inversion of the output of the second partial circuit is input to the input of the first partial circuit. A clock signal and a signal whose phase is opposite to that of the clock signal are applied to the collector electrodes of the second and fourth negative differential resistive elements, respectively. A frequency-divided signal of the clock signal is output from each partial circuit.
    • 第一部分电路是通过将第一负差分电阻元件的发射电极与第一负差分电阻元件的发射电极连接到第一负差分电阻元件的集电极并将第一场效应晶体管 与第一负差分电阻元件并联。 通过将第三负差分电阻元件的发射电极与第三负差分电阻元件的发射极连接到第三负差分电阻元件的集电极,并将第二场效应晶体管连接起来形成第二部分电路 与第三负差分电阻元件并联。 来自第一部分电路的输出被输入到第二部分电路的输入端。 第二部分电路的输出的反相输入到第一部分电路的输入端。 时钟信号和与时钟信号的相位相反的信号分别被施加到第二和第四负差分电阻元件的集电极。 从每个部分电路输出时钟信号的分频信号。
    • 74. 发明授权
    • Multi-stage electronic switching network
    • 多级电子切换网络
    • US3692949A
    • 1972-09-19
    • US3692949D
    • 1971-05-03
    • ITT
    • JOVIC NIKOLA L
    • H03K17/70H04Q3/52H04Q3/42
    • H04Q3/521H03K17/70
    • A self-seeking current controlled electronic switching network comprised of a plurality of cascaded stages of switching matrices. Each vertical multiple has an associate RC network for controlling the duration of the turned-on time period of the crosspoints during a route search. The RC circuit controlled time periods are selected to make each stage of the network run at an independent frequency, the frequencies being selected as a function of (a) the dynamic biasing changes which occur in the crosspoints responsive to the turning on and off, (b) the dynamic tapering which occurs in the network responsive to busy vertical conditions, and (c) the frequency of preceding stages.
    • 一种自寻电流控制电子开关网络,由多个级联级的开关矩阵组成。 每个垂直倍数具有一个辅助RC网络,用于在路线搜索期间控制交叉点的接通时间段的持续时间。 选择RC电路控制的时间段以使网络的每个阶段以独立的频率运行,频率被选择为(a)响应于导通和关断在交叉点中发生的动态偏置改变的函数( b)响应于垂直垂直条件的网络发生的动态渐变,(c)前一阶段的频率。