专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

71. 发明授权

US07633343B2 Fully differential amplifier 有权
标题翻译：全差分放大器
公开(公告)号：US07633343B2
公开(公告)日：2009-12-15
申请号：US12121118
申请日：2008-05-15
申请人： Wien-Hua Chang
发明人： Wien-Hua Chang
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F3/45632 , H03F3/45659 , H03F2203/45082 , H03F2203/45134 , H03F2203/45512 , H03F2203/45521
摘要： A fully differential amplifier includes: an N-stage amplifier including first to Nth amplifier stages, where N is a positive integer greater than or equal to 2, the first to Nth amplifier stages being cascaded in sequence so as to generate a pair of differential output voltages; a common mode feedback circuit coupled to the N-stage amplifier, detecting a common mode level of the differential output voltages, and controlling the first amplifier stage according to the common mode level detected thereby; and a common mode frequency compensation circuit including a pair of capacitors, each having a first terminal coupled to the N-stage amplifier to receive a respective one of the differential output voltages, and a second terminal coupled to a common mode node of the first to (N-1)th amplifier stages of the N-stage amplifier.
摘要翻译：全差分放大器包括：N阶放大器，包括第一至第N放大器级，其中N是大于或等于2的正整数，第一至第N放大器级依次级联以产生一对差分输出电压; 耦合到N级放大器的共模反馈电路，检测差模输出电压的共模电平，并根据由此检测的共模电平来控制第一放大级; 以及包括一对电容器的共模频率补偿电路，每个电容器具有耦合到N级放大器的第一端子以接收相应的一个差分输出电压;以及第二端子，其耦合到第一至第（N-1）个放大器级。

72. 发明申请

US20090191833A1 HIGH PERFORMANCE CMOS RADIO FREQUENCY RECEIVER 有权
标题翻译：高性能CMOS无线电频率接收器
公开(公告)号：US20090191833A1
公开(公告)日：2009-07-30
申请号：US12021534
申请日：2008-01-29
申请人： Daniel L. Kaczman , Mohammed S. Alam , David L. Cashen , Lu M. Han , Mohammed Rachedine , Manish N. Shah
发明人： Daniel L. Kaczman , Mohammed S. Alam , David L. Cashen , Lu M. Han , Mohammed Rachedine , Manish N. Shah
IPC分类号： H04B1/10
CPC分类号： H04B1/30 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03F1/301 , H03F3/195 , H03F3/211 , H03F3/45183 , H03F3/45475 , H03F3/45659 , H03F2200/294 , H03F2200/411 , H03F2203/45316 , H03F2203/45418 , H03F2203/45424 , H03F2203/45512 , H03F2203/45526 , H03F2203/45681 , H03F2203/45682 , H03K3/35625
摘要： A high performance radio frequency receiver includes a low noise amplifier with large binary and stepped gain control range, controlled impedance, and enhanced blocker immunity, for amplifying and converting a radio frequency signal to a current; a pulse generator for generating in-phase and quadrature pulses; a crossover correction circuit and pulse shaper for controlling a crossover threshold of the pulses and interaction between in-phase and quadrature mixers; and a double balanced mixer for combining the RF signal with the pulses to generate an intermediate frequency or baseband zero intermediate frequency current-mode signal. The in-phase and quadrature pulses have a duty cycle of 20-35%. The intermediate frequency signal and second order harmonics may be filtered with a high frequency low pass filter and a current injected complex direct-coupled filter. Decreased die size, current drain, cost, and complexity, as well as improvements in gain, 1/f noise, noise figure, sensitivity, and linearity may result.
摘要翻译：高性能射频接收机包括具有大二进制和阶梯增益控制范围的低噪声放大器，受控阻抗和增强的阻塞抗扰度，用于放大和转换射频信号到电流; 用于产生同相和正交脉冲的脉冲发生器; 交叉校正电路和脉冲整形器，用于控制脉冲的交叉阈值以及同相和正交混频器之间的相互作用; 以及用于将RF信号与脉冲组合以产生中频或基带零中频频率电流模式信号的双平衡混频器。同相和正交脉冲的占空比为20-35％。中频信号和二次谐波可以用高频低通滤波器和注入电流的复合直流滤波器进行滤波。降低管芯尺寸，电流消耗，成本和复杂性，以及增益，1 / f噪声，噪声系数，灵敏度和线性度的改善。

73. 发明授权

US07565118B2 Polar modulation transmission apparatus and wireless communication apparatus 失效
标题翻译：极地调制发送装置和无线通信装置
公开(公告)号：US07565118B2
公开(公告)日：2009-07-21
申请号：US11516662
申请日：2006-09-07
申请人： Yoshihiro Hara
发明人： Yoshihiro Hara
IPC分类号： H04L25/49
CPC分类号： H04L27/361 , H03F1/0205 , H03F1/32 , H03F3/24 , H03F3/45085 , H03F3/45475 , H03F2203/45374 , H03F2203/45512 , H04L27/368
摘要： A polar modulation transmission apparatus for realizing a wide control range for transmission power, maintaining the modulation precision and the distortion characteristic at a superb level even at a low output, and providing a high power efficiency is provided. An adder 102 adds a logarithm-represented transmission power control signal S13 to a logarithm-represented amplitude signal S14, and outputs the resultant signal as a transmission power-controlled amplitude signal S5. A phase modulation section 104 outputs a high frequency phase-modulated signal S8 based on a phase signal S3. An amplitude signal amplifier 103 supplies a supply voltage to a high frequency power amplifier 106 based on an amplitude signal S5. The high frequency power amplifier 106 performs amplitude modulation on the high frequency phase-modulated signal S8 based on the supply voltage supplied thereto, and outputs the resultant signal as a high frequency transmission signal S10.
摘要翻译：提供了一种极地调制发送装置，用于实现传输功率的宽的控制范围，即使在低输出时也将调制精度和失真特性保持在极高的电平，并提供高功率效率。加法器102将对数表示的发送功率控制信号S13与对数表示的振幅信号S14相加，并输出作为发送功率控制振幅信号S5的结果信号。相位调制部104基于相位信号S3输出高频相位调制信号S8。振幅信号放大器103基于振幅信号S5向高频功率放大器106供给电源电压。高频功率放大器106根据供给的电源电压对高频相位调制信号S8进行振幅调制，并输出作为高频发送信号S10的合成信号。

74. 发明授权

US07560991B2 Dynamically compensated operational amplifier 有权
标题翻译：动态补偿运算放大器
公开(公告)号：US07560991B2
公开(公告)日：2009-07-14
申请号：US11674150
申请日：2007-02-13
申请人： Chia-Liang Lin , Gerchih Chou , Chao-Cheng Lee
发明人： Chia-Liang Lin , Gerchih Chou , Chao-Cheng Lee
IPC分类号： H03F1/14
CPC分类号： H03F1/086 , H03F1/3211 , H03F3/45183 , H03F2200/153 , H03F2203/45511 , H03F2203/45512 , H03F2203/45514
摘要： An operational amplifier is dynamically compensated depending on the internal state of the operational amplifier. Compensation is fully enabled only when the internal state indicates a risk of instability. When the internal state of the operational amplifier indicates there is no risk of instability, the compensation is totally or partially turned off.
摘要翻译：运算放大器根据运算放大器的内部状态进行动态补偿。仅当内部状态表示不稳定的风险时，补偿才能完全启用。当运算放大器的内部状态表明不存在不稳定的风险时，补偿完全或部分关闭。

75. 发明申请

US20090167407A1 Operational amplifier and integrating circuit 失效
标题翻译：运算放大器和积分电路
公开(公告)号：US20090167407A1
公开(公告)日：2009-07-02
申请号：US12314488
申请日：2008-12-11
申请人： Kuniyuki Okuyama
发明人： Kuniyuki Okuyama
IPC分类号： G06G7/186 , H03F3/45
CPC分类号： H03F3/45179 , H03F1/083 , H03F1/342 , H03F2200/153 , H03F2203/30033 , H03F2203/45248 , H03F2203/45512 , H03F2203/45518 , H03F2203/45526
摘要： An operational amplifier in accordance with one embodiment of the present invention includes a differential amplifier circuit to perform differential amplification of an input signal with respect to a reference potential Vbias, an output circuit to output a signal amplified by the differential amplifier circuit, a phase compensation capacitance connected between the output of the differential amplifier circuit and the output of the output circuit to compensate the phase of the signal output from the output circuit, and a diode connected in parallel with the phase compensation capacitance.
摘要翻译：根据本发明的一个实施例的运算放大器包括差分放大器电路，用于相对于参考电位Vbias执行输入信号的差分放大，输出电路，输出由差分放大器电路放大的信号，相位补偿电容连接在差分放大器电路的输出端和输出电路的输出端之间，以补偿从输出电路输出的信号的相位，以及与相位补偿电容并联的二极管。

76. 发明授权

US07545221B1 Signal amplifying apparatus including I/O devices and core devices 有权
标题翻译：信号放大装置，包括I / O装置和核心装置
公开(公告)号：US07545221B1
公开(公告)日：2009-06-09
申请号：US11970525
申请日：2008-01-08
申请人： Chia-Hua Chou , Kang-Wei Hsueh
发明人： Chia-Hua Chou , Kang-Wei Hsueh
IPC分类号： H03F3/68
CPC分类号： H03F3/45183 , H03F3/45219 , H03F2200/153 , H03F2200/297 , H03F2203/45091 , H03F2203/45366 , H03F2203/45512 , H03F2203/45526
摘要： The present invention provides a signal amplifying apparatus, for converting a first input signal into a first output signal. The signal amplifying apparatus includes an input stage circuit for receiving the first input signal; a cascoded circuit coupled to the input stage circuit, including a plurality of first cascoded transistors, wherein equivalent oxide thicknesses of the first cascoded transistors are not the same; an output stage circuit has a first input port coupled to the cascoded circuit, and a first output port for outputting the first output signal; and a first capacitor has a first terminal connected to the first output port of the output stage circuit and a second terminal coupled to the cascoded circuit, wherein the second terminal is not connected to the first input port of the output stage circuit.
摘要翻译：本发明提供了一种用于将第一输入信号转换为第一输出信号的信号放大装置。信号放大装置包括：输入级电路，用于接收第一输入信号; 耦合到输入级电路的级联电路，包括多个第一级联光电晶体管，其中第一级联光电晶体管的等效氧化物厚度不相同; 输出级电路具有耦合到级联电路的第一输入端口和用于输出第一输出信号的第一输出端口; 并且第一电容器具有连接到输出级电路的第一输出端口的第一端子和耦合到级联电路的第二端子，其中第二端子不连接到输出级电路的第一输入端口。

77. 发明授权

US07504882B2 Differential amplifier circuit and semiconductor device 失效
标题翻译：差分放大电路和半导体器件
公开(公告)号：US07504882B2
公开(公告)日：2009-03-17
申请号：US11510623
申请日：2006-08-28
申请人： Hirofumi Saito
发明人： Hirofumi Saito
IPC分类号： H03F3/45
CPC分类号： G11C7/067 , G11C7/08 , H03F3/3022 , H03F3/393 , H03F3/45192 , H03F3/45475 , H03F3/45775 , H03F2203/45136 , H03F2203/45212 , H03F2203/45512 , H03F2203/45548 , H03F2203/45588 , H03F2203/45616 , H03F2203/45681 , H03F2203/45726
摘要： A differential amplifier circuit in which an input offset voltage is very small. The differential amplifier circuit includes an input-stage differential amplifier section and a cascode-connected single-ended output section connected to the input-stage differential amplifier section. The input-stage differential amplifier section has a folded-cascode-connection. An inverted signal and non-inverted signal on the input side and output side, respectively, of the input-stage differential amplifier section are switched alternatingly in time-shared fashion by switches that are operated by two chopping clock signals of opposite phase.
摘要翻译：其中输入失调电压非常小的差分放大器电路。差分放大器电路包括输入级差分放大器部分和连接到输入级差分放大器部分的共源共栅型单端输出部分。输入级差分放大器部分具有折叠共源共栅连接。输入级差分放大器部分的输入侧和输出侧的反相信号和非反相信号通过由相反相位的两个斩波时钟信号操作的开关以时间共享的方式交替地切换。

78. 发明申请

US20080309404A1 Single-Ended Amplifier 有权
标题翻译：单端放大器
公开(公告)号：US20080309404A1
公开(公告)日：2008-12-18
申请号：US12160379
申请日：2007-01-05
申请人： Marco Berkhout
发明人： Marco Berkhout
IPC分类号： H03F1/02
CPC分类号： H03F3/45475 , H03F1/0283 , H03F1/30 , H03F1/34 , H03F3/181 , H03F3/45973 , H03F3/68 , H03F2203/45512 , H03F2203/45528
摘要： In an amplifier arrangement comprising an amplifier (AO) having an output, a first feedback (Rfb) between the output and an input side of the amplifier, a load (RL) having a first terminal coupled to the output and a second terminal, and a DC-blocking capacitance (CDC) between the second terminal of the load and a reference terminal, a second feedback (Cx, Rx) is present between the second terminal of the load and the input side of the amplifier.
摘要翻译：在包括具有输出的放大器（AO）的放大器装置中，放大器的输出端和输入端之间的第一反馈（Rfb），具有耦合到输出端的第一端子的负载（RL）和第二端子，以及负载的第二端子与参考端子之间的直流阻塞电容（CDC），负载的第二端子与放大器的输入端之间存在第二反馈（Cx，Rx）。

79. 发明授权

US07453318B2 Operational amplifier for outputting high voltage output signal 失效
标题翻译：用于输出高压输出信号的运算放大器
公开(公告)号：US07453318B2
公开(公告)日：2008-11-18
申请号：US11528544
申请日：2006-09-28
申请人： Koji Higuchi
发明人： Koji Higuchi
IPC分类号： H03F3/45
CPC分类号： H03F3/45188 , H03F1/34 , H03F3/3022 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F2203/45136 , H03F2203/45512 , H03F2203/45528
摘要： An operational amplifier includes a differential amplifier circuit, receiving a low voltage signal, and a current mirror circuit provided on the downstream. The differential amplifier circuit also includes low withstand voltage N-channel transistors, connected to respective input terminals, and high withstand voltage N-channel transistors, connected to the drain electrodes of the low withstand voltage transistors via junction points, respectively. To the gate electrodes of both the high withstand voltage transistors supplied is a bias voltage. The source electrodes of the low withstand voltage transistors are connected to the drain electrode of another low withstand voltage transistor, which has its gate electrode supplied with a bias voltage so as to operate as a current source. Those low withstand voltage transistors are smaller in size than the high withstand voltage transistors.
摘要翻译：运算放大器包括差分放大器电路，接收低电压信号，以及设置在下游的电流镜电路。差分放大器电路还包括分别通过接点连接到低耐压晶体管的漏电极的低耐压N沟道晶体管，连接到各个输入端子和高耐压N沟道晶体管。提供的高耐压晶体管的栅电极是偏置电压。低耐压晶体管的源电极连接到另一个低耐压晶体管的漏电极，其另一个低耐压晶体管的栅电极被提供有偏置电压，以作为电流源工作。那些低耐压晶体管的尺寸小于高耐压晶体管。

80. 发明申请

US20080238552A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20080238552A1
公开(公告)日：2008-10-02
申请号：US12056860
申请日：2008-03-27
申请人： Shinichiro Kataoka , Takehiro Yano
发明人： Shinichiro Kataoka , Takehiro Yano
IPC分类号： H03F1/14
CPC分类号： H03F1/14 , H03F3/45183 , H03F2200/153 , H03F2203/45466 , H03F2203/45512 , H03F2203/45641 , H03F2203/45654 , H03F2203/45674
摘要： A semiconductor device includes a phase compensation circuit 6 using a MOS capacitor with a structure in which an insulating film is disposed between a gate electrode formed on a semiconductor substrate and a diffusion layer. The phase compensation circuit includes first and second MOS capacitors 14, 15. A gate electrode terminal of the first MOS capacitor is connected equivalently to a diffusion layer terminal of the second MOS capacitor that is a terminal opposite to the gate electrode terminal. A potential difference generating element 16 that generates a potential difference by allowing a current to flow therethrough is connected between a diffusion layer terminal of the first MOS capacitor and a gate electrode terminal of the second MOS capacitor. When the MOS capacitors having the voltage dependence are used, e.g., as a phase compensation circuit element of an operational amplifier, the MOS capacitance is not reduced, no matter the range of the input or output voltage of the operational amplifier, so that the phase margin will not reduced.
摘要翻译：半导体器件包括使用具有绝缘膜设置在形成在半导体衬底上的栅电极和扩散层之间的结构的MOS电容器的相位补偿电路6。相位补偿电路包括第一和第二MOS电容器14,15。第一MOS电容器的栅极端子等效地连接到与栅电极端子相对的端子的第二MOS电容器的扩散层端子。在第一MOS电容器的扩散层端子和第二MOS电容器的栅电极端子之间连接有通过使电流流过而产生电位差的电位差产生元件16。当使用具有电压依赖性的MOS电容器时，例如，作为运算放大器的相位补偿电路元件，不考虑运算放大器的输入或输出电压的范围，MOS电容不降低，使得相位保证金不会减少。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式